It will need to be "isAtomicRead" to include AtomicLoad and AtomicRMW. Basically any atomic operation that returns a value. We assume that by its very nature of being atomic, the returned value can be different in each thread. Fence is not relevant for this use-case since it does not access memory or return anything; it merely orders operations within the same thread.
We need this to check divergence of an instruction in GMIR, it was either this or moving this opcode matching inside isDivergent type function which didn't look right and also wasn't consistent with how Atomic instructions are handled in IR divergence/uniformity analysis.
Okay. I'll get rid of the second predicate, maybe when the divergence revision comes up we can revisit this if that doesn't look right