[ASan] Use stack safety analysis to optimize allocas instrumentation.

[kstoimenov]

Summary

Added alloca optimization which was missed during the implemenation of D112098.

[vitalybuka]

llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll

30

Isn't this pass without the patch?

64–66

probably we don't need these

[vitalybuka]

please rebase, i've improved the test

llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll

7

I believe all of existing tests are affected by the patch, but the signal is
missing @__asan_stack_malloc

Then with this patch we don't have a case:
alloca is not save, but one of accesses is removed

[vitalybuka]

llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll

7

I believe all of existing tests are affected by the patch, but the signal is
missing @__asan_stack_malloc

Then with this patch we don't have a case:
alloca is not save, but one of accesses is removed

To clarify, we need new test which contains in one function:
1 unsafe alloca
1 safe load or store (maybe constant offset)
1 unsafe load or store (maybe int function parameter offset)

[kstoimenov]

After rebase.

[vitalybuka]

fix test

llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp

bool IsInteresting =
        ((!AI.isStaticAlloca()) || getAllocaSizeInBytes(AI) > 0) &&
        // We are only interested in allocas not promotable to registers.
        // Promotable allocas are common under -O0.
        (!ClSkipPromotableAllocas || !isAllocaPromotable(&AI)) &&
        // inalloca allocas are not treated as static, and we don't want
        // dynamic alloca instrumentation for them as well.
        !AI.isUsedWithInAlloca() &&
        // swifterror allocas are register promoted by ISel
-       !AI.isSwiftError());
+       !AI.isSwiftError() &&
+       // safe allocas are not interesting
+       !(SSGI && SSGI->isSafe(AI)));
 
   ProcessedAllocas[&AI] = IsInteresting;
   return IsInteresting;
 }
 
 bool AddressSanitizer::ignoreAccess(Instruction *Inst, Value *Ptr) {
   // Instrument acesses from different address spaces only for AMDGPU.
   Type *PtrTy = cast<PointerType>(Ptr->getType()->getScalarType());

llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll

 ; REQUIRES: x86-registered-target
 
 ; RUN: opt < %s -S -asan-instrumentation-with-call-threshold=0 -passes='asan-pipeline' -asan-use-stack-safety=0 -o - | FileCheck %s --implicit-check-not="call {{.*}} @__asan_{{load|store|stack}}" --check-prefixes=CHECK,NOSAFETY
 ; RUN: opt < %s -S -asan-instrumentation-with-call-threshold=0 -passes='asan-pipeline' -asan-use-stack-safety=1 -o - | FileCheck %s --implicit-check-not="call {{.*}} @__asan_{{load|store|stack}}"
 
 ; CHECK-LABEL: define i32 @load
 define i32 @load() sanitize_address {
   %buf = alloca [10 x i8], align 1
-  ; CHECK: call i64 @__asan_stack_malloc
+  ; NOSAFETY: call i64 @__asan_stack_malloc
   %arrayidx = getelementptr inbounds [10 x i8], [10 x i8]* %buf, i64 0, i64 0
   %1 = load i8, i8* %arrayidx, align 1
   ; NOSAFETY: call void @__asan_load1
   ret i32 0
 }
 
 ; CHECK-LABEL: define i32 @store
 define i32 @store() sanitize_address {
   %buf = alloca [10 x i8], align 1
-  ; CHECK: call i64 @__asan_stack_malloc
+  ; NOSAFETY: call i64 @__asan_stack_malloc
   %arrayidx = getelementptr inbounds [10 x i8], [10 x i8]* %buf, i64 0, i64 0
   store i8 0, i8* %arrayidx
   ; NOSAFETY: call void @__asan_store1
   ret i32 0
 }
 
+; CHECK-LABEL: define i32 @unsafe_alloca
+define i32 @unsafe_alloca(i32 %i) sanitize_address {
+  %buf.sroa.0 = alloca [10 x i8], align 4
+  ; CHECK: call i64 @__asan_stack_malloc
+  %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 %i, i32 0
+  store volatile i8 0, i8* %ptr, align 4
+  ; CHECK: call void @__asan_store1
+  %ptr2 = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 0
+  store volatile i8 0, i8* %ptr2, align 4
+  ; NOSAFETY: call void @__asan_store1
+  ret i32 0
+}
+
 ; CHECK-LABEL: define void @atomicrmw
 define void @atomicrmw() sanitize_address {
   %buf = alloca [10 x i8], align 1
-  ; CHECK: call i64 @__asan_stack_malloc
+  ; NOSAFETY: call i64 @__asan_stack_malloc
   %arrayidx = getelementptr inbounds [10 x i8], [10 x i8]* %buf, i64 0, i64 0
   %1 = atomicrmw add i8* %arrayidx, i8 1 seq_cst
   ; NOSAFETY: call void @__asan_store1
   ret void
 }
 
 ; CHECK-LABEL: define void @cmpxchg
 define void @cmpxchg(i8 %compare_to, i8 %new_value) sanitize_address {
   %buf = alloca [10 x i8], align 1
-  ; CHECK: call i64 @__asan_stack_malloc
+  ; NOSAFETY: call i64 @__asan_stack_malloc
   %arrayidx = getelementptr inbounds [10 x i8], [10 x i8]* %buf, i64 0, i64 0
   %1 = cmpxchg i8* %arrayidx, i8 %compare_to, i8 %new_value seq_cst seq_cst
   ; NOSAFETY: call void @__asan_store1
   ret void
 }