[mips][ias] Implement .cpreturn directive.

[dsanders]

Summary

Based on a patch by David Chisnall. I've modified the original patch as follows:

• Moved the expansion to the TargetStreamers so that the directive isn't expanded when emitting assembly.
• Fixed an operand order bug.
• Changed the move instructions from DADDu to OR to match recent changes to GAS.

[seanbruno]

Tested on the mips3 target for FreeBSD mips64 and it works great. Thanks!

[vkalintiris]

LGTM too.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

class MipsAsmParser : public MCTargetAsmParser {
   MCSymbol *CurrentFn; // Pointer to the function being parsed. It may be a
                        // nullptr, which indicates that no function is currently
                        // selected. This usually happens after an '.end func'
                        // directive.
   bool IsLittleEndian;
   bool IsPicEnabled;
   bool IsCpRestoreSet;
   int CpRestoreOffset;
+  unsigned CpSaveLocation;
+  /// If true, then CpSaveLocation is a register, otherwise it's an offset.
+  bool     CpSaveLocationIsRegister;
 
   // Print a warning along with its fix-it message at the given range.
   void printWarningWithFixIt(const Twine &Msg, const Twine &FixMsg,
                              SMRange Range, bool ShowColors = true);
 
 #define GET_ASSEMBLER_HEADER
 #include "MipsGenAsmMatcher.inc"
 
#include "MipsGenAsmMatcher.inc"
   bool isEvaluated(const MCExpr *Expr);
   bool parseSetMips0Directive();
   bool parseSetArchDirective();
   bool parseSetFeature(uint64_t Feature);
   bool isPicAndNotNxxAbi(); // Used by .cpload, .cprestore, and .cpsetup.
   bool parseDirectiveCpLoad(SMLoc Loc);
   bool parseDirectiveCpRestore(SMLoc Loc);
   bool parseDirectiveCPSetup();
+  bool parseDirectiveCPReturn();
   bool parseDirectiveNaN();
   bool parseDirectiveSet();
   bool parseDirectiveOption();
   bool parseInsnDirective();
 
   bool parseSetAtDirective();
   bool parseSetNoAtDirective();
   bool parseSetMacroDirective();
bool MipsAsmParser::parseDirectiveCPSetup() {
   }
 
   if (Expr->getKind() != MCExpr::SymbolRef) {
     reportParseError("expected symbol");
     return false;
   }
   const MCSymbolRefExpr *Ref = static_cast<const MCSymbolRefExpr *>(Expr);
 
+  CpSaveLocation = Save;
+  CpSaveLocationIsRegister = SaveIsReg;
+
   getTargetStreamer().emitDirectiveCpsetup(FuncReg, Save, Ref->getSymbol(),
                                            SaveIsReg);
   return false;
 }
 
+bool MipsAsmParser::parseDirectiveCPReturn() {
+  getTargetStreamer().emitDirectiveCpreturn(CpSaveLocation,
+                                            CpSaveLocationIsRegister);
+  return false;
+}
+
 bool MipsAsmParser::parseDirectiveNaN() {
   MCAsmParser &Parser = getParser();
   if (getLexer().isNot(AsmToken::EndOfStatement)) {
     const AsmToken &Tok = Parser.getTok();
 
     if (Tok.getString() == "2008") {
       Parser.Lex();
       getTargetStreamer().emitDirectiveNaN2008();
if (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
       Parser.eatToEndOfStatement();
     }
     return false;
   }
 
   if (IDVal == ".cpsetup")
     return parseDirectiveCPSetup();
 
+  if (IDVal == ".cpreturn")
+    return parseDirectiveCPReturn();
+
   if (IDVal == ".module")
     return parseDirectiveModule();
 
   if (IDVal == ".llvm_internal_mips_reallow_module_directive")
     return parseInternalDirectiveReallowModule();
 
   if (IDVal == ".insn")
     return parseInsnDirective();

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
 void MipsTargetStreamer::emitDirectiveCpRestore(
     SmallVector<MCInst, 3> &StoreInsts, int Offset) {
   forbidModuleDirective();
 }
 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
                                               const MCSymbol &Sym, bool IsReg) {
 }
+void MipsTargetStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
+                                               bool SaveLocationIsRegister) {}
 
 void MipsTargetStreamer::emitDirectiveModuleFP() {}
 
 void MipsTargetStreamer::emitDirectiveModuleOddSPReg() {
   if (!ABIFlagsSection.OddSPReg && !ABIFlagsSection.Is32BitABI)
     report_fatal_error("+nooddspreg is only valid for O32");
 }
 void MipsTargetStreamer::emitDirectiveModuleSoftFloat() {}
else
     OS << RegOrOffset;
 
   OS << ", ";
 
   OS << Sym.getName();
   forbidModuleDirective();
 }
 
+void MipsTargetAsmStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
+                                                  bool SaveLocationIsRegister) {
+  OS << "\t.cpreturn";
+  forbidModuleDirective();
+}
+
 void MipsTargetAsmStreamer::emitDirectiveModuleFP() {
   OS << "\t.module\tfp=";
   OS << ABIFlagsSection.getFpABIString(ABIFlagsSection.getFpABI()) << "\n";
 }
 
 void MipsTargetAsmStreamer::emitDirectiveSetFp(
     MipsABIFlagsSection::FpABIKind Value) {
   MipsTargetStreamer::emitDirectiveSetFp(Value);
void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
   Inst.addOperand(MCOperand::createReg(Mips::GP));
   Inst.addOperand(MCOperand::createReg(Mips::GP));
   Inst.addOperand(MCOperand::createReg(RegNo));
   getStreamer().EmitInstruction(Inst, STI);
 
   forbidModuleDirective();
 }
 
+void MipsTargetELFStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
+                                                  bool SaveLocationIsRegister) {
+  // Only N32 and N64 emit anything for .cpreturn iff PIC is set.
+  if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
+    return;
+
+  MCInst Inst;
+  // Either restore the old $gp from a register or on the stack
+  if (SaveLocationIsRegister) {
+    Inst.setOpcode(Mips::OR);
+    Inst.addOperand(MCOperand::createReg(Mips::GP));
+    Inst.addOperand(MCOperand::createReg(SaveLocation));
+    Inst.addOperand(MCOperand::createReg(Mips::ZERO));
+  } else {
+    Inst.setOpcode(Mips::LD);
+    Inst.addOperand(MCOperand::createReg(Mips::GP));
+    Inst.addOperand(MCOperand::createReg(Mips::SP));
+    Inst.addOperand(MCOperand::createImm(SaveLocation));
+  }
+  getStreamer().EmitInstruction(Inst, STI);
+
+  forbidModuleDirective();
+}
+
 void MipsTargetELFStreamer::emitMipsAbiFlags() {
   MCAssembler &MCA = getStreamer().getAssembler();
   MCContext &Context = MCA.getContext();
   MCStreamer &OS = getStreamer();
   MCSectionELF *Sec = Context.getELFSection(
       ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
   MCA.registerSection(*Sec);
   Sec->setAlignment(8);
   OS.SwitchSection(Sec);
 
   OS << ABIFlagsSection;
 }

lib/Target/Mips/MipsTargetStreamer.h

public:
   virtual void emitDirectiveSetHardFloat();
 
   // PIC support
   virtual void emitDirectiveCpLoad(unsigned RegNo);
   virtual void emitDirectiveCpRestore(SmallVector<MCInst, 3> &StoreInsts,
                                       int Offset);
   virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
                                     const MCSymbol &Sym, bool IsReg);
+  virtual void emitDirectiveCpreturn(unsigned SaveLocation,
+                                     bool SaveLocationIsRegister);
 
   // FP abiflags directives
   virtual void emitDirectiveModuleFP();
   virtual void emitDirectiveModuleOddSPReg();
   virtual void emitDirectiveModuleSoftFloat();
   virtual void emitDirectiveModuleHardFloat();
   virtual void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value);
   virtual void emitDirectiveSetOddSPReg();
public:
   void emitDirectiveSetHardFloat() override;
 
   // PIC support
   void emitDirectiveCpLoad(unsigned RegNo) override;
   void emitDirectiveCpRestore(SmallVector<MCInst, 3> &StoreInsts,
                               int Offset) override;
   void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
                             const MCSymbol &Sym, bool IsReg) override;
+  void emitDirectiveCpreturn(unsigned SaveLocation,
+                             bool SaveLocationIsRegister) override;
 
   // FP abiflags directives
   void emitDirectiveModuleFP() override;
   void emitDirectiveModuleOddSPReg() override;
   void emitDirectiveModuleSoftFloat() override;
   void emitDirectiveModuleHardFloat() override;
   void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value) override;
   void emitDirectiveSetOddSPReg() override;
public:
   void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override;
 
   // PIC support
   void emitDirectiveCpLoad(unsigned RegNo) override;
   void emitDirectiveCpRestore(SmallVector<MCInst, 3> &StoreInsts,
                               int Offset) override;
   void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
                             const MCSymbol &Sym, bool IsReg) override;
+  void emitDirectiveCpreturn(unsigned SaveLocation,
+                             bool SaveLocationIsRegister) override;
 
   void emitMipsAbiFlags();
 };
 }
 #endif

test/MC/Mips/cpsetup.s

 # RUN: llvm-mc -triple mips64-unknown-unknown %s | \
 # RUN:   FileCheck -check-prefix=ALL -check-prefix=ASM %s
 
         .text
         .option pic2
 t1:
         .cpsetup $25, 8, __cerror
         nop
+        .cpreturn
+        nop
 
 # ALL-LABEL: t1:
 
 # O32-NOT: __cerror
 
 # FIXME: Direct object emission for N32 is still under development.
 # N32 doesn't allow 3 operations to be specified in the same relocation
 # record like N64 does.
 
 # NXX-NEXT: sd       $gp, 8($sp)
 # NXX-NEXT: lui      $gp, 0
 # NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16  __cerror
 # NXX-NEXT: addiu    $gp, $gp, 0
 # NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16  __cerror
 # N32-NEXT: addu     $gp, $gp, $25
 # N64-NEXT: daddu    $gp, $gp, $25
 
 # ASM-NEXT: .cpsetup $25, 8, __cerror
 
 # ALL-NEXT: nop
 
+# ASM-NEXT: .cpreturn
+# NXX-NEXT: ld $gp, 8($sp)
+
+# ALL-NEXT: nop
+
 t2:
         .cpsetup $25, $2, __cerror
         nop
+        .cpreturn
+        nop
 
 # ALL-LABEL: t2:
 
 # O32-NOT: __cerror
 
 # FIXME: Direct object emission for N32 is still under development.
 # N32 doesn't allow 3 operations to be specified in the same relocation
 # record like N64 does.
 
 # NXX-NEXT: move     $2, $gp
 # NXX-NEXT: lui      $gp, 0
 # NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16  __cerror
 # NXX-NEXT: addiu    $gp, $gp, 0
 # NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16  __cerror
 # N32-NEXT: addu     $gp, $gp, $25
 # N64-NEXT: daddu    $gp, $gp, $25
 
 # ASM-NEXT: .cpsetup $25, $2, __cerror
 
 # ALL-NEXT: nop
 
+# ASM-NEXT: .cpreturn
+# NXX-NEXT: move $gp, $2
+
+# ALL-NEXT: nop
+
 # .cpsetup with local labels (PR22518):
 
 # The '1:' label isn't emitted in all cases but we still want a label to match
 # so we force one here.
 
 t3:
         nop
 1:
# we're matching aren't removed.
         nop
 # ALL-NEXT: nop
 
         .option pic0
 t4:
         nop
         .cpsetup $25, 8, __cerror
         nop
+        .cpreturn
+        nop
 
 # Testing that .cpsetup expands to nothing in this case
 # by checking that the next instruction after the first
 # nop is also a 'nop'.
 
 # ALL-LABEL: t4:
 
 # NXX-NEXT: nop
 # NXX-NEXT: nop
+# NXX-NEXT: nop
 
 # ASM-NEXT: nop
 # ASM-NEXT: .cpsetup $25, 8, __cerror
 # ASM-NEXT: nop
+# ASM-NEXT: .cpreturn
+# ASM-NEXT: nop
 
 # Test that we accept constant expressions.
         .option pic2
 t5:
         .cpsetup $25, ((8*4) - (3*8)), __cerror
         nop
 
 # ALL-LABEL: t5: