This is an archive of the discontinued LLVM Phabricator instance.

[CodeGen] Add codegen of IR function attribute fine_grained_bitfields
AbandonedPublic

Authored by jmciver on Jul 12 2022, 12:38 AM.

Details

Summary

This change helps to prevents mixing fine grained and non fine grained bit-field
addressing schemes, which can result in incorrect poison state at
initialization. The IR function attribute fine_grained_bitfields is only added
when fine grained bitfield accesses are enable. The attribute is used by opt to
prevent inlining.

Diff Detail

Event Timeline

jmciver created this revision.Jul 12 2022, 12:38 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 12 2022, 12:38 AM
jmciver published this revision for review.Jul 12 2022, 10:34 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 12 2022, 10:34 AM
Herald added a subscriber: cfe-commits. · View Herald Transcript
jmciver edited reviewers, added: efriedma; removed: eli.friedman.Jul 12 2022, 9:20 PM

The changes look reasonable to me as far as they go, but I'm not confident I understand the LLVM bits this builds on top of well enough to accept with much authority. So giving my LG, but not accepting the review so other reviewers can weigh in.

jmciver abandoned this revision.Mar 23 2023, 9:40 AM

I am closing this ticket as we are working on alternative solutions to poison based load semantics.

Thanks to everyone for taking the time to discuss this patch and its limitations!