[MCA] Support multiple comma-separated -mattr features

[myhsu]

LGTM. Thanks!

llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-sve-instructions.s

 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
-# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-n2 -mattr=+sve2-aes -instruction-tables < %s | FileCheck %s
-
-# NOTE: Only 1 feature can be passed to llvm-mca via -mattr, enable other
-# features with directive.
-.arch_extension sve2-sha3
-.arch_extension sve2-sm4
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-n2 -mattr=+sve2-aes,+sve2-sha3,+sve2-sm4 -instruction-tables < %s | FileCheck %s
 
 abs z0.b, p0/m, z0.b
 abs z0.d, p0/m, z0.d
 abs z0.h, p0/m, z0.h
 abs z0.s, p0/m, z0.s
 abs z31.b, p7/m, z31.b
 abs z31.d, p7/m, z31.d
 abs z31.h, p7/m, z31.h

llvm/tools/llvm-mca/llvm-mca.cpp

TripleName("mtriple",
                cl::desc("Target triple. See -version for available targets"),
                cl::cat(ToolOptions));
 
 static cl::opt<std::string>
     MCPU("mcpu",
          cl::desc("Target a specific cpu type (-mcpu=help for details)"),
          cl::value_desc("cpu-name"), cl::cat(ToolOptions), cl::init("native"));
 
-static cl::opt<std::string> MATTR("mattr",
-                                  cl::desc("Additional target features."),
-                                  cl::cat(ToolOptions));
+static cl::list<std::string>
+    MATTRS("mattr", cl::CommaSeparated,
+           cl::desc("Target specific attributes (-mattr=help for details)"),
+           cl::value_desc("a1,+a2,-a3,..."), cl::cat(ToolOptions));
 
 static cl::opt<bool> PrintJson("json",
                                cl::desc("Print the output in json format"),
                                cl::cat(ToolOptions), cl::init(false));
 
 static cl::opt<int>
     OutputAsmVariant("output-asm-variant",
                      cl::desc("Syntax variant to use for output printing"),
int main(int argc, char **argv) {
   if (std::error_code EC = BufferPtr.getError()) {
     WithColor::error() << InputFilename << ": " << EC.message() << '\n';
     return 1;
   }
 
   if (MCPU == "native")
     MCPU = std::string(llvm::sys::getHostCPUName());
 
+  // Package up features to be passed to target/subtarget
+  std::string FeaturesStr;
+  if (MATTRS.size()) {
+    SubtargetFeatures Features;
+    for (std::string &MAttr : MATTRS)
+      Features.AddFeature(MAttr);
+    FeaturesStr = Features.getString();
+  }
+
   std::unique_ptr<MCSubtargetInfo> STI(
-      TheTarget->createMCSubtargetInfo(TripleName, MCPU, MATTR));
+      TheTarget->createMCSubtargetInfo(TripleName, MCPU, FeaturesStr));
   assert(STI && "Unable to create subtarget info!");
   if (!STI->isCPUStringValid(MCPU))
     return 1;
 
   if (!STI->getSchedModel().hasInstrSchedModel()) {
     WithColor::error()
         << "unable to find instruction-level scheduling information for"
         << " target triple '" << TheTriple.normalize() << "' and cpu '" << MCPU