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[ConstExpr] Don't create div/rem expressions
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Authored by nikic on Jun 29 2022, 7:01 AM.

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Summary

This removes creation of udiv/sdiv/urem/srem constant expressions, in preparation for their removal. I've added a ConstantExpr::isDesirableBinOp() predicate to determine whether an expression should be created for a certain operator.

With this patch, div/rem expressions can still be created through explicit IR/bitcode -- forbidding them entirely will be the next step.

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Event Timeline

nikic created this revision.Jun 29 2022, 7:01 AM
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nikic planned changes to this revision.Jun 30 2022, 6:04 AM

I think I'll do some additional work on the IRBuilderFolder first.

nikic updated this revision to Diff 442077.Jul 4 2022, 5:50 AM
nikic edited the summary of this revision. (Show Details)

Be more thorough about not creating div/rem expressions, update tests.

nikic updated this revision to Diff 442100.Jul 4 2022, 7:59 AM

Check for desirable binops in one more place.

nhaehnle accepted this revision.Jul 5 2022, 1:22 AM

LGTM, one suggestion though.

llvm/lib/IR/Constants.cpp
2368–2379 ↗(On Diff #442100)

Is the plan to successively make more ops undesirable? Perhaps this should be a whitelist instead of a blacklist.

This revision is now accepted and ready to land.Jul 5 2022, 1:22 AM
This revision was landed with ongoing or failed builds.Jul 5 2022, 6:55 AM
This revision was automatically updated to reflect the committed changes.
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nikic added inline comments.Jul 5 2022, 6:57 AM
llvm/lib/IR/Constants.cpp
2368–2379 ↗(On Diff #442100)

I went with the "Why don't we have both?" approach here and explicitly listed both the desirable and undesirable binops. And yes, I plan to successively move these until only add and sub are left in the bottom list.