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[SCEV] Fix isImpliedViaMerge() with values from previous iteration (PR56242)
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Authored by nikic on Jun 27 2022, 6:15 AM.

Details

Summary

When trying to prove an implied condition on a phi by proving it for all incoming values, we need to be careful about values coming from a backedge, as these may refer to a previous loop iteration. A variant of this issue was fixed in D101829, but the dominance condition used there isn't quite right: It checks that the value dominates the incoming block, which doesn't exclude backedges (values defined in a loop will usually dominate the loop latch, which is the incoming block of the backedge).

Instead, we should be checking for domination of the phi block. Any values defined inside the loop will not dominate the loop header header phi.

Fixes https://github.com/llvm/llvm-project/issues/56242.

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nikic created this revision.Jun 27 2022, 6:15 AM
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nikic added inline comments.Jun 27 2022, 6:15 AM
llvm/test/Transforms/IRCE/decrementing-loop.ll
222

This just restores the pre-D101829 state of the test.

fhahn accepted this revision.Jul 5 2022, 12:51 AM

LGTM, thanks!

This revision is now accepted and ready to land.Jul 5 2022, 12:51 AM
This revision was landed with ongoing or failed builds.Jul 5 2022, 6:31 AM
This revision was automatically updated to reflect the committed changes.