[CodeGen] Make uninitialized Lvalue bit-field stores poison compatible

[jmciver]

Summary

Poison compatibility is provided by emitting a freeze instruction, post load,
for all Lvalue bit-field store operations. This solution is indiscriminate to
the initialization state and thus the freeze instruction may hide poison during
subsequent re-assignments.

This patch implements the first proposed solution from the following RFC:
https://discourse.llvm.org/t/rfc-making-bit-field-codegen-poison-compatible/63250

The test-suite is passing; my current setup is not idea for timing information.

[rjmccall]

Seems right to me.

[efriedma]

Under this scheme, is it illegal to link together object files built with -ffine-grained-bitfield-accesses and object files built with -fno-fine-grained-bitfield-accesses?

Do we want to add a temporary option to control this, to make it easier for people to benchmark any performance differences?

[nlopes]

In D128501#3608846, @efriedma wrote:

Under this scheme, is it illegal to link together object files built with -ffine-grained-bitfield-accesses and object files built with -fno-fine-grained-bitfield-accesses?

No, you can still link those. There's no ABI change nor any interference at IR level.
Thanks for the pointer, I wasn't aware of that option. What we can do is to optimize away the freezes with -ffine-grained-bitfield-accesses. The freeze is only needed when a struct field is shared between more than one bitfield.

Regarding perf, it's looking good, but @jmciver will post here a summary later.

[efriedma]

No, you can still link those. There's no ABI change nor any interference at IR level.

The scenario I was thinking of with -ffine-grained-bitfield-accesses is something like the following:

File A:

struct X { int a : 8; int b : 24; };
void f(struct X*);
int g() {
    struct X x;
    x.a = 10;
    f(&x);
    return x.a;
}

File B:

struct X { int a : 8; int b : 24; };
void f(struct X* x) {
    x->b = 10;
}

If both files are compiled -ffine-grained-bitfield-accesses, the fields don't overlap. If both files are compiled with -fno-fine-grained-bitfield-accesses, the assignment in file A freezes both fields of "x". If file A is compiled with -ffine-grained-bitfield-accesses, but file B is not, f() corrupts the field "a", so g() returns poison (if I'm not missing anything?).

[nlopes]

In D128501#3613420, @efriedma wrote:

No, you can still link those. There's no ABI change nor any interference at IR level.

The scenario I was thinking of with -ffine-grained-bitfield-accesses is something like the following:

File A:

struct X { int a : 8; int b : 24; };
void f(struct X*);
int g() {
    struct X x;
    x.a = 10;
    f(&x);
    return x.a;
}

File B:

struct X { int a : 8; int b : 24; };
void f(struct X* x) {
    x->b = 10;
}

If both files are compiled -ffine-grained-bitfield-accesses, the fields don't overlap. If both files are compiled with -fno-fine-grained-bitfield-accesses, the assignment in file A freezes both fields of "x". If file A is compiled with -ffine-grained-bitfield-accesses, but file B is not, f() corrupts the field "a", so g() returns poison (if I'm not missing anything?).

You are right, thanks! f() corrupts a because f assumes the fields were both initialized or neither of them was initialized.
The fix is not trivial though, because -ffine-grained-bitfield-accesses would have to freeze the adjacent fields.
This only matters if the IRs are linked together with IPO. Otherwise, at object level it doesn't really matter.

Do you think we can get away by just documenting the incompatibility of doing IPO with files compiled with different -ffine-grained-bitfield-accesses flags?

[efriedma]

This only matters if the IRs are linked together with IPO. Otherwise, at object level it doesn't really matter.

Right.

Do you think we can get away by just documenting the incompatibility of doing IPO with files compiled with different -ffine-grained-bitfield-accesses flags?

This seems like something that would be very easy to get wrong; I'd prefer not to trust that users know what their build systems are doing.

We could use a module flag to forbid linking together modules with different settings. Alternatively, we could mess with the code we generate with -ffine-grained-bitfield-accesses: use some intrinsic to freeze the adjacent bitfields, so a bitfield store has the same semantics with or without -ffine-grained-bitfield-accesses.

[rjmccall]

Is there no way in LLVM to load partially-initialized memory and then freeze it that will preserve the parts of the value that are initialized? Because that seems like something that LLVM needs to be providing.

[efriedma]

Is there no way in LLVM to load partially-initialized memory and then freeze it that will preserve the parts of the value that are initialized? Because that seems like something that LLVM needs to be providing.

It's currently possible to load <32 x i1>, freeze the result, and bitcast it to i32. But the backend is likely to turn that into something messy. Otherwise, no, there isn't really any way to load a partially poisoned value as an i32.

This is loosely related to https://discourse.llvm.org/t/a-memory-model-for-llvm-ir-supporting-limited-type-punning/61948 .

[rjmccall]

In D128501#3613890, @efriedma wrote:

Is there no way in LLVM to load partially-initialized memory and then freeze it that will preserve the parts of the value that are initialized? Because that seems like something that LLVM needs to be providing.

It's currently possible to load <32 x i1>, freeze the result, and bitcast it to i32. But the backend is likely to turn that into something messy. Otherwise, no, there isn't really any way to load a partially poisoned value as an i32.

Is that seen as a defect or as for some reason desirable? Because I worry that optimizer people are talking themselves into something that would be a truly beautiful model if only there were a frontend that could emit code for it.

Doesn't this make it e.g. illegal to use large integer types to do a memcpy of anything that might contain uninitialized padding?

[efriedma]

Is that seen as a defect or as for some reason desirable? Because I worry that optimizer people are talking themselves into something that would be a truly beautiful model if only there were a frontend that could emit code for it.

Doesn't this make it e.g. illegal to use large integer types to do a memcpy of anything that might contain uninitialized padding?

Yes, it does make that illegal. I think there's still significant gap here.

To allow implementing memcpy using large integers, given we have poison, basically, the possible solutions I know of are:

• Adopt byte types (https://lists.llvm.org/pipermail/llvm-dev/2021-June/150883.html).
• Adopt some rule that allows partially-poisoned integers, which are treated as poison except for a restricted set of operations, like freeze/store/bitcast. (https://discourse.llvm.org/t/a-memory-model-for-llvm-ir-supporting-limited-type-punning/61948).
• Add some mechanism to perform a frozen load, that doesn't propagate poison across bit positions.
• Get rid of poison, and depend purely on undef. (undef can be made self-consistent... but it's very hard to understand and doesn't allow optimizations we want.)

[jmciver]

I am closing this ticket as we are working on alternative solutions to poison based load semantics.

Thanks to everyone for taking the time to discuss this patch and its limitations!

clang/lib/CodeGen/CGExpr.cpp

void CodeGenFunction::EmitStoreThroughBitfieldLValue(RValue Src, LValue Dst,
   const unsigned Offset = UseVolatile ? Info.VolatileOffset : Info.Offset;
   // See if there are other bits in the bitfield's storage we'll need to load
   // and mask together with source before storing.
   if (StorageSize != Info.Size) {
     assert(StorageSize > Info.Size && "Invalid bitfield size.");
     llvm::Value *Val =
         Builder.CreateLoad(Ptr, Dst.isVolatileQualified(), "bf.load");
 
+    // In the event the store is acting as an initialization, add a freeze
+    // instruction to prevent infinite poison propagation.
+    Val = Builder.CreateFreeze(Val, "bf.freeze");
+
     // Mask the source value as needed.
     if (!hasBooleanRepresentation(Dst.getType()))
       SrcVal = Builder.CreateAnd(
           SrcVal, llvm::APInt::getLowBitsSet(StorageSize, Info.Size),
           "bf.value");
     MaskedVal = SrcVal;
     if (Offset)
       SrcVal = Builder.CreateShl(SrcVal, Offset, "bf.shl");

clang/test/CodeGen/aapcs-bitfield.c

 int st0_check_load(struct st0 *m) {
   return m->c;
 }
 
 // LE-LABEL: @st0_check_store(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st0* [[M:%.*]] to i8*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[TMP0]], align 2
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LE-NEXT:    store i8 [[BF_SET]], i8* [[TMP0]], align 2
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st0_check_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st0* [[M:%.*]] to i8*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[TMP0]], align 2
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BE-NEXT:    store i8 [[BF_SET]], i8* [[TMP0]], align 2
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st0_check_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st0* [[M:%.*]] to i8*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[TMP0]], align 2
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LENUMLOADS-NEXT:    store i8 [[BF_SET]], i8* [[TMP0]], align 2
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st0_check_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st0* [[M:%.*]] to i8*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[TMP0]], align 2
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BENUMLOADS-NEXT:    store i8 [[BF_SET]], i8* [[TMP0]], align 2
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st0_check_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st0* [[M:%.*]] to i8*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[TMP0]], align 2
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LEWIDTH-NEXT:    store i8 [[BF_SET]], i8* [[TMP0]], align 2
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st0_check_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st0* [[M:%.*]] to i8*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[TMP0]], align 2
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BEWIDTH-NEXT:    store i8 [[BF_SET]], i8* [[TMP0]], align 2
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st0_check_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st0* [[M:%.*]] to i8*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[TMP0]], align 2
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LEWIDTHNUM-NEXT:    store i8 [[BF_SET]], i8* [[TMP0]], align 2
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st0_check_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st0* [[M:%.*]] to i8*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[TMP0]], align 2
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BEWIDTHNUM-NEXT:    store i8 [[BF_SET]], i8* [[TMP0]], align 2
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st0_check_store(struct st0 *m) {
   m->c = 1;
 }
 

 int st1_check_load(struct st1 *m) {
   return m->c;
 }
 
 // LE-LABEL: @st1_check_store(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st1* [[M:%.*]] to i16*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 1023
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 1023
 // LE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1024
 // LE-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st1_check_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st1* [[M:%.*]] to i16*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -64
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -64
 // BE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // BE-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st1_check_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st1* [[M:%.*]] to i16*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 1023
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 1023
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1024
 // LENUMLOADS-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st1_check_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st1* [[M:%.*]] to i16*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -64
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -64
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // BENUMLOADS-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st1_check_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st1* [[M:%.*]] to i16*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 1023
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 1023
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1024
 // LEWIDTH-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st1_check_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st1* [[M:%.*]] to i16*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -64
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -64
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // BEWIDTH-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st1_check_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st1* [[M:%.*]] to i16*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 1023
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 1023
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1024
 // LEWIDTHNUM-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st1_check_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st1* [[M:%.*]] to i16*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -64
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -64
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // BEWIDTHNUM-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st1_check_store(struct st1 *m) {
   m->c = 1;
 }
 

 int st2_check_load(struct st2 *m) {
   return m->c;
 }
 
 // LE-LABEL: @st2_check_store(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.st2* [[M:%.*]], i32 0, i32 1
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[C]], align 2
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LE-NEXT:    store i8 [[BF_SET]], i8* [[C]], align 2
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st2_check_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.st2* [[M:%.*]], i32 0, i32 1
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[C]], align 2
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BE-NEXT:    store i8 [[BF_SET]], i8* [[C]], align 2
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st2_check_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.st2* [[M:%.*]], i32 0, i32 1
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[C]], align 2
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LENUMLOADS-NEXT:    store i8 [[BF_SET]], i8* [[C]], align 2
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st2_check_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.st2* [[M:%.*]], i32 0, i32 1
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[C]], align 2
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BENUMLOADS-NEXT:    store i8 [[BF_SET]], i8* [[C]], align 2
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st2_check_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.st2* [[M:%.*]], i32 0, i32 1
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[C]], align 2
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LEWIDTH-NEXT:    store i8 [[BF_SET]], i8* [[C]], align 2
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st2_check_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.st2* [[M:%.*]], i32 0, i32 1
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[C]], align 2
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BEWIDTH-NEXT:    store i8 [[BF_SET]], i8* [[C]], align 2
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st2_check_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.st2* [[M:%.*]], i32 0, i32 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[C]], align 2
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LEWIDTHNUM-NEXT:    store i8 [[BF_SET]], i8* [[C]], align 2
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st2_check_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST2:%.*]], %struct.st2* [[M:%.*]], i32 0, i32 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[C]], align 2
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BEWIDTHNUM-NEXT:    store i8 [[BF_SET]], i8* [[C]], align 2
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st2_check_store(struct st2 *m) {
   m->c = 1;
 }
 // Volatile access is allowed to use 16 bits

 int st3_check_load(struct st3 *m) {
   return m->c;
 }
 
 // LE-LABEL: @st3_check_store(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st3* [[M:%.*]] to i8*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP0]], align 2
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LE-NEXT:    store volatile i8 [[BF_SET]], i8* [[TMP0]], align 2
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st3_check_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st3* [[M:%.*]] to i8*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP0]], align 2
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BE-NEXT:    store volatile i8 [[BF_SET]], i8* [[TMP0]], align 2
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st3_check_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st3* [[M:%.*]] to i8*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP0]], align 2
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -128
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -128
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LENUMLOADS-NEXT:    store volatile i8 [[BF_SET]], i8* [[TMP0]], align 2
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st3_check_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st3* [[M:%.*]] to i8*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP0]], align 2
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 1
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 1
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // BENUMLOADS-NEXT:    store volatile i8 [[BF_SET]], i8* [[TMP0]], align 2
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st3_check_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st3* [[M:%.*]] to i16*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 2
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -128
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -128
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LEWIDTH-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 2
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st3_check_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st3* [[M:%.*]] to i16*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 2
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 511
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 511
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 512
 // BEWIDTH-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 2
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st3_check_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st3* [[M:%.*]] to i16*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 2
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -128
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -128
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LEWIDTHNUM-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 2
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st3_check_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st3* [[M:%.*]] to i16*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 2
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 511
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 511
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 512
 // BEWIDTHNUM-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 2
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st3_check_store(struct st3 *m) {
   m->c = 1;
 }
 // Volatile access to st4.c should use a char ld/st

 int st4_check_load(struct st4 *m) {
   return m->c;
 }
 
 // LE-LABEL: @st4_check_store(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -15873
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -15873
 // LE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 512
 // LE-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st4_check_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -125
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -125
 // BE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 4
 // BE-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st4_check_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -15873
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -15873
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 512
 // LENUMLOADS-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st4_check_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -125
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -125
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 4
 // BENUMLOADS-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st4_check_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i8*
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i32 1
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP1]], align 1
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -63
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -63
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // LEWIDTH-NEXT:    store volatile i8 [[BF_SET]], i8* [[TMP1]], align 1
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st4_check_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i8*
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i32 1
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP1]], align 1
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -125
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -125
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 4
 // BEWIDTH-NEXT:    store volatile i8 [[BF_SET]], i8* [[TMP1]], align 1
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st4_check_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i8*
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i32 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP1]], align 1
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -63
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -63
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 2
 // LEWIDTHNUM-NEXT:    store volatile i8 [[BF_SET]], i8* [[TMP1]], align 1
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st4_check_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i8*
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i32 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP1]], align 1
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -125
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -125
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 4
 // BEWIDTHNUM-NEXT:    store volatile i8 [[BF_SET]], i8* [[TMP1]], align 1
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st4_check_store(struct st4 *m) {
   m->c = 1;
 }
 
 // LE-LABEL: @st4_check_nonv_store(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -512
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -512
 // LE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LE-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st4_check_nonv_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 127
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 127
 // BE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 128
 // BE-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st4_check_nonv_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -512
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -512
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LENUMLOADS-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st4_check_nonv_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 127
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 127
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 128
 // BENUMLOADS-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st4_check_nonv_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -512
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -512
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LEWIDTH-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st4_check_nonv_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 127
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 127
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 128
 // BEWIDTH-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st4_check_nonv_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -512
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -512
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LEWIDTHNUM-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st4_check_nonv_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st4* [[M:%.*]] to i16*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 127
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 127
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 128
 // BEWIDTHNUM-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st4_check_nonv_store(struct st4 *m) {
   m->b = 1;
 }
 

 int st5_check_load(struct st5 *m) {
   return m->c;
 }
 
 // LE-LABEL: @st5_check_store(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST5:%.*]], %struct.st5* [[M:%.*]], i32 0, i32 1
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[C]], align 2
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -32
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -32
 // LE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LE-NEXT:    store volatile i8 [[BF_SET]], i8* [[C]], align 2
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st5_check_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST5:%.*]], %struct.st5* [[M:%.*]], i32 0, i32 1
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[C]], align 2
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 7
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 7
 // BE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 8
 // BE-NEXT:    store volatile i8 [[BF_SET]], i8* [[C]], align 2
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st5_check_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST5:%.*]], %struct.st5* [[M:%.*]], i32 0, i32 1
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[C]], align 2
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -32
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -32
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LENUMLOADS-NEXT:    store volatile i8 [[BF_SET]], i8* [[C]], align 2
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st5_check_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST5:%.*]], %struct.st5* [[M:%.*]], i32 0, i32 1
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[C]], align 2
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 7
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 7
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 8
 // BENUMLOADS-NEXT:    store volatile i8 [[BF_SET]], i8* [[C]], align 2
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st5_check_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST5:%.*]], %struct.st5* [[M:%.*]], i32 0, i32 1
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[C]], align 2
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -32
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -32
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LEWIDTH-NEXT:    store volatile i8 [[BF_SET]], i8* [[C]], align 2
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st5_check_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST5:%.*]], %struct.st5* [[M:%.*]], i32 0, i32 1
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[C]], align 2
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 7
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 7
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 8
 // BEWIDTH-NEXT:    store volatile i8 [[BF_SET]], i8* [[C]], align 2
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st5_check_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST5:%.*]], %struct.st5* [[M:%.*]], i32 0, i32 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[C]], align 2
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -32
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -32
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 1
 // LEWIDTHNUM-NEXT:    store volatile i8 [[BF_SET]], i8* [[C]], align 2
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st5_check_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST5:%.*]], %struct.st5* [[M:%.*]], i32 0, i32 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[C]], align 2
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 7
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 7
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 8
 // BEWIDTHNUM-NEXT:    store volatile i8 [[BF_SET]], i8* [[C]], align 2
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st5_check_store(struct st5 *m) {
   m->c = 1;
 }
 
int st6_check_load(volatile struct st6 *m) {
   x += m->c;
   return x;
 }
 
 // LE-LABEL: @st6_check_store(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st6* [[M:%.*]] to i16*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -4096
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -4096
 // LE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LE-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LE-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST6:%.*]], %struct.st6* [[M]], i32 0, i32 1
 // LE-NEXT:    store i8 2, i8* [[B]], align 2
 // LE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST6]], %struct.st6* [[M]], i32 0, i32 2
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[C]], align 1
-// LE-NEXT:    [[BF_CLEAR2:%.*]] = and i8 [[BF_LOAD1]], -32
-// LE-NEXT:    [[BF_SET3:%.*]] = or i8 [[BF_CLEAR2]], 3
-// LE-NEXT:    store i8 [[BF_SET3]], i8* [[C]], align 1
+// LE-NEXT:    [[BF_FREEZE2:%.*]] = freeze i8 [[BF_LOAD1]]
+// LE-NEXT:    [[BF_CLEAR3:%.*]] = and i8 [[BF_FREEZE2]], -32
+// LE-NEXT:    [[BF_SET4:%.*]] = or i8 [[BF_CLEAR3]], 3
+// LE-NEXT:    store i8 [[BF_SET4]], i8* [[C]], align 1
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st6_check_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st6* [[M:%.*]] to i16*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 15
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 15
 // BE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 16
 // BE-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BE-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST6:%.*]], %struct.st6* [[M]], i32 0, i32 1
 // BE-NEXT:    store i8 2, i8* [[B]], align 2
 // BE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST6]], %struct.st6* [[M]], i32 0, i32 2
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[C]], align 1
-// BE-NEXT:    [[BF_CLEAR2:%.*]] = and i8 [[BF_LOAD1]], 7
-// BE-NEXT:    [[BF_SET3:%.*]] = or i8 [[BF_CLEAR2]], 24
-// BE-NEXT:    store i8 [[BF_SET3]], i8* [[C]], align 1
+// BE-NEXT:    [[BF_FREEZE2:%.*]] = freeze i8 [[BF_LOAD1]]
+// BE-NEXT:    [[BF_CLEAR3:%.*]] = and i8 [[BF_FREEZE2]], 7
+// BE-NEXT:    [[BF_SET4:%.*]] = or i8 [[BF_CLEAR3]], 24
+// BE-NEXT:    store i8 [[BF_SET4]], i8* [[C]], align 1
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st6_check_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st6* [[M:%.*]] to i16*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -4096
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -4096
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LENUMLOADS-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST6:%.*]], %struct.st6* [[M]], i32 0, i32 1
 // LENUMLOADS-NEXT:    store i8 2, i8* [[B]], align 2
 // LENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST6]], %struct.st6* [[M]], i32 0, i32 2
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[C]], align 1
-// LENUMLOADS-NEXT:    [[BF_CLEAR2:%.*]] = and i8 [[BF_LOAD1]], -32
-// LENUMLOADS-NEXT:    [[BF_SET3:%.*]] = or i8 [[BF_CLEAR2]], 3
-// LENUMLOADS-NEXT:    store i8 [[BF_SET3]], i8* [[C]], align 1
+// LENUMLOADS-NEXT:    [[BF_FREEZE2:%.*]] = freeze i8 [[BF_LOAD1]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR3:%.*]] = and i8 [[BF_FREEZE2]], -32
+// LENUMLOADS-NEXT:    [[BF_SET4:%.*]] = or i8 [[BF_CLEAR3]], 3
+// LENUMLOADS-NEXT:    store i8 [[BF_SET4]], i8* [[C]], align 1
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st6_check_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st6* [[M:%.*]] to i16*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 15
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 15
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 16
 // BENUMLOADS-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST6:%.*]], %struct.st6* [[M]], i32 0, i32 1
 // BENUMLOADS-NEXT:    store i8 2, i8* [[B]], align 2
 // BENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST6]], %struct.st6* [[M]], i32 0, i32 2
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[C]], align 1
-// BENUMLOADS-NEXT:    [[BF_CLEAR2:%.*]] = and i8 [[BF_LOAD1]], 7
-// BENUMLOADS-NEXT:    [[BF_SET3:%.*]] = or i8 [[BF_CLEAR2]], 24
-// BENUMLOADS-NEXT:    store i8 [[BF_SET3]], i8* [[C]], align 1
+// BENUMLOADS-NEXT:    [[BF_FREEZE2:%.*]] = freeze i8 [[BF_LOAD1]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR3:%.*]] = and i8 [[BF_FREEZE2]], 7
+// BENUMLOADS-NEXT:    [[BF_SET4:%.*]] = or i8 [[BF_CLEAR3]], 24
+// BENUMLOADS-NEXT:    store i8 [[BF_SET4]], i8* [[C]], align 1
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st6_check_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st6* [[M:%.*]] to i16*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -4096
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -4096
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LEWIDTH-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST6:%.*]], %struct.st6* [[M]], i32 0, i32 1
 // LEWIDTH-NEXT:    store i8 2, i8* [[B]], align 2
 // LEWIDTH-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST6]], %struct.st6* [[M]], i32 0, i32 2
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[C]], align 1
-// LEWIDTH-NEXT:    [[BF_CLEAR2:%.*]] = and i8 [[BF_LOAD1]], -32
-// LEWIDTH-NEXT:    [[BF_SET3:%.*]] = or i8 [[BF_CLEAR2]], 3
-// LEWIDTH-NEXT:    store i8 [[BF_SET3]], i8* [[C]], align 1
+// LEWIDTH-NEXT:    [[BF_FREEZE2:%.*]] = freeze i8 [[BF_LOAD1]]
+// LEWIDTH-NEXT:    [[BF_CLEAR3:%.*]] = and i8 [[BF_FREEZE2]], -32
+// LEWIDTH-NEXT:    [[BF_SET4:%.*]] = or i8 [[BF_CLEAR3]], 3
+// LEWIDTH-NEXT:    store i8 [[BF_SET4]], i8* [[C]], align 1
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st6_check_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st6* [[M:%.*]] to i16*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 15
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 15
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 16
 // BEWIDTH-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST6:%.*]], %struct.st6* [[M]], i32 0, i32 1
 // BEWIDTH-NEXT:    store i8 2, i8* [[B]], align 2
 // BEWIDTH-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST6]], %struct.st6* [[M]], i32 0, i32 2
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[C]], align 1
-// BEWIDTH-NEXT:    [[BF_CLEAR2:%.*]] = and i8 [[BF_LOAD1]], 7
-// BEWIDTH-NEXT:    [[BF_SET3:%.*]] = or i8 [[BF_CLEAR2]], 24
-// BEWIDTH-NEXT:    store i8 [[BF_SET3]], i8* [[C]], align 1
+// BEWIDTH-NEXT:    [[BF_FREEZE2:%.*]] = freeze i8 [[BF_LOAD1]]
+// BEWIDTH-NEXT:    [[BF_CLEAR3:%.*]] = and i8 [[BF_FREEZE2]], 7
+// BEWIDTH-NEXT:    [[BF_SET4:%.*]] = or i8 [[BF_CLEAR3]], 24
+// BEWIDTH-NEXT:    store i8 [[BF_SET4]], i8* [[C]], align 1
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st6_check_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st6* [[M:%.*]] to i16*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -4096
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -4096
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 1
 // LEWIDTHNUM-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST6:%.*]], %struct.st6* [[M]], i32 0, i32 1
 // LEWIDTHNUM-NEXT:    store i8 2, i8* [[B]], align 2
 // LEWIDTHNUM-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST6]], %struct.st6* [[M]], i32 0, i32 2
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[C]], align 1
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR2:%.*]] = and i8 [[BF_LOAD1]], -32
-// LEWIDTHNUM-NEXT:    [[BF_SET3:%.*]] = or i8 [[BF_CLEAR2]], 3
-// LEWIDTHNUM-NEXT:    store i8 [[BF_SET3]], i8* [[C]], align 1
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE2:%.*]] = freeze i8 [[BF_LOAD1]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR3:%.*]] = and i8 [[BF_FREEZE2]], -32
+// LEWIDTHNUM-NEXT:    [[BF_SET4:%.*]] = or i8 [[BF_CLEAR3]], 3
+// LEWIDTHNUM-NEXT:    store i8 [[BF_SET4]], i8* [[C]], align 1
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st6_check_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st6* [[M:%.*]] to i16*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i16, i16* [[TMP0]], align 4
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], 15
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 15
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 16
 // BEWIDTHNUM-NEXT:    store i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST6:%.*]], %struct.st6* [[M]], i32 0, i32 1
 // BEWIDTHNUM-NEXT:    store i8 2, i8* [[B]], align 2
 // BEWIDTHNUM-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST6]], %struct.st6* [[M]], i32 0, i32 2
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[C]], align 1
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR2:%.*]] = and i8 [[BF_LOAD1]], 7
-// BEWIDTHNUM-NEXT:    [[BF_SET3:%.*]] = or i8 [[BF_CLEAR2]], 24
-// BEWIDTHNUM-NEXT:    store i8 [[BF_SET3]], i8* [[C]], align 1
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE2:%.*]] = freeze i8 [[BF_LOAD1]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR3:%.*]] = and i8 [[BF_FREEZE2]], 7
+// BEWIDTHNUM-NEXT:    [[BF_SET4:%.*]] = or i8 [[BF_CLEAR3]], 24
+// BEWIDTHNUM-NEXT:    store i8 [[BF_SET4]], i8* [[C]], align 1
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st6_check_store(struct st6 *m) {
   m->a = 1;
   m->b = 2;
   m->c = 3;
 }
 

 // LE-NEXT:    [[X:%.*]] = getelementptr inbounds [[STRUCT_ST7B:%.*]], %struct.st7b* [[M:%.*]], i32 0, i32 0
 // LE-NEXT:    store i8 1, i8* [[X]], align 4
 // LE-NEXT:    [[Y:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // LE-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST7A:%.*]], %struct.st7a* [[Y]], i32 0, i32 0
 // LE-NEXT:    store volatile i8 2, i8* [[A]], align 4
 // LE-NEXT:    [[Y1:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // LE-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST7A]], %struct.st7a* [[Y1]], i32 0, i32 1
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[B]], align 1
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -32
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -32
 // LE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 3
 // LE-NEXT:    store volatile i8 [[BF_SET]], i8* [[B]], align 1
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @st7_check_store(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[X:%.*]] = getelementptr inbounds [[STRUCT_ST7B:%.*]], %struct.st7b* [[M:%.*]], i32 0, i32 0
 // BE-NEXT:    store i8 1, i8* [[X]], align 4
 // BE-NEXT:    [[Y:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // BE-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST7A:%.*]], %struct.st7a* [[Y]], i32 0, i32 0
 // BE-NEXT:    store volatile i8 2, i8* [[A]], align 4
 // BE-NEXT:    [[Y1:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // BE-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST7A]], %struct.st7a* [[Y1]], i32 0, i32 1
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[B]], align 1
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 7
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 7
 // BE-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 24
 // BE-NEXT:    store volatile i8 [[BF_SET]], i8* [[B]], align 1
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @st7_check_store(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[X:%.*]] = getelementptr inbounds [[STRUCT_ST7B:%.*]], %struct.st7b* [[M:%.*]], i32 0, i32 0
 // LENUMLOADS-NEXT:    store i8 1, i8* [[X]], align 4
 // LENUMLOADS-NEXT:    [[Y:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // LENUMLOADS-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST7A:%.*]], %struct.st7a* [[Y]], i32 0, i32 0
 // LENUMLOADS-NEXT:    store volatile i8 2, i8* [[A]], align 4
 // LENUMLOADS-NEXT:    [[Y1:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // LENUMLOADS-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST7A]], %struct.st7a* [[Y1]], i32 0, i32 1
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[B]], align 1
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -32
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -32
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 3
 // LENUMLOADS-NEXT:    store volatile i8 [[BF_SET]], i8* [[B]], align 1
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @st7_check_store(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[X:%.*]] = getelementptr inbounds [[STRUCT_ST7B:%.*]], %struct.st7b* [[M:%.*]], i32 0, i32 0
 // BENUMLOADS-NEXT:    store i8 1, i8* [[X]], align 4
 // BENUMLOADS-NEXT:    [[Y:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // BENUMLOADS-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST7A:%.*]], %struct.st7a* [[Y]], i32 0, i32 0
 // BENUMLOADS-NEXT:    store volatile i8 2, i8* [[A]], align 4
 // BENUMLOADS-NEXT:    [[Y1:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // BENUMLOADS-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST7A]], %struct.st7a* [[Y1]], i32 0, i32 1
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[B]], align 1
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 7
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 7
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 24
 // BENUMLOADS-NEXT:    store volatile i8 [[BF_SET]], i8* [[B]], align 1
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @st7_check_store(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[X:%.*]] = getelementptr inbounds [[STRUCT_ST7B:%.*]], %struct.st7b* [[M:%.*]], i32 0, i32 0
 // LEWIDTH-NEXT:    store i8 1, i8* [[X]], align 4
 // LEWIDTH-NEXT:    [[Y:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // LEWIDTH-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST7A:%.*]], %struct.st7a* [[Y]], i32 0, i32 0
 // LEWIDTH-NEXT:    store volatile i8 2, i8* [[A]], align 4
 // LEWIDTH-NEXT:    [[Y1:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // LEWIDTH-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST7A]], %struct.st7a* [[Y1]], i32 0, i32 1
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[B]], align 1
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -32
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -32
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 3
 // LEWIDTH-NEXT:    store volatile i8 [[BF_SET]], i8* [[B]], align 1
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @st7_check_store(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[X:%.*]] = getelementptr inbounds [[STRUCT_ST7B:%.*]], %struct.st7b* [[M:%.*]], i32 0, i32 0
 // BEWIDTH-NEXT:    store i8 1, i8* [[X]], align 4
 // BEWIDTH-NEXT:    [[Y:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // BEWIDTH-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST7A:%.*]], %struct.st7a* [[Y]], i32 0, i32 0
 // BEWIDTH-NEXT:    store volatile i8 2, i8* [[A]], align 4
 // BEWIDTH-NEXT:    [[Y1:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // BEWIDTH-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST7A]], %struct.st7a* [[Y1]], i32 0, i32 1
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[B]], align 1
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 7
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 7
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 24
 // BEWIDTH-NEXT:    store volatile i8 [[BF_SET]], i8* [[B]], align 1
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @st7_check_store(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[X:%.*]] = getelementptr inbounds [[STRUCT_ST7B:%.*]], %struct.st7b* [[M:%.*]], i32 0, i32 0
 // LEWIDTHNUM-NEXT:    store i8 1, i8* [[X]], align 4
 // LEWIDTHNUM-NEXT:    [[Y:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // LEWIDTHNUM-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST7A:%.*]], %struct.st7a* [[Y]], i32 0, i32 0
 // LEWIDTHNUM-NEXT:    store volatile i8 2, i8* [[A]], align 4
 // LEWIDTHNUM-NEXT:    [[Y1:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // LEWIDTHNUM-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST7A]], %struct.st7a* [[Y1]], i32 0, i32 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[B]], align 1
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -32
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -32
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 3
 // LEWIDTHNUM-NEXT:    store volatile i8 [[BF_SET]], i8* [[B]], align 1
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @st7_check_store(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[X:%.*]] = getelementptr inbounds [[STRUCT_ST7B:%.*]], %struct.st7b* [[M:%.*]], i32 0, i32 0
 // BEWIDTHNUM-NEXT:    store i8 1, i8* [[X]], align 4
 // BEWIDTHNUM-NEXT:    [[Y:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // BEWIDTHNUM-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST7A:%.*]], %struct.st7a* [[Y]], i32 0, i32 0
 // BEWIDTHNUM-NEXT:    store volatile i8 2, i8* [[A]], align 4
 // BEWIDTHNUM-NEXT:    [[Y1:%.*]] = getelementptr inbounds [[STRUCT_ST7B]], %struct.st7b* [[M]], i32 0, i32 2
 // BEWIDTHNUM-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST7A]], %struct.st7a* [[Y1]], i32 0, i32 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[B]], align 1
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], 7
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], 7
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 24
 // BEWIDTHNUM-NEXT:    store volatile i8 [[BF_SET]], i8* [[B]], align 1
 // BEWIDTHNUM-NEXT:    ret void
 //
 void st7_check_store(struct st7b *m) {
   m->x = 1;
   m->y.a = 2;
   m->y.b = 3;

 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i8, i8* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    store volatile i8 1, i8* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @store_st9(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st9* [[M:%.*]] to i32*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -256
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -256
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 1
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @store_st9(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st9* [[M:%.*]] to i32*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], 16777215
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 16777215
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 16777216
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @store_st9(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st9* [[M:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -256
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -256
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 1
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @store_st9(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st9* [[M:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], 16777215
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 16777215
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 16777216
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    ret void
 //
 void store_st9(volatile struct st9 *m) {
   m->f = 1;
 }
 

 // LEWIDTH-LABEL: @increment_st9(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st9* [[M:%.*]] to i32*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 24
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -256
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -256
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_st9(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st9* [[M:%.*]] to i32*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 24
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 16777215
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 16777215
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_st9(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st9* [[M:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 24
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -256
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -256
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_st9(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st9* [[M:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 24
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 16777215
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 16777215
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_st9(volatile struct st9 *m) {
   ++m->f;

 int read_st10(volatile struct st10 *m) {
   return m->f;
 }
 
 // LE-LABEL: @store_st10(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i16*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -511
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -511
 // LE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 2
 // LE-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @store_st10(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i16*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -32641
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -32641
 // BE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 128
 // BE-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @store_st10(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i16*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -511
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -511
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 2
 // LENUMLOADS-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @store_st10(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i16*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD]], -32641
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -32641
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], 128
 // BENUMLOADS-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @store_st10(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i32*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -511
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -511
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 2
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @store_st10(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i32*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -2139095041
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -2139095041
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 8388608
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @store_st10(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -511
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -511
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 2
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @store_st10(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -2139095041
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -2139095041
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 8388608
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    ret void
 //
 void store_st10(volatile struct st10 *m) {
   m->f = 1;
 }
 
 // LE-LABEL: @increment_st10(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i16*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i16 [[BF_LOAD]], 7
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i16 [[BF_SHL]], 8
 // LE-NEXT:    [[BF_CAST:%.*]] = sext i16 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = trunc i32 [[INC]] to i16
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i16, i16* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i16 [[TMP1]], 255
 // LE-NEXT:    [[BF_SHL2:%.*]] = shl i16 [[BF_VALUE]], 1
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD1]], -511
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -511
 // LE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], [[BF_SHL2]]
 // LE-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i16 [[BF_VALUE]], 8
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i16 [[BF_RESULT_SHL]], 8
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i16 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_st10(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i16*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i16 [[BF_LOAD]], 1
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i16 [[BF_SHL]], 8
 // BE-NEXT:    [[BF_CAST:%.*]] = sext i16 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = trunc i32 [[INC]] to i16
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i16, i16* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i16 [[TMP1]], 255
 // BE-NEXT:    [[BF_SHL2:%.*]] = shl i16 [[BF_VALUE]], 7
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD1]], -32641
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -32641
 // BE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], [[BF_SHL2]]
 // BE-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i16 [[BF_VALUE]], 8
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i16 [[BF_RESULT_SHL]], 8
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i16 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_st10(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i16*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i16 [[BF_LOAD]], 7
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i16 [[BF_SHL]], 8
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = sext i16 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = trunc i32 [[INC]] to i16
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i16, i16* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i16 [[TMP1]], 255
 // LENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i16 [[BF_VALUE]], 1
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD1]], -511
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -511
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], [[BF_SHL2]]
 // LENUMLOADS-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i16 [[BF_VALUE]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i16 [[BF_RESULT_SHL]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i16 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_st10(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i16*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i16 [[BF_LOAD]], 1
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i16 [[BF_SHL]], 8
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = sext i16 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = trunc i32 [[INC]] to i16
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i16, i16* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i16 [[TMP1]], 255
 // BENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i16 [[BF_VALUE]], 7
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD1]], -32641
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -32641
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], [[BF_SHL2]]
 // BENUMLOADS-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i16 [[BF_VALUE]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i16 [[BF_RESULT_SHL]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i16 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_st10(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i32*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 23
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // LEWIDTH-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 1
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -511
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -511
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_st10(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i32*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 1
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // BEWIDTH-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 23
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -2139095041
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -2139095041
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_st10(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 23
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // LEWIDTHNUM-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 1
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -511
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -511
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_st10(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st10* [[M:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 1
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // BEWIDTHNUM-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 23
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -2139095041
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -2139095041
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_st10(volatile struct st10 *m) {
   ++m->f;

 int read_st12(volatile struct st12 *m) {
   return m->f;
 }
 
 // LE-LABEL: @store_st12(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -16776961
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // LE-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 256
 // LE-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @store_st12(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -16776961
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // BE-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 256
 // BE-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @store_st12(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -16776961
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 256
 // LENUMLOADS-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @store_st12(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -16776961
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 256
 // BENUMLOADS-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @store_st12(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -16776961
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 256
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @store_st12(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -16776961
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 256
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @store_st12(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -16776961
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 256
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @store_st12(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD]], -16776961
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD]]
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], 256
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    ret void
 //
 void store_st12(volatile struct st12 *m) {
   m->f = 1;
 }
 
 // LE-LABEL: @increment_st12(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // LE-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 8
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16776961
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // LE-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // LE-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_st12(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // BE-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 8
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16776961
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // BE-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // BE-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_st12(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // LENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 8
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16776961
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // LENUMLOADS-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_st12(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // BENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 8
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16776961
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // BENUMLOADS-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_st12(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // LEWIDTH-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 8
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16776961
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_st12(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // BEWIDTH-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 8
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16776961
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_st12(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // LEWIDTHNUM-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 8
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16776961
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_st12(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // BEWIDTHNUM-NEXT:    [[BF_SHL2:%.*]] = shl i32 [[BF_VALUE]], 8
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16776961
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16776961
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL2]]
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_st12(volatile struct st12 *m) {
   ++m->f;
 }
 
 // LE-LABEL: @increment_e_st12(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 24
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -256
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -256
 // LE-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LE-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_e_st12(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 24
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 16777215
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 16777215
 // BE-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BE-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_e_st12(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 24
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -256
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -256
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LENUMLOADS-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_e_st12(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 24
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 16777215
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 16777215
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BENUMLOADS-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_e_st12(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 24
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -256
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -256
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_e_st12(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 24
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 16777215
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 16777215
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_e_st12(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 24
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 24
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -256
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -256
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_e_st12(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st12* [[M:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 24
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 255
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 16777215
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 16777215
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 24
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 24
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_e_st12(volatile struct st12 *m) {
   ++m->e;
 }
 
 struct st13 {
   char a : 8;
   int b : 32;
 } __attribute__((packed));
 
 // LE-LABEL: @increment_b_st13(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st13* [[S:%.*]] to i40*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 8
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 255
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 255
 // LE-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // LE-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_b_st13(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st13* [[S:%.*]] to i40*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 8
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 8
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -4294967296
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -4294967296
 // BE-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // BE-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_b_st13(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st13* [[S:%.*]] to i40*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 8
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 255
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 255
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // LENUMLOADS-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_b_st13(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st13* [[S:%.*]] to i40*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 8
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 8
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -4294967296
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -4294967296
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // BENUMLOADS-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_b_st13(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st13* [[S:%.*]] to i40*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 8
 // LEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 255
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 255
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // LEWIDTH-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // LEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_b_st13(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st13* [[S:%.*]] to i40*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 8
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 8
 // BEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -4294967296
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -4294967296
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // BEWIDTH-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // BEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_b_st13(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st13* [[S:%.*]] to i40*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 8
 // LEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 255
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 255
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // LEWIDTHNUM-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_b_st13(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st13* [[S:%.*]] to i40*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 8
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 8
 // BEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -4294967296
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -4294967296
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // BEWIDTHNUM-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_b_st13(volatile struct st13 *s) {

 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LE-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_a_st16(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BE-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_a_st16(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LENUMLOADS-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_a_st16(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BENUMLOADS-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_a_st16(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTH-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_a_st16(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTH-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_a_st16(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTHNUM-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_a_st16(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTHNUM-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_a_st16(struct st16 *s) {
   s->a++;
 }
 
 // LE-LABEL: @increment_b_st16(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LE-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LE-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_b_st16(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BE-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BE-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_b_st16(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LENUMLOADS-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_b_st16(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BENUMLOADS-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_b_st16(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LEWIDTH-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LEWIDTH-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_b_st16(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BEWIDTH-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BEWIDTH-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_b_st16(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LEWIDTHNUM-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LEWIDTHNUM-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_b_st16(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BEWIDTHNUM-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BEWIDTHNUM-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_b_st16(struct st16 *s) {
   s->b++;
 }
 
 // LE-LABEL: @increment_c_st16(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LE-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LE-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_c_st16(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BE-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BE-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_c_st16(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LENUMLOADS-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_c_st16(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BENUMLOADS-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_c_st16(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTH-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_c_st16(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTH-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_c_st16(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTHNUM-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_c_st16(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTHNUM-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_c_st16(struct st16 *s) {
   s->c++;
 }
 
 // LE-LABEL: @increment_d_st16(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LE-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LE-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LE-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_d_st16(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BE-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BE-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BE-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_d_st16(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LENUMLOADS-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_d_st16(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BENUMLOADS-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_d_st16(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LEWIDTH-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LEWIDTH-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_d_st16(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BEWIDTH-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BEWIDTH-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_d_st16(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LEWIDTHNUM-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LEWIDTHNUM-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_d_st16(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load i64, i64* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load i64, i64* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BEWIDTHNUM-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BEWIDTHNUM-NEXT:    store i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_d_st16(struct st16 *s) {
   s->d++;
 }
 
 // LE-LABEL: @increment_v_a_st16(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LE-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_v_a_st16(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BE-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_v_a_st16(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LENUMLOADS-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_v_a_st16(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BENUMLOADS-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_v_a_st16(

 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LE-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LE-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_v_b_st16(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BE-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BE-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_v_b_st16(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LENUMLOADS-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_v_b_st16(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i64*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BENUMLOADS-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_v_b_st16(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i32*
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i32 1
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP1]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 16
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP1]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -65536
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -65536
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP1]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_v_b_st16(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i32*
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i32 1
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP1]], align 4
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 16
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP1]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 65535
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 65535
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP1]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_v_b_st16(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i32 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP1]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 16
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP1]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -65536
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -65536
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP1]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_v_b_st16(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i32 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP1]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 16
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP1]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 65535
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 65535
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP1]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_v_b_st16(volatile struct st16 *s) {
   s->b++;
 }
 
 // LE-LABEL: @increment_v_c_st16(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LE-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LE-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_v_c_st16(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BE-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BE-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_v_c_st16(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294967296
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294967296
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // LENUMLOADS-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_v_c_st16(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i48* [[C]] to i64*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], 4294967295
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL]]
 // BENUMLOADS-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_v_c_st16(

 // LE-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LE-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LE-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_v_d_st16(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BE-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BE-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BE-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BE-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_v_d_st16(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 16
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // LENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 32
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -281470681743361
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -281470681743361
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // LENUMLOADS-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_v_d_st16(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[D:%.*]] = getelementptr inbounds [[STRUCT_ST16:%.*]], %struct.st16* [[S:%.*]], i32 0, i32 1
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i48* [[D]] to i64*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i64, i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i64 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i64 [[BF_SHL]], 48
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i64 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i64
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i64, i64* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i64 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i64 [[TMP1]], 65535
 // BENUMLOADS-NEXT:    [[BF_SHL2:%.*]] = shl i64 [[BF_VALUE]], 16
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_LOAD1]], -4294901761
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i64 [[BF_FREEZE]], -4294901761
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i64 [[BF_CLEAR]], [[BF_SHL2]]
 // BENUMLOADS-NEXT:    store volatile i64 [[BF_SET]], i64* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i64 [[BF_VALUE]], 48
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i64 [[BF_RESULT_SHL]], 48
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i64 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_v_d_st16(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i32*
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i32 3
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP1]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 16
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP1]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -65536
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -65536
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP1]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_v_d_st16(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i32*
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i32 3
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP1]], align 4
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 16
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP1]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 65535
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 65535
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP1]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_v_d_st16(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i32*
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i32 3
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP1]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 16
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 16
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP1]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -65536
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -65536
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP1]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_v_d_st16(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st16* [[S:%.*]] to i32*
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i32 3
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP1]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 16
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP1]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 65535
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 65535
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 65535
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP1]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 16
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 16
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_v_d_st16(volatile struct st16 *s) {
   s->d++;

 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 8
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 8
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -4294967296
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -4294967296
 // LE-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // LE-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_v_b_st17(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 8
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 255
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 255
 // BE-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // BE-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_v_b_st17(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 8
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 8
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -4294967296
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -4294967296
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // LENUMLOADS-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_v_b_st17(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 8
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 255
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 255
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // BENUMLOADS-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_v_b_st17(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 8
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 8
 // LEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -4294967296
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -4294967296
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTH-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // LEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_v_b_st17(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 8
 // BEWIDTH-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTH-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 255
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 255
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTH-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // BEWIDTH-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_v_b_st17(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 8
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 8
 // LEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // LEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -4294967296
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -4294967296
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTHNUM-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_v_b_st17(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 8
 // BEWIDTHNUM-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // BEWIDTHNUM-NEXT:    [[TMP1:%.*]] = zext i32 [[INC]] to i40
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 4294967295
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 255
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 255
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTHNUM-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 8
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 8
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i32
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_v_b_st17(volatile struct st17 *s) {
   s->b++;
 }
 
 // LE-LABEL: @increment_v_c_st17(
 // LE-NEXT:  entry:
 // LE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 32
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i8
 // LE-NEXT:    [[INC:%.*]] = add i8 [[BF_CAST]], 1
 // LE-NEXT:    [[TMP1:%.*]] = zext i8 [[INC]] to i40
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 255
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 32
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 4294967295
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 4294967295
 // LE-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // LE-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 32
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 32
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i8
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_v_c_st17(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 32
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 32
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i8
 // BE-NEXT:    [[INC:%.*]] = add i8 [[BF_CAST]], 1
 // BE-NEXT:    [[TMP1:%.*]] = zext i8 [[INC]] to i40
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 255
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -256
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -256
 // BE-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // BE-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 32
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 32
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i8
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_v_c_st17(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_LOAD]], 32
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i8
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add i8 [[BF_CAST]], 1
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i8 [[INC]] to i40
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 255
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_VALUE]], 32
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], 4294967295
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], 4294967295
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_SHL]]
 // LENUMLOADS-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 32
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i8
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_v_c_st17(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.st17* [[S:%.*]] to i40*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i40, i40* [[TMP0]], align 1
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i40 [[BF_LOAD]], 32
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i40 [[BF_SHL]], 32
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i40 [[BF_ASHR]] to i8
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add i8 [[BF_CAST]], 1
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = zext i8 [[INC]] to i40
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i40, i40* [[TMP0]], align 1
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i40 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i40 [[TMP1]], 255
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_LOAD1]], -256
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i40 [[BF_FREEZE]], -256
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i40 [[BF_CLEAR]], [[BF_VALUE]]
 // BENUMLOADS-NEXT:    store volatile i40 [[BF_SET]], i40* [[TMP0]], align 1
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i40 [[BF_VALUE]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i40 [[BF_RESULT_SHL]], 32
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i40 [[BF_RESULT_ASHR]] to i8
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_v_c_st17(

 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i16, i16* [[TMP1]], align 4
 // LE-NEXT:    [[BF_ASHR2:%.*]] = ashr i16 [[BF_LOAD1]], 8
 // LE-NEXT:    [[BF_CAST:%.*]] = trunc i16 [[BF_ASHR2]] to i8
 // LE-NEXT:    [[CONV3:%.*]] = sext i8 [[BF_CAST]] to i32
 // LE-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV3]], [[CONV]]
 // LE-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i8
 // LE-NEXT:    [[TMP2:%.*]] = zext i8 [[CONV4]] to i16
 // LE-NEXT:    [[BF_LOAD5:%.*]] = load volatile i16, i16* [[TMP1]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD5]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i16 [[TMP2]], 255
 // LE-NEXT:    [[BF_SHL6:%.*]] = shl i16 [[BF_VALUE]], 8
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD5]], 255
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 255
 // LE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], [[BF_SHL6]]
 // LE-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP1]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i16 [[BF_VALUE]], 8
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i16 [[BF_RESULT_SHL]], 8
 // LE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i16 [[BF_RESULT_ASHR]] to i8
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_a_zero_bitfield_ok(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[TMP0:%.*]] = bitcast %struct.zero_bitfield_ok* [[S:%.*]] to i16*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i16 [[BF_LOAD]], 8
 // BE-NEXT:    [[CONV:%.*]] = sext i16 [[BF_ASHR]] to i32
 // BE-NEXT:    [[TMP1:%.*]] = bitcast %struct.zero_bitfield_ok* [[S]] to i16*
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i16, i16* [[TMP1]], align 4
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i16 [[BF_LOAD1]], 8
 // BE-NEXT:    [[BF_ASHR2:%.*]] = ashr i16 [[BF_SHL]], 8
 // BE-NEXT:    [[BF_CAST:%.*]] = trunc i16 [[BF_ASHR2]] to i8
 // BE-NEXT:    [[CONV3:%.*]] = sext i8 [[BF_CAST]] to i32
 // BE-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV3]], [[CONV]]
 // BE-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i8
 // BE-NEXT:    [[TMP2:%.*]] = zext i8 [[CONV4]] to i16
 // BE-NEXT:    [[BF_LOAD5:%.*]] = load volatile i16, i16* [[TMP1]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD5]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i16 [[TMP2]], 255
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD5]], -256
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -256
 // BE-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], [[BF_VALUE]]
 // BE-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP1]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i16 [[BF_VALUE]], 8
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i16 [[BF_RESULT_SHL]], 8
 // BE-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i16 [[BF_RESULT_ASHR]] to i8
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_a_zero_bitfield_ok(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.zero_bitfield_ok* [[S:%.*]] to i16*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i16 [[BF_LOAD]], 8
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i16 [[BF_SHL]], 8
 // LENUMLOADS-NEXT:    [[CONV:%.*]] = sext i16 [[BF_ASHR]] to i32
 // LENUMLOADS-NEXT:    [[TMP1:%.*]] = bitcast %struct.zero_bitfield_ok* [[S]] to i16*
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i16, i16* [[TMP1]], align 4
 // LENUMLOADS-NEXT:    [[BF_ASHR2:%.*]] = ashr i16 [[BF_LOAD1]], 8
 // LENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i16 [[BF_ASHR2]] to i8
 // LENUMLOADS-NEXT:    [[CONV3:%.*]] = sext i8 [[BF_CAST]] to i32
 // LENUMLOADS-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV3]], [[CONV]]
 // LENUMLOADS-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i8
 // LENUMLOADS-NEXT:    [[TMP2:%.*]] = zext i8 [[CONV4]] to i16
 // LENUMLOADS-NEXT:    [[BF_LOAD5:%.*]] = load volatile i16, i16* [[TMP1]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD5]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i16 [[TMP2]], 255
 // LENUMLOADS-NEXT:    [[BF_SHL6:%.*]] = shl i16 [[BF_VALUE]], 8
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD5]], 255
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], 255
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], [[BF_SHL6]]
 // LENUMLOADS-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP1]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i16 [[BF_VALUE]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i16 [[BF_RESULT_SHL]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i16 [[BF_RESULT_ASHR]] to i8
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_a_zero_bitfield_ok(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast %struct.zero_bitfield_ok* [[S:%.*]] to i16*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i16, i16* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i16 [[BF_LOAD]], 8
 // BENUMLOADS-NEXT:    [[CONV:%.*]] = sext i16 [[BF_ASHR]] to i32
 // BENUMLOADS-NEXT:    [[TMP1:%.*]] = bitcast %struct.zero_bitfield_ok* [[S]] to i16*
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i16, i16* [[TMP1]], align 4
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i16 [[BF_LOAD1]], 8
 // BENUMLOADS-NEXT:    [[BF_ASHR2:%.*]] = ashr i16 [[BF_SHL]], 8
 // BENUMLOADS-NEXT:    [[BF_CAST:%.*]] = trunc i16 [[BF_ASHR2]] to i8
 // BENUMLOADS-NEXT:    [[CONV3:%.*]] = sext i8 [[BF_CAST]] to i32
 // BENUMLOADS-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV3]], [[CONV]]
 // BENUMLOADS-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i8
 // BENUMLOADS-NEXT:    [[TMP2:%.*]] = zext i8 [[CONV4]] to i16
 // BENUMLOADS-NEXT:    [[BF_LOAD5:%.*]] = load volatile i16, i16* [[TMP1]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i16 [[BF_LOAD5]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i16 [[TMP2]], 255
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_LOAD5]], -256
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i16 [[BF_FREEZE]], -256
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i16 [[BF_CLEAR]], [[BF_VALUE]]
 // BENUMLOADS-NEXT:    store volatile i16 [[BF_SET]], i16* [[TMP1]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i16 [[BF_VALUE]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i16 [[BF_RESULT_SHL]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_CAST:%.*]] = trunc i16 [[BF_RESULT_ASHR]] to i8
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_a_zero_bitfield_ok(

 // LE-NEXT:  entry:
 // LE-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ZERO_BITFIELD_OK:%.*]], %struct.zero_bitfield_ok* [[S:%.*]], i32 0, i32 1
 // LE-NEXT:    [[TMP0:%.*]] = bitcast i24* [[B]] to i32*
 // LE-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LE-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // LE-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 8
 // LE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LE-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LE-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 16777215
-// LE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16777216
+// LE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16777216
 // LE-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LE-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
 // LE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 8
 // LE-NEXT:    ret void
 //
 // BE-LABEL: @increment_b_zero_bitfield_ok(
 // BE-NEXT:  entry:
 // BE-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ZERO_BITFIELD_OK:%.*]], %struct.zero_bitfield_ok* [[S:%.*]], i32 0, i32 1
 // BE-NEXT:    [[TMP0:%.*]] = bitcast i24* [[B]] to i32*
 // BE-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BE-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 8
 // BE-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BE-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BE-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BE-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 16777215
 // BE-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
-// BE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 255
+// BE-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 255
 // BE-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BE-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BE-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
 // BE-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 8
 // BE-NEXT:    ret void
 //
 // LENUMLOADS-LABEL: @increment_b_zero_bitfield_ok(
 // LENUMLOADS-NEXT:  entry:
 // LENUMLOADS-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ZERO_BITFIELD_OK:%.*]], %struct.zero_bitfield_ok* [[S:%.*]], i32 0, i32 1
 // LENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i24* [[B]] to i32*
 // LENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // LENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 8
 // LENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 16777215
-// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16777216
+// LENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16777216
 // LENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LENUMLOADS-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
 // LENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 8
 // LENUMLOADS-NEXT:    ret void
 //
 // BENUMLOADS-LABEL: @increment_b_zero_bitfield_ok(
 // BENUMLOADS-NEXT:  entry:
 // BENUMLOADS-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ZERO_BITFIELD_OK:%.*]], %struct.zero_bitfield_ok* [[S:%.*]], i32 0, i32 1
 // BENUMLOADS-NEXT:    [[TMP0:%.*]] = bitcast i24* [[B]] to i32*
 // BENUMLOADS-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 8
 // BENUMLOADS-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BENUMLOADS-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BENUMLOADS-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BENUMLOADS-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 16777215
 // BENUMLOADS-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
-// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 255
+// BENUMLOADS-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 255
 // BENUMLOADS-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BENUMLOADS-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BENUMLOADS-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
 // BENUMLOADS-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 8
 // BENUMLOADS-NEXT:    ret void
 //
 // LEWIDTH-LABEL: @increment_b_zero_bitfield_ok(
 // LEWIDTH-NEXT:  entry:
 // LEWIDTH-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ZERO_BITFIELD_OK:%.*]], %struct.zero_bitfield_ok* [[S:%.*]], i32 0, i32 1
 // LEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast i24* [[B]] to i32*
 // LEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // LEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 8
 // LEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 16777215
-// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16777216
+// LEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16777216
 // LEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
 // LEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 8
 // LEWIDTH-NEXT:    ret void
 //
 // BEWIDTH-LABEL: @increment_b_zero_bitfield_ok(
 // BEWIDTH-NEXT:  entry:
 // BEWIDTH-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ZERO_BITFIELD_OK:%.*]], %struct.zero_bitfield_ok* [[S:%.*]], i32 0, i32 1
 // BEWIDTH-NEXT:    [[TMP0:%.*]] = bitcast i24* [[B]] to i32*
 // BEWIDTH-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 8
 // BEWIDTH-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTH-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTH-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTH-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 16777215
 // BEWIDTH-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
-// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 255
+// BEWIDTH-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 255
 // BEWIDTH-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTH-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTH-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
 // BEWIDTH-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 8
 // BEWIDTH-NEXT:    ret void
 //
 // LEWIDTHNUM-LABEL: @increment_b_zero_bitfield_ok(
 // LEWIDTHNUM-NEXT:  entry:
 // LEWIDTHNUM-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ZERO_BITFIELD_OK:%.*]], %struct.zero_bitfield_ok* [[S:%.*]], i32 0, i32 1
 // LEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast i24* [[B]] to i32*
 // LEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_LOAD]], 8
 // LEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_SHL]], 8
 // LEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // LEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// LEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // LEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 16777215
-// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], -16777216
+// LEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], -16777216
 // LEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // LEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
 // LEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 8
 // LEWIDTHNUM-NEXT:    ret void
 //
 // BEWIDTHNUM-LABEL: @increment_b_zero_bitfield_ok(
 // BEWIDTHNUM-NEXT:  entry:
 // BEWIDTHNUM-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ZERO_BITFIELD_OK:%.*]], %struct.zero_bitfield_ok* [[S:%.*]], i32 0, i32 1
 // BEWIDTHNUM-NEXT:    [[TMP0:%.*]] = bitcast i24* [[B]] to i32*
 // BEWIDTHNUM-NEXT:    [[BF_LOAD:%.*]] = load volatile i32, i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_ASHR:%.*]] = ashr i32 [[BF_LOAD]], 8
 // BEWIDTHNUM-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_ASHR]], 1
 // BEWIDTHNUM-NEXT:    [[BF_LOAD1:%.*]] = load volatile i32, i32* [[TMP0]], align 4
+// BEWIDTHNUM-NEXT:    [[BF_FREEZE:%.*]] = freeze i32 [[BF_LOAD1]]
 // BEWIDTHNUM-NEXT:    [[BF_VALUE:%.*]] = and i32 [[INC]], 16777215
 // BEWIDTHNUM-NEXT:    [[BF_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
-// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_LOAD1]], 255
+// BEWIDTHNUM-NEXT:    [[BF_CLEAR:%.*]] = and i32 [[BF_FREEZE]], 255
 // BEWIDTHNUM-NEXT:    [[BF_SET:%.*]] = or i32 [[BF_CLEAR]], [[BF_SHL]]
 // BEWIDTHNUM-NEXT:    store volatile i32 [[BF_SET]], i32* [[TMP0]], align 4
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i32 [[BF_VALUE]], 8
 // BEWIDTHNUM-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i32 [[BF_RESULT_SHL]], 8
 // BEWIDTHNUM-NEXT:    ret void
 //
 void increment_b_zero_bitfield_ok(volatile struct zero_bitfield_ok *s) {
   s->b++;
 }

clang/test/CodeGen/no-bitfield-type-align.c

 // CHECK: %[[BF_LOAD:.*]] = load i32, i32* %[[V1:.*]], align 1
 // CHECK: %[[BF_CLEAR:.*]] = and i32 %[[BF_LOAD]], 32767
 // CHECK: %[[BF_CAST:.*]] = trunc i32 %[[BF_CLEAR]] to i16
 // CHECK: %[[CONV:.*]] = zext i16 %[[BF_CAST]] to i32
 // CHECK: %[[ADD:.*]] = add nsw i32 %[[CONV]], 1
 // CHECK: %[[CONV1:.*]] = trunc i32 %[[ADD]] to i16
 // CHECK: %[[V2:.*]] = zext i16 %[[CONV1]] to i32
 // CHECK: %[[BF_LOAD2:.*]] = load i32, i32* %[[V1]], align 1
+// CHECK: %[[BF_FREEZE:.*]] = freeze i32 %[[BF_LOAD2]]
 // CHECK: %[[BF_VALUE:.*]] = and i32 %[[V2]], 32767
-// CHECK: %[[BF_CLEAR3:.*]] = and i32 %[[BF_LOAD2]], -32768
+// CHECK: %[[BF_CLEAR3:.*]] = and i32 %[[BF_FREEZE]], -32768
 // CHECK: %[[BF_SET:.*]] = or i32 %[[BF_CLEAR3]], %[[BF_VALUE]]
 // CHECK: store i32 %[[BF_SET]], i32* %[[V1]], align 1
 
 // CHECK: %[[BF_LOAD4:.*]] = load i32, i32* %[[V4:.*]], align 1
 // CHECK: %[[BF_LSHR:.*]] = lshr i32 %[[BF_LOAD4]], 15
 // CHECK: %[[BF_CLEAR5:.*]] = and i32 %[[BF_LSHR]], 32767
 // CHECK: %[[BF_CAST6:.*]] = trunc i32 %[[BF_CLEAR5]] to i16
 // CHECK: %[[CONV7:.*]] = zext i16 %[[BF_CAST6]] to i32
 // CHECK: %[[ADD8:.*]] = add nsw i32 %[[CONV7]], 2
 // CHECK: %[[CONV9:.*]] = trunc i32 %[[ADD8]] to i16
 // CHECK: %[[V5:.*]] = zext i16 %[[CONV9]] to i32
 // CHECK: %[[BF_LOAD10:.*]] = load i32, i32* %[[V4]], align 1
+// CHECK: %[[BF_FREEZE11:.*]] = freeze i32 %[[BF_LOAD10]]
 // CHECK: %[[BF_VALUE11:.*]] = and i32 %[[V5]], 32767
 // CHECK: %[[BF_SHL:.*]] = shl i32 %[[BF_VALUE11]], 15
-// CHECK: %[[BF_CLEAR12:.*]] = and i32 %[[BF_LOAD10]], -1073709057
+// CHECK: %[[BF_CLEAR12:.*]] = and i32 %[[BF_FREEZE11]], -1073709057
 // CHECK: %[[BF_SET13:.*]] = or i32 %[[BF_CLEAR12]], %[[BF_SHL]]
 // CHECK: store i32 %[[BF_SET13]], i32* %[[V4]], align 1
 
 void test_zero_width_bitfield(struct S *a) {
   a->f1 += 1;
   a->f2 += 2;
 }

clang/test/CodeGenCXX/alignment.cpp

namespace test0 {
   // in a reference with an assumed alignment of 4.
   // CHECK-LABEL: @_ZN5test01aERNS_1BE
   void a(B &b) {
     // CHECK: [[CALL:%.*]] = call noundef i32 @_Z10int_sourcev()
     // CHECK: [[B_P:%.*]] = load [[B:%.*]]*, [[B]]**
     // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
     // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
     // CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
+    // CHECK: [[FREEZE:%.*]] = freeze i8 [[OLD_VALUE]]
     // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
-    // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
+    // CHECK: [[T1:%.*]] = and i8 [[FREEZE]], -4
     // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
     // CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 4
     b.onebit = int_source();
 
     // CHECK: [[B_P:%.*]] = load [[B]]*, [[B]]**
     // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
     // CHECK: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
     // CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
void b(C &c) {
     // CHECK: [[C_P:%.*]] = load [[C:%.*]]*, [[C]]**
     // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
     // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
     // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
     // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
     // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
     // CHECK-V6COMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
     // CHECK-NOCOMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
+    // CHECK: [[FREEZE:%.*]] = freeze i8 [[OLD_VALUE]]
     // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
-    // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
+    // CHECK: [[T1:%.*]] = and i8 [[FREEZE]], -4
     // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
     // CHECK-V6COMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 2
     // CHECK-NOCOMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 4
     c.onebit = int_source();
 
     // CHECK: [[C_P:%.*]] = load [[C]]*, [[C]]**
     // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
     // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
void c(C *c) {
     // CHECK: [[C_P:%.*]] = load [[C]]*, [[C]]**
     // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
     // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
     // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
     // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
     // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
     // CHECK-V6COMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
     // CHECK-NOCOMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
+    // CHECK: [[FREEZE:%.*]] = freeze i8 [[OLD_VALUE]]
     // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
-    // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
+    // CHECK: [[T1:%.*]] = and i8 [[FREEZE]], -4
     // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
     // CHECK-V6COMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 2
     // CHECK-NOCOMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 4
     c->onebit = int_source();
 
     // CHECK: [[C_P:%.*]] = load [[C:%.*]]*, [[C]]**
     // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
     // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
void d() {
     // CHECK: [[CALL:%.*]] = call noundef i32 @_Z10int_sourcev()
     // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
     // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
     // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
     // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
     // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
     // CHECK-V6COMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
     // CHECK-NOCOMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
+    // CHECK: [[FREEZE:%.*]] = freeze i8 [[OLD_VALUE]]
     // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
-    // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
+    // CHECK: [[T1:%.*]] = and i8 [[FREEZE]], -4
     // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
     // CHECK-V6COMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 2
     // CHECK-NOCOMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 4
     c.onebit = int_source();
 
     // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
     // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
     // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
void e() {
 
     // CHECK: [[CALL:%.*]] = call noundef i32 @_Z10int_sourcev()
     // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
     // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
     // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
     // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
     // CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
     // CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 8
+    // CHECK: [[FREEZE:%.*]] = freeze i8 [[OLD_VALUE]]
     // CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
-    // CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
+    // CHECK: [[T1:%.*]] = and i8 [[FREEZE]], -4
     // CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
     // CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 8
     c.onebit = int_source();
 
     // CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
     // CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
     // CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
     // CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*

clang/test/CodeGenCXX/bitfield.cpp

unsigned read(S* s) {
     // CHECK-PPC64:                 ret i32 %[[ext]]
     return s->b;
   }
   void write(S* s, unsigned x) {
     // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N15write
     // CHECK-X86-64:   %[[ptr:.*]]     = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
     // CHECK-X86-64:   %[[x_trunc:.*]] = trunc i32 %{{.*}} to i8
     // CHECK-X86-64:   %[[old:.*]]     = load i8, i8* %[[ptr]]
+    // CHECK-X86-64:   %[[old_freeze:.*]]  = freeze i8 %[[old]]
     // CHECK-X86-64:   %[[x_and:.*]]   = and i8 %[[x_trunc]], 1
-    // CHECK-X86-64:   %[[old_and:.*]] = and i8 %[[old]], -2
+    // CHECK-X86-64:   %[[old_and:.*]] = and i8 %[[old_freeze]], -2
     // CHECK-X86-64:   %[[new:.*]]     = or i8 %[[old_and]], %[[x_and]]
     // CHECK-X86-64:                     store i8 %[[new]], i8* %[[ptr]]
     // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N15write
     // CHECK-PPC64:   %[[ptr:.*]]     = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
     // CHECK-PPC64:   %[[x_trunc:.*]] = trunc i32 %{{.*}} to i8
     // CHECK-PPC64:   %[[old:.*]]     = load i8, i8* %[[ptr]]
+    // CHECK-PPC64:   %[[old_freeze:.*]] = freeze i8 %[[old]]
     // CHECK-PPC64:   %[[x_and:.*]]   = and i8 %[[x_trunc]], 1
     // CHECK-PPC64:   %[[x_shl:.*]]   = shl i8 %[[x_and]], 7
-    // CHECK-PPC64:   %[[old_and:.*]] = and i8 %[[old]], 127
+    // CHECK-PPC64:   %[[old_and:.*]] = and i8 %[[old_freeze]], 127
     // CHECK-PPC64:   %[[new:.*]]     = or i8 %[[old_and]], %[[x_shl]]
     // CHECK-PPC64:                     store i8 %[[new]], i8* %[[ptr]]
     s->b = x;
   }
 }
 
 namespace N2 {
   // Do widen loads and stores to bitfields when those bitfields have padding
unsigned read(S* s) {
     // CHECK-PPC64:   %[[shr:.*]] = lshr i32 %[[val]], 8
     // CHECK-PPC64:                 ret i32 %[[shr]]
     return s->b;
   }
   void write(S* s, unsigned x) {
     // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N25write
     // CHECK-X86-64:   %[[ptr:.*]]     = bitcast %{{.*}}* %{{.*}} to i32*
     // CHECK-X86-64:   %[[old:.*]]     = load i32, i32* %[[ptr]]
+    // CHECK-X86-64:   %[[old_freeze:.*]] = freeze i32 %[[old]]
     // CHECK-X86-64:   %[[x_and:.*]]   = and i32 %{{.*}}, 16777215
-    // CHECK-X86-64:   %[[old_and:.*]] = and i32 %[[old]], -16777216
+    // CHECK-X86-64:   %[[old_and:.*]] = and i32 %[[old_freeze]], -16777216
     // CHECK-X86-64:   %[[new:.*]]     = or i32 %[[old_and]], %[[x_and]]
     // CHECK-X86-64:                     store i32 %[[new]], i32* %[[ptr]]
     // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N25write
     // CHECK-PPC64:   %[[ptr:.*]]     = bitcast %{{.*}}* %{{.*}} to i32*
     // CHECK-PPC64:   %[[old:.*]]     = load i32, i32* %[[ptr]]
+    // CHECK-PPC64    %[[old_freeze:.*]] = freeze i32 %[[old]]
     // CHECK-PPC64:   %[[x_and:.*]]   = and i32 %{{.*}}, 16777215
     // CHECK-PPC64:   %[[x_shl:.*]]   = shl i32 %[[x_and]], 8
-    // CHECK-PPC64:   %[[old_and:.*]] = and i32 %[[old]], 255
+    // CHECK-PPC64:   %[[old_and:.*]] = and i32 %[[old_freeze]], 255
     // CHECK-PPC64:   %[[new:.*]]     = or i32 %[[old_and]], %[[x_shl]]
     // CHECK-PPC64:                     store i32 %[[new]], i32* %[[ptr]]
     s->b = x;
   }
 }
 
 namespace N3 {
   // Do widen loads and stores to bitfields through the trailing padding at the
unsigned read(S* s) {
     // CHECK-PPC64:   %[[shr:.*]] = lshr i32 %[[val]], 8
     // CHECK-PPC64:                 ret i32 %[[shr]]
     return s->b;
   }
   void write(S* s, unsigned x) {
     // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N35write
     // CHECK-X86-64:   %[[ptr:.*]]     = bitcast %{{.*}}* %{{.*}} to i32*
     // CHECK-X86-64:   %[[old:.*]]     = load i32, i32* %[[ptr]]
+    // CHECK-X86_64:   %[[old_freeze:.*]] = freeze i32 %[[old]]
     // CHECK-X86-64:   %[[x_and:.*]]   = and i32 %{{.*}}, 16777215
-    // CHECK-X86-64:   %[[old_and:.*]] = and i32 %[[old]], -16777216
+    // CHECK-X86-64:   %[[old_and:.*]] = and i32 %[[old_freeze]], -16777216
     // CHECK-X86-64:   %[[new:.*]]     = or i32 %[[old_and]], %[[x_and]]
     // CHECK-X86-64:                     store i32 %[[new]], i32* %[[ptr]]
     // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N35write
     // CHECK-PPC64:   %[[ptr:.*]]     = bitcast %{{.*}}* %{{.*}} to i32*
     // CHECK-PPC64:   %[[old:.*]]     = load i32, i32* %[[ptr]]
+    // CHECK-PPC64    %[[old_freeze:.*]] = freeze i32 %[[old]]
     // CHECK-PPC64:   %[[x_and:.*]]   = and i32 %{{.*}}, 16777215
     // CHECK-PPC64:   %[[x_shl:.*]]   = shl i32 %[[x_and]], 8
-    // CHECK-PPC64:   %[[old_and:.*]] = and i32 %[[old]], 255
+    // CHECK-PPC64:   %[[old_and:.*]] = and i32 %[[old_freeze]], 255
     // CHECK-PPC64:   %[[new:.*]]     = or i32 %[[old_and]], %[[x_shl]]
     // CHECK-PPC64:                     store i32 %[[new]], i32* %[[ptr]]
     s->b = x;
   }
 }
 
 namespace N4 {
   // Do NOT widen loads and stores to bitfields into padding at the end of
unsigned read(U* u) {
     // CHECK-PPC64:   %[[shr:.*]] = lshr i32 %[[val]], 8
     // CHECK-PPC64:                 ret i32 %[[shr]]
     return u->y.b;
   }
   void write(U* u, unsigned x) {
     // CHECK-X86-64-LABEL: define{{.*}} void @_ZN2N55write
     // CHECK-X86-64:   %[[ptr:.*]]     = bitcast %{{.*}}* %{{.*}} to i32*
     // CHECK-X86-64:   %[[old:.*]]     = load i32, i32* %[[ptr]]
+    // CHECK-X86-64:   %[[old_freeze:.*]] = freeze i32 %[[old]]
     // CHECK-X86-64:   %[[x_and:.*]]   = and i32 %{{.*}}, 16777215
-    // CHECK-X86-64:   %[[old_and:.*]] = and i32 %[[old]], -16777216
+    // CHECK-X86-64:   %[[old_and:.*]] = and i32 %[[old_freeze]], -16777216
     // CHECK-X86-64:   %[[new:.*]]     = or i32 %[[old_and]], %[[x_and]]
     // CHECK-X86-64:                     store i32 %[[new]], i32* %[[ptr]]
     // CHECK-PPC64-LABEL: define{{.*}} void @_ZN2N55write
     // CHECK-PPC64:   %[[ptr:.*]]     = bitcast %{{.*}}* %{{.*}} to i32*
     // CHECK-PPC64:   %[[old:.*]]     = load i32, i32* %[[ptr]]
+    // CHECK-PPC64    %[[old_freeze:.*]] = freeze i32 %[[old]]
     // CHECK-PPC64:   %[[x_and:.*]]   = and i32 %{{.*}}, 16777215
     // CHECK-PPC64:   %[[x_shl:.*]]   = shl i32 %[[x_and]], 8
-    // CHECK-PPC64:   %[[old_and:.*]] = and i32 %[[old]], 255
+    // CHECK-PPC64:   %[[old_and:.*]] = and i32 %[[old_freeze]], 255
     // CHECK-PPC64:   %[[new:.*]]     = or i32 %[[old_and]], %[[x_shl]]
     // CHECK-PPC64:                     store i32 %[[new]], i32* %[[ptr]]
     u->y.b = x;
   }
 }
 
 namespace N6 {
   // Zero-length bitfields partition the memory locations of bitfields for the

clang/test/CodeGenCXX/ext-int.cpp

void BitfieldAssignment() {
   BitFieldsByte B;
   B.A = 3;
   B.B = 2;
   B.C = 1;
   // First one is used for the lifetime start, skip that.
   // CHECK: bitcast %struct.BitFieldsByte*
   // CHECK: %[[BFType:.+]] = bitcast %struct.BitFieldsByte*
   // CHECK: %[[LOADA:.+]] = load i8, i8* %[[BFType]]
-  // CHECK: %[[CLEARA:.+]] = and i8 %[[LOADA]], -8
+  // CHECK: %[[FREEZEA:.+]] = freeze i8 %[[LOADA]]
+  // CHECK: %[[CLEARA:.+]] = and i8 %[[FREEZEA]], -8
   // CHECK: %[[SETA:.+]] = or i8 %[[CLEARA]], 3
   // CHECK: %[[BFType:.+]] = bitcast %struct.BitFieldsByte*
   // CHECK: %[[LOADB:.+]] = load i8, i8* %[[BFType]]
-  // CHECK: %[[CLEARB:.+]] = and i8 %[[LOADB]], -57
+  // CHECK: %[[FREEZEB:.+]] = freeze i8 %[[LOADB]]
+  // CHECK: %[[CLEARB:.+]] = and i8 %[[FREEZEB]], -57
   // CHECK: %[[SETB:.+]] = or i8 %[[CLEARB]], 16
   // CHECK: %[[BFType:.+]] = bitcast %struct.BitFieldsByte*
   // CHECK: %[[LOADC:.+]] = load i8, i8* %[[BFType]]
-  // CHECK: %[[CLEARC:.+]] = and i8 %[[LOADC]], 63
+  // CHECK: %[[FREEZEC:.+]] = freeze i8 %[[LOADC]]
+  // CHECK: %[[CLEARC:.+]] = and i8 %[[FREEZEC]], 63
   // CHECK: %[[SETC:.+]] = or i8 %[[CLEARC]], 64
 }
 
 enum AsEnumUnderlyingType : _BitInt(9) {
   A,B,C
 };
 
 void UnderlyingTypeUsage(AsEnumUnderlyingType Param) {

clang/test/CodeGenCXX/finegrain-bitfield-access.cpp

unsigned read8_1() {
   return a1.f3;
 }
 void write8_1() {
   // CHECK-LABEL: @_Z8write8_1v
   // CHECK: store i8 3, i8* getelementptr inbounds (%struct.S1, %struct.S1* @a1, i32 0, i32 1), align 1
   // CHECK-NEXT: ret void
   // SANITIZE-LABEL: @_Z8write8_1v
   // SANITIZE: %bf.load = load i32, i32* getelementptr inbounds {{.*}}, align 4
-  // SANITIZE-NEXT: %bf.clear = and i32 %bf.load, -65281
+  // SANITIZE: %bf.freeze = freeze i32 %bf.load
+  // SANITIZE-NEXT: %bf.clear = and i32 %bf.freeze, -65281
   // SANITIZE-NEXT: %bf.set = or i32 %bf.clear, 768
   // SANITIZE-NEXT: store i32 %bf.set, i32* getelementptr inbounds {{.*}}, align 4
   // SANITIZE-NEXT: ret void
   a1.f3 = 3;
 }
 
 unsigned read8_2() {
   // CHECK-LABEL: @_Z7read8_2v
   // CHECK: %bf.load = load i16, i16* getelementptr inbounds (%struct.S1, %struct.S1* @a1, i32 0, i32 2), align 2
   // CHECK-NEXT: %bf.lshr = lshr i16 %bf.load, 4
   // CHECK-NEXT: %bf.clear = and i16 %bf.lshr, 255
   // CHECK-NEXT: %bf.cast = zext i16 %bf.clear to i32
   // CHECK-NEXT: ret i32 %bf.cast
   // SANITIZE-LABEL: @_Z7read8_2v
   // SANITIZE: %bf.load = load i32, i32* getelementptr inbounds {{.*}}, align 4
   // SANITIZE-NEXT: %bf.lshr = lshr i32 %bf.load, 20
   // SANITIZE-NEXT: %bf.clear = and i32 %bf.lshr, 255
   // SANITIZE-NEXT: ret i32 %bf.clear
   return a1.f5;
 }
 void write8_2() {
   // CHECK-LABEL: @_Z8write8_2v
   // CHECK: %bf.load = load i16, i16* getelementptr inbounds (%struct.S1, %struct.S1* @a1, i32 0, i32 2), align 2
-  // CHECK-NEXT: %bf.clear = and i16 %bf.load, -4081
+  // CHECK-NEXT: %bf.freeze = freeze i16 %bf.load
+  // CHECK-NEXT: %bf.clear = and i16 %bf.freeze, -4081
   // CHECK-NEXT: %bf.set = or i16 %bf.clear, 48
   // CHECK-NEXT: store i16 %bf.set, i16* getelementptr inbounds (%struct.S1, %struct.S1* @a1, i32 0, i32 2), align 2
   // CHECK-NEXT: ret void
   // SANITIZE-LABEL: @_Z8write8_2v
   // SANITIZE: %bf.load = load i32, i32* getelementptr inbounds {{.*}}, align 4
-  // SANITIZE-NEXT: %bf.clear = and i32 %bf.load, -267386881
+  // SANITIZE-NEXT: %bf.freeze = freeze i32 %bf.load
+  // SANITIZE-NEXT: %bf.clear = and i32 %bf.freeze, -267386881
   // SANITIZE-NEXT: %bf.set = or i32 %bf.clear, 3145728
   // SANITIZE-NEXT: store i32 %bf.set, i32* getelementptr inbounds {{.*}}, align 4
   // SANITIZE-NEXT: ret void
   a1.f5 = 3;
 }
 
 struct S2 {
   unsigned long f1:16;

 }
 
 void write16_1() {
   // CHECK-LABEL: @_Z9write16_1v
   // CHECK: store i16 5, i16* getelementptr inbounds (%struct.S2, %struct.S2* @a2, i32 0, i32 0), align 8
   // CHECK-NEXT: ret void
   // SANITIZE-LABEL: @_Z9write16_1v
   // SANITIZE: %bf.load = load i64, i64* bitcast {{.*}}, align 8
-  // SANITIZE-NEXT: %bf.clear = and i64 %bf.load, -65536
+  // SANITIZE-NEXT: %bf.freeze = freeze i64 %bf.load
+  // SANITIZE-NEXT: %bf.clear = and i64 %bf.freeze, -65536
   // SANITIZE-NEXT: %bf.set = or i64 %bf.clear, 5
   // SANITIZE-NEXT: store i64 %bf.set, i64* bitcast {{.*}}, align 8
   // SANITIZE-NEXT: ret void
   a2.f1 = 5;
 }
 void write16_2() {
   // CHECK-LABEL: @_Z9write16_2v
   // CHECK: store i16 5, i16* getelementptr inbounds (%struct.S2, %struct.S2* @a2, i32 0, i32 1), align 2
   // CHECK-NEXT: ret void
   // SANITIZE-LABEL: @_Z9write16_2v
   // SANITIZE: %bf.load = load i64, i64* bitcast {{.*}}, align 8
-  // SANITIZE-NEXT: %bf.clear = and i64 %bf.load, -4294901761
+  // SANITIZE-NEXT: %bf.freeze = freeze i64 %bf.load
+  // SANITIZE-NEXT: %bf.clear = and i64 %bf.freeze, -4294901761
   // SANITIZE-NEXT: %bf.set = or i64 %bf.clear, 327680
   // SANITIZE-NEXT: store i64 %bf.set, i64* bitcast {{.*}}, align 8
   // SANITIZE-NEXT: ret void
   a2.f2 = 5;
 }
 
 struct S3 {
   unsigned long f1:14;
unsigned read32_1() {
   return a3.f3;
 }
 void write32_1() {
   // CHECK-LABEL: @_Z9write32_1v
   // CHECK: store i32 5, i32* getelementptr inbounds (%struct.S3, %struct.S3* @a3, i32 0, i32 1), align 4
   // CHECK-NEXT: ret void
   // SANITIZE-LABEL: @_Z9write32_1v
   // SANITIZE: %bf.load = load i64, i64* getelementptr inbounds {{.*}}, align 8
-  // SANITIZE-NEXT: %bf.clear = and i64 %bf.load, 4294967295
+  // SANITIZE-NEXT: %bf.freeze = freeze i64 %bf.load
+  // SANITIZE-NEXT: %bf.clear = and i64 %bf.freeze, 4294967295
   // SANITIZE-NEXT: %bf.set = or i64 %bf.clear, 21474836480
   // SANITIZE-NEXT: store i64 %bf.set, i64* getelementptr inbounds {{.*}}, align 8
   // SANITIZE-NEXT: ret void
   a3.f3 = 5;
 }

clang/test/CodeGenCXX/ignored-bitfield-conditional.cpp

void use(bool cond, struct S s1, struct S s2, int val1, int val2) {
   // CHECK: %[[TO_BOOL:.+]] = trunc i8 %[[CONDLD]] to i1
   // CHECK: br i1 %[[TO_BOOL]], label %[[TRUE:.+]], label %[[FALSE:.+]]
 
   // 'True', branch set the BF, branch to 'end'.
   // CHECK: [[TRUE]]:
   // CHECK: %[[VAL1LD:.+]] = load i32, ptr %[[VAL1]]
   // CHECK: %[[VAL1TRUNC:.+]] = trunc i32 %[[VAL1LD]] to i16
   // CHECK: %[[BF_LOAD:.+]] = load i16, ptr %[[S1]]
+  // CHECK: %[[BF_FREEZE:.+]] = freeze i16 %[[BF_LOAD]]
   // CHECK: %[[BF_VAL:.+]] = and i16 %[[VAL1TRUNC]], 31
-  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_LOAD]], -32
+  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_FREEZE]], -32
   // CHECK: %[[BF_SET:.+]] = or i16 %[[BF_CLEAR]], %[[BF_VAL]]
   // CHECK: store i16 %[[BF_SET]], ptr %[[S1]]
   // CHECK: br label %[[END:.+]]
 
   // 'False', branch set the OTHER BF, branch to 'end'.
   // CHECK: [[FALSE]]:
   // CHECK: %[[VAL2LD:.+]] = load i32, ptr %[[VAL2]]
   // CHECK: %[[VAL2TRUNC:.+]] = trunc i32 %[[VAL2LD]] to i16
   // CHECK: %[[BF_LOAD:.+]] = load i16, ptr %[[S1]]
+  // CHECK: %[[BF_FREEZE:.+]] = freeze i16 %[[BF_LOAD]]
   // CHECK: %[[BF_VAL:.+]] = and i16 %[[VAL2TRUNC]], 63 
   // CHECK: %[[BF_SHIFT:.+]] = shl i16 %[[BF_VAL]], 5
-  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_LOAD]], -2017
+  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_FREEZE]], -2017
   // CHECK: %[[BF_SET:.+]] = or i16 %[[BF_CLEAR]], %[[BF_SHIFT]]
   // CHECK: store i16 %[[BF_SET]], ptr %[[S1]]
   // CHECK: br label %[[END:.+]]
 
   // CHECK: [[END]]:
   // There is nothing in the 'end' block associated with this, but it is the
   // 'continuation' block for the rest of the function.
 
   // Same test, has a no-op cast and parens.
   (void)(cond ? s2.field1 = val1 : s2.field2 = val2);
   // Condition setup, branch.
   // CHECK: %[[CONDLD:.+]] = load i8, ptr %[[COND]]
   // CHECK: %[[TO_BOOL:.+]] = trunc i8 %[[CONDLD]] to i1
   // CHECK: br i1 %[[TO_BOOL]], label %[[TRUE:.+]], label %[[FALSE:.+]]
 
   // 'True', branch set the BF, branch to 'end'.
   // CHECK: [[TRUE]]:
   // CHECK: %[[VAL1LD:.+]] = load i32, ptr %[[VAL1]]
   // CHECK: %[[VAL1TRUNC:.+]] = trunc i32 %[[VAL1LD]] to i16
   // CHECK: %[[BF_LOAD:.+]] = load i16, ptr %[[S2]]
+  // CHECK: %[[BF_FREEZE:.+]] = freeze i16 %[[BF_LOAD]]
   // CHECK: %[[BF_VAL:.+]] = and i16 %[[VAL1TRUNC]], 31
-  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_LOAD]], -32
+  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_FREEZE]], -32
   // CHECK: %[[BF_SET:.+]] = or i16 %[[BF_CLEAR]], %[[BF_VAL]]
   // CHECK: store i16 %[[BF_SET]], ptr %[[S2]]
   // CHECK: br label %[[END:.+]]
 
   // 'False', branch set the OTHER BF, branch to 'end'.
   // CHECK: [[FALSE]]:
   // CHECK: %[[VAL2LD:.+]] = load i32, ptr %[[VAL2]]
   // CHECK: %[[VAL2TRUNC:.+]] = trunc i32 %[[VAL2LD]] to i16
   // CHECK: %[[BF_LOAD:.+]] = load i16, ptr %[[S2]]
+  // CHECK: %[[BF_FREEZE:.+]] = freeze i16 %[[BF_LOAD]]
   // CHECK: %[[BF_VAL:.+]] = and i16 %[[VAL2TRUNC]], 63 
   // CHECK: %[[BF_SHIFT:.+]] = shl i16 %[[BF_VAL]], 5
-  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_LOAD]], -2017
+  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_FREEZE]], -2017
   // CHECK: %[[BF_SET:.+]] = or i16 %[[BF_CLEAR]], %[[BF_SHIFT]]
   // CHECK: store i16 %[[BF_SET]], ptr %[[S2]]
   // CHECK: br label %[[END:.+]]
 
   // CHECK: [[END]]:
   // CHECK-NOT: phi
   // There is nothing in the 'end' block associated with this, but it is the
   // 'continuation' block for the rest of the function.
void use2(bool cond1, bool cond2, struct S s1, int val1, int val2, int val3) {
   // CHECK: %[[TO_BOOL:.+]] = trunc i8 %[[CONDLD]] to i1
   // CHECK: br i1 %[[TO_BOOL]], label %[[TRUE:.+]], label %[[FALSE:.+]]
 
   // First 'True' branch, sets field1 to val1.
   // CHECK: [[TRUE]]:
   // CHECK: %[[VAL1LD:.+]] = load i32, ptr %[[VAL1]]
   // CHECK: %[[VAL1TRUNC:.+]] = trunc i32 %[[VAL1LD]] to i16
   // CHECK: %[[BF_LOAD:.+]] = load i16, ptr %[[S1]]
+  // CHECK: %[[BF_FREEZE:.+]] = freeze i16 %[[BF_LOAD]]
   // CHECK: %[[BF_VAL:.+]] = and i16 %[[VAL1TRUNC]], 31
-  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_LOAD]], -32
+  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_FREEZE]], -32
   // CHECK: %[[BF_SET:.+]] = or i16 %[[BF_CLEAR]], %[[BF_VAL]]
   // CHECK: store i16 %[[BF_SET]], ptr %[[S1]]
   // CHECK: br label %[[END:.+]]
 
   // First 'False' branch, starts second ignored expression.
   // CHECK: [[FALSE]]:
   // CHECK: %[[CONDLD:.+]] = load i8, ptr %[[COND2]]
   // CHECK: %[[TO_BOOL:.+]] = trunc i8 %[[CONDLD]] to i1
   // CHECK: br i1 %[[TO_BOOL]], label %[[TRUE2:.+]], label %[[FALSE2:.+]]
 
   // Second 'True' branch, sets field2 to val2.
   // CHECK: [[TRUE2]]:
   // CHECK: %[[VAL2LD:.+]] = load i32, ptr %[[VAL2]]
   // CHECK: %[[VAL2TRUNC:.+]] = trunc i32 %[[VAL2LD]] to i16
   // CHECK: %[[BF_LOAD:.+]] = load i16, ptr %[[S1]]
+  // CHECK: %[[BF_FREEZE:.+]] = freeze i16 %[[BF_LOAD]]
   // CHECK: %[[BF_VAL:.+]] = and i16 %[[VAL2TRUNC]], 63 
   // CHECK: %[[BF_SHIFT:.+]] = shl i16 %[[BF_VAL]], 5
-  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_LOAD]], -2017
+  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_FREEZE]], -2017
   // CHECK: %[[BF_SET:.+]] = or i16 %[[BF_CLEAR]], %[[BF_SHIFT]]
   // CHECK: store i16 %[[BF_SET]], ptr %[[S1]]
   // CHECK: br label %[[END:.+]]
 
   // Second 'False' branch, sets field3 to val3.
   // CHECK: [[FALSE2]]:
   // CHECK: %[[VAL3LD:.+]] = load i32, ptr %[[VAL3]]
   // CHECK: %[[VAL3TRUNC:.+]] = trunc i32 %[[VAL3LD]] to i16
   // CHECK: %[[BF_LOAD:.+]] = load i16, ptr %[[S1]]
+  // CHECK: %[[BF_FREEZE:.+]] = freeze i16 %[[BF_LOAD]]
   // CHECK: %[[BF_VAL:.+]] = and i16 %[[VAL3TRUNC]], 7
   // CHECK: %[[BF_SHIFT:.+]] = shl i16 %[[BF_VAL]], 11
-  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_LOAD]], -14337
+  // CHECK: %[[BF_CLEAR:.+]] = and i16 %[[BF_FREEZE]], -14337
   // CHECK: %[[BF_SET:.+]] = or i16 %[[BF_CLEAR]], %[[BF_SHIFT]]
   // CHECK: store i16 %[[BF_SET]], ptr %[[S1]]
   // CHECK: br label %[[END:.+]]
 
   // CHECK[[END]]:
   // CHECK-NOT: phi
   // Nothing left to do here.
 }

clang/test/CodeGenCXX/references.cpp

void f() {
     // CHECK-NEXT: load
     // CHECK-NEXT: shl
     // CHECK-NEXT: ashr
     // CHECK-NEXT: store i32
     // CHECK-NEXT: store i32*
     const int &y = x.a;
     // CHECK-NEXT: bitcast
     // CHECK-NEXT: load
+    // CHECK-NEXT: freeze
     // CHECK-NEXT: and
     // CHECK-NEXT: or i32 {{.*}}, 19456
     // CHECK-NEXT: store i32
     x.b = 19;
     // CHECK-NEXT: ret void
   }
 }
 
 namespace N6 {
   extern struct x {char& x;}y;
   int a() { return y.x; }
   // CHECK-LABEL: define{{.*}} i32 @_ZN2N61aEv
   // CHECK: [[REFLOAD3:%.*]] = load i8*, i8** getelementptr inbounds (%"struct.N6::x", %"struct.N6::x"* @_ZN2N61yE, i32 0, i32 0), align 8
   // CHECK: load i8, i8* [[REFLOAD3]], align 1
 }

clang/test/CodeGenObjC/strong-in-c-struct.m

 // CHECK: %[[V55:.*]] = bitcast i8** %[[V1:.*]] to %[[STRUCT_BITFIELD1]]*
 // CHECK: %[[I51:.*]] = getelementptr inbounds %[[STRUCT_BITFIELD1]], %[[STRUCT_BITFIELD1]]* %[[V55]], i32 0, i32 8
 // CHECK: %[[BF_LOAD:.*]] = load volatile i8, i8* %[[I51]], align 8
 // CHECK: %[[BF_SHL:.*]] = shl i8 %[[BF_LOAD]], 5
 // CHECK: %[[BF_ASHR:.*]] = ashr i8 %[[BF_SHL]], 6
 // CHECK: %[[BF_CAST:.*]] = sext i8 %[[BF_ASHR]] to i32
 // CHECK: %[[V56:.*]] = trunc i32 %[[BF_CAST]] to i8
 // CHECK: %[[BF_LOAD2:.*]] = load volatile i8, i8* %[[I5]], align 8
+// CHECK: %[[BF_FREEZE:.*]] = freeze i8 %[[BF_LOAD]]
 // CHECK: %[[BF_VALUE:.*]] = and i8 %[[V56]], 3
 // CHECK: %[[BF_SHL3:.*]] = shl i8 %[[BF_VALUE]], 1
-// CHECK: %[[BF_CLEAR:.*]] = and i8 %[[BF_LOAD2]], -7
+// CHECK: %[[BF_CLEAR:.*]] = and i8 %[[BF_FREEZE]], -7
 // CHECK: %[[BF_SET:.*]] = or i8 %[[BF_CLEAR]], %[[BF_SHL3]]
 // CHECK: store volatile i8 %[[BF_SET]], i8* %[[I5]], align 8
 // CHECK: %[[V57:.*]] = bitcast i8** %[[V0]] to %[[STRUCT_BITFIELD1]]*
 // CHECK: %[[I6:.*]] = getelementptr inbounds %[[STRUCT_BITFIELD1]], %[[STRUCT_BITFIELD1]]* %[[V57]], i32 0, i32 9
 // CHECK: %[[V58:.*]] = bitcast i8** %[[V1]] to %[[STRUCT_BITFIELD1]]*
 // CHECK: %[[I64:.*]] = getelementptr inbounds %[[STRUCT_BITFIELD1]], %[[STRUCT_BITFIELD1]]* %[[V58]], i32 0, i32 9
 // CHECK: %[[V59:.*]] = load volatile i8, i8* %[[I64]], align 1
 // CHECK: store volatile i8 %[[V59]], i8* %[[I6]], align 1

clang/test/OpenMP/atomic_capture_codegen.cpp

 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i32 [[NEW_VAL]]
 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
-// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
+// CHECK: [[BF_CLEAR:%.+]] = and i32 [[BF_FREEZE]], -2147483648
 // CHECK: [[BF_SET:%.+]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i32 [[BF_SET]], i32* [[TEMP1]],
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]],
 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: store i32 [[OLD]], i32* [[TEMP:%.+]],
 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32
 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i32 [[NEW_VAL]]
 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
-// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
+// CHECK: [[BF_CLEAR:%.+]] = and i32 [[BF_FREEZE]], -2147483648
 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8*
 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8*
 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]
 // CHECK: store i32 [[A_ASHR]], i32* @{{.+}},
 #pragma omp atomic capture
   {iv = bfx_packed.a; bfx_packed.a *= ldv;}
 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4
 // CHECK: br label %[[CONT:.+]]
 // CHECK: [[CONT]]
 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i32 [[NEW_VAL]]
 // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1
 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31
-// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647
+// CHECK: [[BF_CLEAR:%.+]] = and i32 [[BF_FREEZE]], 2147483647
 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7
 // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10
 // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32
 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24
 // CHECK: [[BF_LD:%.+]] = load i24, i24* [[BITCAST2]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i24 [[BF_LD]]
 // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383
 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3
-// CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065
+// CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_FREEZE]], -131065
 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i24 %{{.+}}, i24* [[BITCAST2]]
 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8*
 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[BITCAST2]] to i8*
 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]
 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},

 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47
 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63
 // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80
 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32
 // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64
 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i64 [[BF_LD]]
 // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1
 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16
-// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537
+// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_FREEZE]], -65537
 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i64 %{{.+}}, i64* [[TEMP1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7
 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7
 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32
 // CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80
 // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32
 // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8
 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i8 [[BF_LD]]
 // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1
-// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2
+// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_FREEZE]], -2
 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40
 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57
 // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80
 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64
 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i64 [[BF_LD]]
 // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127
 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17
-// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145
+// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_FREEZE]], -16646145
 // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i64 [[VAL]], i64* [[TEMP1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] release monotonic, align 8
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1
 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64
 // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80
 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]]
 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64
 // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8
 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i8 [[BF_LD]]
 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127
 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1
-// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1
+// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_FREEZE]], 1
 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] acquire acquire, align 1
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

clang/test/OpenMP/atomic_update_codegen.cpp

 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i32 [[NEW_VAL]]
 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
-// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
+// CHECK: [[BF_CLEAR:%.+]] = and i32 [[BF_FREEZE]], -2147483648
 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP:%.+]],
 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32
 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i32 [[NEW_VAL]]
 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
-// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
+// CHECK: [[BF_CLEAR:%.+]] = and i32 [[BF_FREEZE]], -2147483648
 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8*
 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8*
 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]
 #pragma omp atomic update
   bfx_packed.a *= ldv;
 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4
 // CHECK: br label %[[CONT:.+]]
 // CHECK: [[CONT]]
 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i32 [[NEW_VAL]]
 // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1
 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31
-// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647
+// CHECK: [[BF_CLEAR:%.+]] = and i32 [[BF_FREEZE]], 2147483647
 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7
 // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10
 // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32
 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24
 // CHECK: [[BF_LD:%.+]] = load i24, i24* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i24 [[BF_LD]]
 // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383
 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3
-// CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065
+// CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_FREEZE]], -131065
 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i24 %{{.+}}, i24* [[TEMP1]]
 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8*
 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP1]] to i8*
 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]
 #pragma omp atomic update

 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47
 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63
 // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32
 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80
 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32
 // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64
 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i64 [[BF_LD]]
 // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1
 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16
-// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537
+// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_FREEZE]], -65537
 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i64 %{{.+}}, i64* [[TEMP1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7
 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7
 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32
 // CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80
 // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32
 // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8
 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i8 [[BF_LD]]
 // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1
-// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2
+// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_FREEZE]], -2
 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]
 #pragma omp atomic relaxed update
   bfx4_packed.a -= ldv;
 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8
 // CHECK: br label %[[CONT:.+]]
 // CHECK: [[CONT]]
 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40
 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57
 // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80
 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]]
 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64
 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i64 [[BF_LD]]
 // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127
 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17
-// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145
+// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_FREEZE]], -16646145
 // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i64 [[VAL]], i64* [[TEMP1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1
 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64
 // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80
 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]]
 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64
 // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8
 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i8 [[BF_LD]]
 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127
 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1
-// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1
+// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_FREEZE]], 1
 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]

clang/test/OpenMP/atomic_write_codegen.c

 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32
 // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8*
 // CHECK: call void @__atomic_load(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST]], i32 noundef 0)
 // CHECK: br label %[[CONT:.+]]
 // CHECK: [[CONT]]
 // CHECK: [[OLD_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]],
 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[LDTEMP1:%.+]],
 // CHECK: [[OLD_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP1]],
+// CHECK: [[BF_FREEZE:%.+]] = freeze i32 [[OLD_BF_VALUE]]
 // CHECK: [[BF_VALUE:%.+]] = and i32 [[NEW_VAL]], 2147483647
-// CHECK: [[BF_CLEAR:%.+]] = and i32 [[OLD_BF_VALUE]], -2147483648
+// CHECK: [[BF_CLEAR:%.+]] = and i32 [[BF_FREEZE]], -2147483648
 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK: store i32 %{{.+}}, i32* [[LDTEMP1]]
 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8*
 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP1]] to i8*
 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
 // CHECK: [[EXIT]]
 #pragma omp atomic write

clang/test/OpenMP/for_lastprivate_codegen.cpp

 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK1-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4

 // CHECK1-NEXT:    [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8
 // CHECK1-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
 // CHECK1-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK1-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 // CHECK1-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
 // CHECK1-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8
+// CHECK1-NEXT:    [[BF_FREEZE9:%.*]] = freeze i8 [[BF_LOAD8]]
 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
-// CHECK1-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
-// CHECK1-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
-// CHECK1-NEXT:    store i8 [[BF_SET10]], i8* [[B6]], align 8
+// CHECK1-NEXT:    [[BF_CLEAR10:%.*]] = and i8 [[BF_FREEZE9]], -16
+// CHECK1-NEXT:    [[BF_SET11:%.*]] = or i8 [[BF_CLEAR10]], [[BF_VALUE]]
+// CHECK1-NEXT:    store i8 [[BF_SET11]], i8* [[B6]], align 8
 // CHECK1-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK1-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK1-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
-// CHECK1-NEXT:    [[C11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
-// CHECK1-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C11]], align 8
+// CHECK1-NEXT:    [[C12:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
+// CHECK1-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C12]], align 8
 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
 // CHECK1-NEXT:    store i32 [[DIV]], i32* [[TMP12]], align 4
 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 // CHECK1:       omp.body.continue:
 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 // CHECK1:       omp.inner.for.inc:
 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK1-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1
-// CHECK1-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
+// CHECK1-NEXT:    [[ADD13:%.*]] = add nsw i32 [[TMP14]], 1
+// CHECK1-NEXT:    store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 // CHECK1:       omp.inner.for.end:
 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 // CHECK1:       omp.loop.exit:
 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
 // CHECK1-NEXT:    ret void
 //

 // CHECK1-NEXT:    store i32 [[TMP31]], i32* [[TMP11]], align 4
 // CHECK1-NEXT:    [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
 // CHECK1-NEXT:    [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1
 // CHECK1-NEXT:    store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1
 // CHECK1-NEXT:    [[TMP34:%.*]] = load i32, i32* [[B11]], align 4
 // CHECK1-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK1-NEXT:    [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK1:       .omp.lastprivate.done:
 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
 // CHECK1-NEXT:    ret void
 //
 //

 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK2-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK2-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK2-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4

 // CHECK2-NEXT:    [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8
 // CHECK2-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
 // CHECK2-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK2-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK2-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 // CHECK2-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
 // CHECK2-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8
+// CHECK2-NEXT:    [[BF_FREEZE9:%.*]] = freeze i8 [[BF_LOAD8]]
 // CHECK2-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
-// CHECK2-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
-// CHECK2-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
-// CHECK2-NEXT:    store i8 [[BF_SET10]], i8* [[B6]], align 8
+// CHECK2-NEXT:    [[BF_CLEAR10:%.*]] = and i8 [[BF_FREEZE9]], -16
+// CHECK2-NEXT:    [[BF_SET11:%.*]] = or i8 [[BF_CLEAR10]], [[BF_VALUE]]
+// CHECK2-NEXT:    store i8 [[BF_SET11]], i8* [[B6]], align 8
 // CHECK2-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK2-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK2-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
-// CHECK2-NEXT:    [[C11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
-// CHECK2-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C11]], align 8
+// CHECK2-NEXT:    [[C12:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
+// CHECK2-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C12]], align 8
 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
 // CHECK2-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
 // CHECK2-NEXT:    store i32 [[DIV]], i32* [[TMP12]], align 4
 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 // CHECK2:       omp.body.continue:
 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 // CHECK2:       omp.inner.for.inc:
 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK2-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1
-// CHECK2-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
+// CHECK2-NEXT:    [[ADD13:%.*]] = add nsw i32 [[TMP14]], 1
+// CHECK2-NEXT:    store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
 // CHECK2:       omp.inner.for.end:
 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 // CHECK2:       omp.loop.exit:
 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
 // CHECK2-NEXT:    ret void
 //

 // CHECK2-NEXT:    store i32 [[TMP31]], i32* [[TMP11]], align 4
 // CHECK2-NEXT:    [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
 // CHECK2-NEXT:    [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1
 // CHECK2-NEXT:    store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1
 // CHECK2-NEXT:    [[TMP34:%.*]] = load i32, i32* [[B11]], align 4
 // CHECK2-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK2-NEXT:    [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK2-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
 // CHECK2-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK2:       .omp.lastprivate.done:
 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
 // CHECK2-NEXT:    ret void
 //
 //

 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK3-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4

 // CHECK3-NEXT:    store i32 [[TMP32]], i32* [[TMP11]], align 4
 // CHECK3-NEXT:    [[TMP33:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
 // CHECK3-NEXT:    [[TMP34:%.*]] = load [4 x i8], [4 x i8]* [[TMP33]], align 1
 // CHECK3-NEXT:    store [4 x i8] [[TMP34]], [4 x i8]* [[TMP12]], align 1
 // CHECK3-NEXT:    [[TMP35:%.*]] = load i32, i32* [[B11]], align 4
 // CHECK3-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP36:%.*]] = trunc i32 [[TMP35]] to i8
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP36]], 15
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK3:       .omp.lastprivate.done:
 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
 // CHECK3-NEXT:    ret void
 //
 //

 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 2
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
 // CHECK3-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
 // CHECK3-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK3-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // CHECK3-NEXT:    [[TMP5:%.*]] = trunc i32 [[INC]] to i8
 // CHECK3-NEXT:    [[BF_LOAD2:%.*]] = load i8, i8* [[B]], align 8
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD2]]
 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD2]], -16
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK3-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK3-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK3-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 3
 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[C]], align 8
 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4

 // CHECK3:       .omp.lastprivate.then:
 // CHECK3-NEXT:    store i32 2, i32* [[B3]], align 4
 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[B3]], align 4
 // CHECK3-NEXT:    store i32 [[TMP19]], i32* [[B]], align 4
 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[B3]], align 4
 // CHECK3-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP21:%.*]] = trunc i32 [[TMP20]] to i8
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B7]], align 8
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP21]], 15
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B7]], align 8
 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK3:       .omp.lastprivate.done:
 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
 // CHECK3-NEXT:    ret void
 //
 //

 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK4-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4

 // CHECK4-NEXT:    store i32 [[TMP34]], i32* [[TMP11]], align 4
 // CHECK4-NEXT:    [[TMP35:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
 // CHECK4-NEXT:    [[TMP36:%.*]] = load [4 x i8], [4 x i8]* [[TMP35]], align 1
 // CHECK4-NEXT:    store [4 x i8] [[TMP36]], [4 x i8]* [[TMP12]], align 1
 // CHECK4-NEXT:    [[TMP37:%.*]] = load i32, i32* [[B11]], align 4
 // CHECK4-NEXT:    [[B18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK4-NEXT:    [[TMP38:%.*]] = trunc i32 [[TMP37]] to i8
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B18]], align 8
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP38]], 15
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B18]], align 8
 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK4:       .omp.lastprivate.done:
 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
 // CHECK4-NEXT:    ret void
 //
 //

 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS]], i32 0, i32 2
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
 // CHECK4-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
 // CHECK4-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK4-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 // CHECK4-NEXT:    [[TMP2:%.*]] = trunc i32 [[DEC]] to i8
 // CHECK4-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[B]], align 8
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD1]]
 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP2]], 15
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD1]], -16
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK4-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK4-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK4-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS]], i32 0, i32 3
 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4

 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
 // CHECK4-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
 // CHECK4-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK4-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 // CHECK4-NEXT:    [[TMP14:%.*]] = trunc i32 [[DEC]] to i8
 // CHECK4-NEXT:    [[BF_LOAD6:%.*]] = load i8, i8* [[B]], align 8
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD6]]
 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP14]], 15
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD6]], -16
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK4-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK4-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK4-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32*, i32** [[_TMP4]], align 8
 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP16]], 1

 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK5-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK5-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK5-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
-// CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK5-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK5-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK5-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK5-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK5-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4

 // CHECK5-NEXT:    [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK5-NEXT:    [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8
 // CHECK5-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
 // CHECK5-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK5-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK5-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 // CHECK5-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
 // CHECK5-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8
+// CHECK5-NEXT:    [[BF_FREEZE9:%.*]] = freeze i8 [[BF_LOAD8]]
 // CHECK5-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
-// CHECK5-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
-// CHECK5-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
-// CHECK5-NEXT:    store i8 [[BF_SET10]], i8* [[B6]], align 8
+// CHECK5-NEXT:    [[BF_CLEAR10:%.*]] = and i8 [[BF_FREEZE9]], -16
+// CHECK5-NEXT:    [[BF_SET11:%.*]] = or i8 [[BF_CLEAR10]], [[BF_VALUE]]
+// CHECK5-NEXT:    store i8 [[BF_SET11]], i8* [[B6]], align 8
 // CHECK5-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK5-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK5-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
-// CHECK5-NEXT:    [[C11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
-// CHECK5-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C11]], align 8
+// CHECK5-NEXT:    [[C12:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
+// CHECK5-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C12]], align 8
 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
 // CHECK5-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
 // CHECK5-NEXT:    store i32 [[DIV]], i32* [[TMP12]], align 4
 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 // CHECK5:       omp.body.continue:
 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 // CHECK5:       omp.inner.for.inc:
 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK5-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1
-// CHECK5-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
+// CHECK5-NEXT:    [[ADD13:%.*]] = add nsw i32 [[TMP14]], 1
+// CHECK5-NEXT:    store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
 // CHECK5:       omp.inner.for.end:
 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 // CHECK5:       omp.loop.exit:
 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
 // CHECK5-NEXT:    ret void
 //

 // CHECK5-NEXT:    store i32 [[TMP31]], i32* [[TMP11]], align 4
 // CHECK5-NEXT:    [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
 // CHECK5-NEXT:    [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1
 // CHECK5-NEXT:    store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1
 // CHECK5-NEXT:    [[TMP34:%.*]] = load i32, i32* [[B11]], align 4
 // CHECK5-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK5-NEXT:    [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8
 // CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
+// CHECK5-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK5-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15
-// CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK5-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK5:       .omp.lastprivate.done:
 // CHECK5-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
 // CHECK5-NEXT:    ret void
 //
 //

 // CHECK6-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK6-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK6-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK6-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK6-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
-// CHECK6-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK6-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK6-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK6-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK6-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK6-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK6-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK6-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4

 // CHECK6-NEXT:    [[B6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK6-NEXT:    [[BF_LOAD7:%.*]] = load i8, i8* [[B6]], align 8
 // CHECK6-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
 // CHECK6-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK6-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK6-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 // CHECK6-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
 // CHECK6-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B6]], align 8
+// CHECK6-NEXT:    [[BF_FREEZE9:%.*]] = freeze i8 [[BF_LOAD8]]
 // CHECK6-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
-// CHECK6-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
-// CHECK6-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
-// CHECK6-NEXT:    store i8 [[BF_SET10]], i8* [[B6]], align 8
+// CHECK6-NEXT:    [[BF_CLEAR10:%.*]] = and i8 [[BF_FREEZE9]], -16
+// CHECK6-NEXT:    [[BF_SET11:%.*]] = or i8 [[BF_CLEAR10]], [[BF_VALUE]]
+// CHECK6-NEXT:    store i8 [[BF_SET11]], i8* [[B6]], align 8
 // CHECK6-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK6-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK6-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
-// CHECK6-NEXT:    [[C11:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
-// CHECK6-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C11]], align 8
+// CHECK6-NEXT:    [[C12:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
+// CHECK6-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[C12]], align 8
 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
 // CHECK6-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
 // CHECK6-NEXT:    store i32 [[DIV]], i32* [[TMP12]], align 4
 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 // CHECK6:       omp.body.continue:
 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 // CHECK6:       omp.inner.for.inc:
 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
-// CHECK6-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1
-// CHECK6-NEXT:    store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
+// CHECK6-NEXT:    [[ADD13:%.*]] = add nsw i32 [[TMP14]], 1
+// CHECK6-NEXT:    store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
 // CHECK6:       omp.inner.for.end:
 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 // CHECK6:       omp.loop.exit:
 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
 // CHECK6-NEXT:    ret void
 //

 // CHECK6-NEXT:    store i32 [[TMP31]], i32* [[TMP11]], align 4
 // CHECK6-NEXT:    [[TMP32:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
 // CHECK6-NEXT:    [[TMP33:%.*]] = load [4 x i8], [4 x i8]* [[TMP32]], align 1
 // CHECK6-NEXT:    store [4 x i8] [[TMP33]], [4 x i8]* [[TMP12]], align 1
 // CHECK6-NEXT:    [[TMP34:%.*]] = load i32, i32* [[B11]], align 4
 // CHECK6-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK6-NEXT:    [[TMP35:%.*]] = trunc i32 [[TMP34]] to i8
 // CHECK6-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
+// CHECK6-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK6-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP35]], 15
-// CHECK6-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK6-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK6-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK6-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
 // CHECK6-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK6:       .omp.lastprivate.done:
 // CHECK6-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
 // CHECK6-NEXT:    ret void
 //
 //

 // CHECK7-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK7-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK7-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK7-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK7-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
-// CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK7-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK7-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK7-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK7-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK7-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK7-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4

 // CHECK7-NEXT:    store i32 [[TMP32]], i32* [[TMP11]], align 4
 // CHECK7-NEXT:    [[TMP33:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
 // CHECK7-NEXT:    [[TMP34:%.*]] = load [4 x i8], [4 x i8]* [[TMP33]], align 1
 // CHECK7-NEXT:    store [4 x i8] [[TMP34]], [4 x i8]* [[TMP12]], align 1
 // CHECK7-NEXT:    [[TMP35:%.*]] = load i32, i32* [[B11]], align 4
 // CHECK7-NEXT:    [[B16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK7-NEXT:    [[TMP36:%.*]] = trunc i32 [[TMP35]] to i8
 // CHECK7-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B16]], align 8
+// CHECK7-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK7-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP36]], 15
-// CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK7-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK7-NEXT:    store i8 [[BF_SET]], i8* [[B16]], align 8
 // CHECK7-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK7:       .omp.lastprivate.done:
 // CHECK7-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]])
 // CHECK7-NEXT:    ret void
 //
 //

 // CHECK7-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 2
 // CHECK7-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
 // CHECK7-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
 // CHECK7-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK7-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK7-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
 // CHECK7-NEXT:    [[TMP5:%.*]] = trunc i32 [[INC]] to i8
 // CHECK7-NEXT:    [[BF_LOAD2:%.*]] = load i8, i8* [[B]], align 8
+// CHECK7-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD2]]
 // CHECK7-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
-// CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD2]], -16
+// CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK7-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK7-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK7-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK7-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK7-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
 // CHECK7-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 3
 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[C]], align 8
 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4

 // CHECK7:       .omp.lastprivate.then:
 // CHECK7-NEXT:    store i32 2, i32* [[B3]], align 4
 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, i32* [[B3]], align 4
 // CHECK7-NEXT:    store i32 [[TMP19]], i32* [[B]], align 4
 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, i32* [[B3]], align 4
 // CHECK7-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK7-NEXT:    [[TMP21:%.*]] = trunc i32 [[TMP20]] to i8
 // CHECK7-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B7]], align 8
+// CHECK7-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK7-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP21]], 15
-// CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK7-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK7-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK7-NEXT:    store i8 [[BF_SET]], i8* [[B7]], align 8
 // CHECK7-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK7:       .omp.lastprivate.done:
 // CHECK7-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
 // CHECK7-NEXT:    ret void
 //
 //

 // CHECK8-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK8-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK8-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK8-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK8-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
-// CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK8-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK8-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK8-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK8-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 3
 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK8-NEXT:    store i32* [[TMP1]], i32** [[C]], align 8
 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK8-NEXT:    store i32* [[TMP]], i32** [[_TMP2]], align 8
 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4

 // CHECK8-NEXT:    store i32 [[TMP34]], i32* [[TMP11]], align 4
 // CHECK8-NEXT:    [[TMP35:%.*]] = load [4 x i8]*, [4 x i8]** [[_TMP8]], align 8
 // CHECK8-NEXT:    [[TMP36:%.*]] = load [4 x i8], [4 x i8]* [[TMP35]], align 1
 // CHECK8-NEXT:    store [4 x i8] [[TMP36]], [4 x i8]* [[TMP12]], align 1
 // CHECK8-NEXT:    [[TMP37:%.*]] = load i32, i32* [[B11]], align 4
 // CHECK8-NEXT:    [[B18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK8-NEXT:    [[TMP38:%.*]] = trunc i32 [[TMP37]] to i8
 // CHECK8-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B18]], align 8
+// CHECK8-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK8-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP38]], 15
-// CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK8-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK8-NEXT:    store i8 [[BF_SET]], i8* [[B18]], align 8
 // CHECK8-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 // CHECK8:       .omp.lastprivate.done:
 // CHECK8-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]])
 // CHECK8-NEXT:    ret void
 //
 //

 // CHECK8-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS]], i32 0, i32 2
 // CHECK8-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
 // CHECK8-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
 // CHECK8-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK8-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK8-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 // CHECK8-NEXT:    [[TMP2:%.*]] = trunc i32 [[DEC]] to i8
 // CHECK8-NEXT:    [[BF_LOAD1:%.*]] = load i8, i8* [[B]], align 8
+// CHECK8-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD1]]
 // CHECK8-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP2]], 15
-// CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD1]], -16
+// CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK8-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK8-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK8-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK8-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK8-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
 // CHECK8-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS]], i32 0, i32 3
 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C]], align 8
 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4

 // CHECK8-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 2
 // CHECK8-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 8
 // CHECK8-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
 // CHECK8-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 // CHECK8-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 // CHECK8-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 // CHECK8-NEXT:    [[TMP14:%.*]] = trunc i32 [[DEC]] to i8
 // CHECK8-NEXT:    [[BF_LOAD6:%.*]] = load i8, i8* [[B]], align 8
+// CHECK8-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD6]]
 // CHECK8-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP14]], 15
-// CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD6]], -16
+// CHECK8-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK8-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK8-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 8
 // CHECK8-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 // CHECK8-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 // CHECK8-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32*, i32** [[_TMP4]], align 8
 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
 // CHECK8-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP16]], 1

clang/test/OpenMP/for_linear_codegen.cpp

 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK1-NEXT:    ret void
 //

 // CHECK1-NEXT:    store i32* [[TMP35]], i32** [[_TMP21]], align 8
 // CHECK1-NEXT:    [[TMP36:%.*]] = load i32, i32* [[C10]], align 4
 // CHECK1-NEXT:    [[TMP37:%.*]] = load i32*, i32** [[_TMP21]], align 8
 // CHECK1-NEXT:    store i32 [[TMP36]], i32* [[TMP37]], align 4
 // CHECK1-NEXT:    [[TMP38:%.*]] = load i32, i32* [[B]], align 4
 // CHECK1-NEXT:    [[B22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1
 // CHECK1-NEXT:    [[TMP39:%.*]] = trunc i32 [[TMP38]] to i8
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B22]], align 4
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP39]], 15
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B22]], align 4
 // CHECK1-NEXT:    br label [[DOTOMP_LINEAR_PU_DONE]]
 // CHECK1:       .omp.linear.pu.done:
 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
 // CHECK1-NEXT:    ret void
 //
 //

 // CHECK2-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK2-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK2-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK2-NEXT:    ret void
 //

 // CHECK2-NEXT:    store i32* [[TMP35]], i32** [[_TMP21]], align 8
 // CHECK2-NEXT:    [[TMP36:%.*]] = load i32, i32* [[C10]], align 4
 // CHECK2-NEXT:    [[TMP37:%.*]] = load i32*, i32** [[_TMP21]], align 8
 // CHECK2-NEXT:    store i32 [[TMP36]], i32* [[TMP37]], align 4
 // CHECK2-NEXT:    [[TMP38:%.*]] = load i32, i32* [[B]], align 4
 // CHECK2-NEXT:    [[B22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1
 // CHECK2-NEXT:    [[TMP39:%.*]] = trunc i32 [[TMP38]] to i8
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B22]], align 4
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK2-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP39]], 15
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B22]], align 4
 // CHECK2-NEXT:    br label [[DOTOMP_LINEAR_PU_DONE]]
 // CHECK2:       .omp.linear.pu.done:
 // CHECK2-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
 // CHECK2-NEXT:    ret void
 //
 //

 // CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK3-NEXT:    ret void
 //

 // CHECK3-NEXT:    store i32* [[TMP36]], i32** [[_TMP21]], align 8
 // CHECK3-NEXT:    [[TMP37:%.*]] = load i32, i32* [[C10]], align 4
 // CHECK3-NEXT:    [[TMP38:%.*]] = load i32*, i32** [[_TMP21]], align 8
 // CHECK3-NEXT:    store i32 [[TMP37]], i32* [[TMP38]], align 4
 // CHECK3-NEXT:    [[TMP39:%.*]] = load i32, i32* [[B]], align 4
 // CHECK3-NEXT:    [[B22:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1
 // CHECK3-NEXT:    [[TMP40:%.*]] = trunc i32 [[TMP39]] to i8
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B22]], align 4
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP40]], 15
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B22]], align 4
 // CHECK3-NEXT:    br label [[DOTOMP_LINEAR_PU_DONE]]
 // CHECK3:       .omp.linear.pu.done:
 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
 // CHECK3-NEXT:    ret void
 //
 //

 // CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK4-NEXT:    ret void
 //

 // CHECK4-NEXT:    store i32* [[TMP38]], i32** [[_TMP23]], align 8
 // CHECK4-NEXT:    [[TMP39:%.*]] = load i32, i32* [[C10]], align 4
 // CHECK4-NEXT:    [[TMP40:%.*]] = load i32*, i32** [[_TMP23]], align 8
 // CHECK4-NEXT:    store i32 [[TMP39]], i32* [[TMP40]], align 4
 // CHECK4-NEXT:    [[TMP41:%.*]] = load i32, i32* [[B]], align 4
 // CHECK4-NEXT:    [[B24:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP0]], i32 0, i32 1
 // CHECK4-NEXT:    [[TMP42:%.*]] = trunc i32 [[TMP41]] to i8
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B24]], align 4
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP42]], 15
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B24]], align 4
 // CHECK4-NEXT:    br label [[DOTOMP_LINEAR_PU_DONE]]
 // CHECK4:       .omp.linear.pu.done:
 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]])
 // CHECK4-NEXT:    ret void
 //
 //

clang/test/OpenMP/parallel_firstprivate_codegen.cpp

 // CHECK1-NEXT:    [[C_CASTED:%.*]] = alloca i32, align 4
 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 4
 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 4
 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
 // CHECK1-NEXT:    store i32* [[TMP0]], i32** [[C]], align 4
 // CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32* [[A3]], i32** [[A2]], align 4
 // CHECK1-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK2-NEXT:    [[C_CASTED:%.*]] = alloca i32, align 4
 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 4
 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 4
 // CHECK2-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK2-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
 // CHECK2-NEXT:    store i32* [[TMP0]], i32** [[C]], align 4
 // CHECK2-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32* [[A3]], i32** [[A2]], align 4
 // CHECK2-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK3-NEXT:    [[C_CASTED:%.*]] = alloca i32, align 4
 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 4
 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 4
 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
 // CHECK3-NEXT:    store i32* [[TMP0]], i32** [[C]], align 4
 // CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32* [[A3]], i32** [[A2]], align 4
 // CHECK3-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK4-NEXT:    [[C_CASTED:%.*]] = alloca i32, align 4
 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 4
 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 4
 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
 // CHECK4-NEXT:    store i32* [[TMP0]], i32** [[C]], align 4
 // CHECK4-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32* [[A3]], i32** [[A2]], align 4
 // CHECK4-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK9-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK9-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK9-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK9-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK9-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK9-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK9-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK9-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK9-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK9-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK9-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK9-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK9-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK9-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK9-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK9-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK10-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK10-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK10-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK10-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK10-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK10-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK10-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK10-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK10-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK10-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK10-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK10-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK10-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK10-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK10-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK10-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK10-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK11-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK11-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK11-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK11-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK11-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK11-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK11-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK11-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK11-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK11-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK11-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK11-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK11-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK11-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK11-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK11-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK11-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK12-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK12-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK12-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK12-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK12-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK12-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK12-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK12-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK12-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK12-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK12-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK12-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK12-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK12-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK12-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK12-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK12-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

clang/test/OpenMP/parallel_private_codegen.cpp

 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK1-NEXT:    ret void
 //

 // CHECK2-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK2-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK2-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK2-NEXT:    ret void
 //

 // CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK3-NEXT:    ret void
 //

 // CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca i32*, align 8
 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]])
 // CHECK4-NEXT:    ret void
 //

clang/test/OpenMP/parallel_reduction_codegen.cpp

 // CHECK1-NEXT:    [[C5:%.*]] = alloca i32*, align 8
 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK1-NEXT:    [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8
 // CHECK1-NEXT:    store i32* [[TMP1]], i32** [[C5]], align 8
 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8
 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8
 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]])
 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B4]], align 4
 // CHECK1-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK1-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
 // CHECK1-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4
+// CHECK1-NEXT:    [[BF_FREEZE9:%.*]] = freeze i8 [[BF_LOAD8]]
 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
-// CHECK1-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
-// CHECK1-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
-// CHECK1-NEXT:    store i8 [[BF_SET10]], i8* [[B7]], align 4
+// CHECK1-NEXT:    [[BF_CLEAR10:%.*]] = and i8 [[BF_FREEZE9]], -16
+// CHECK1-NEXT:    [[BF_SET11:%.*]] = or i8 [[BF_CLEAR10]], [[BF_VALUE]]
+// CHECK1-NEXT:    store i8 [[BF_SET11]], i8* [[B7]], align 4
 // CHECK1-NEXT:    ret void
 //
 //
 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
 // CHECK1-NEXT:  entry:
 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8

 // CHECK2-NEXT:    [[C5:%.*]] = alloca i32*, align 8
 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK2-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK2-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK2-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK2-NEXT:    [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8
 // CHECK2-NEXT:    store i32* [[TMP1]], i32** [[C5]], align 8
 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8
 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8
 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]])
 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B4]], align 4
 // CHECK2-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK2-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
 // CHECK2-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4
+// CHECK2-NEXT:    [[BF_FREEZE9:%.*]] = freeze i8 [[BF_LOAD8]]
 // CHECK2-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
-// CHECK2-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
-// CHECK2-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
-// CHECK2-NEXT:    store i8 [[BF_SET10]], i8* [[B7]], align 4
+// CHECK2-NEXT:    [[BF_CLEAR10:%.*]] = and i8 [[BF_FREEZE9]], -16
+// CHECK2-NEXT:    [[BF_SET11:%.*]] = or i8 [[BF_CLEAR10]], [[BF_VALUE]]
+// CHECK2-NEXT:    store i8 [[BF_SET11]], i8* [[B7]], align 4
 // CHECK2-NEXT:    ret void
 //
 //
 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
 // CHECK2-NEXT:  entry:
 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8

 // CHECK3-NEXT:    [[C5:%.*]] = alloca i32*, align 8
 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK3-NEXT:    [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8
 // CHECK3-NEXT:    store i32* [[TMP1]], i32** [[C5]], align 8
 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8
 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8
 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]])
 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B4]], align 4
 // CHECK3-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK3-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
 // CHECK3-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4
+// CHECK3-NEXT:    [[BF_FREEZE9:%.*]] = freeze i8 [[BF_LOAD8]]
 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
-// CHECK3-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
-// CHECK3-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
-// CHECK3-NEXT:    store i8 [[BF_SET10]], i8* [[B7]], align 4
+// CHECK3-NEXT:    [[BF_CLEAR10:%.*]] = and i8 [[BF_FREEZE9]], -16
+// CHECK3-NEXT:    [[BF_SET11:%.*]] = or i8 [[BF_CLEAR10]], [[BF_VALUE]]
+// CHECK3-NEXT:    store i8 [[BF_SET11]], i8* [[B7]], align 4
 // CHECK3-NEXT:    ret void
 //
 //
 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
 // CHECK3-NEXT:  entry:
 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8

 // CHECK4-NEXT:    [[C5:%.*]] = alloca i32*, align 8
 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK4-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK4-NEXT:    [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8
 // CHECK4-NEXT:    store i32* [[TMP1]], i32** [[C5]], align 8
 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8
 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8
 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]])
 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[B4]], align 4
 // CHECK4-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK4-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
 // CHECK4-NEXT:    [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4
+// CHECK4-NEXT:    [[BF_FREEZE9:%.*]] = freeze i8 [[BF_LOAD8]]
 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
-// CHECK4-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
-// CHECK4-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
-// CHECK4-NEXT:    store i8 [[BF_SET10]], i8* [[B7]], align 4
+// CHECK4-NEXT:    [[BF_CLEAR10:%.*]] = and i8 [[BF_FREEZE9]], -16
+// CHECK4-NEXT:    [[BF_SET11:%.*]] = or i8 [[BF_CLEAR10]], [[BF_VALUE]]
+// CHECK4-NEXT:    store i8 [[BF_SET11]], i8* [[B7]], align 4
 // CHECK4-NEXT:    ret void
 //
 //
 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
 // CHECK4-NEXT:  entry:
 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8

clang/test/OpenMP/single_codegen.cpp

 // CHECK1-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK1-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK2-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK2-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK2-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK2-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK2-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK3-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK3-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK3-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK4-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK4-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK4-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32* [[A3]], i32** [[A2]], align 8
 // CHECK4-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1

 // CHECK5-NEXT:    [[C_CASTED:%.*]] = alloca i64, align 8
 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK5-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0, !dbg [[DBG122:![0-9]+]]
 // CHECK5-NEXT:    store i32 0, i32* [[A]], align 8, !dbg [[DBG122]]
 // CHECK5-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1, !dbg [[DBG123:![0-9]+]]
 // CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4, !dbg [[DBG123]]
-// CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16, !dbg [[DBG123]]
+// CHECK5-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]], !dbg [[DBG123]]
+// CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16, !dbg [[DBG123]]
 // CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0, !dbg [[DBG123]]
 // CHECK5-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4, !dbg [[DBG123]]
 // CHECK5-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2, !dbg [[DBG124:![0-9]+]]
 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8, !dbg [[DBG125:![0-9]+]]
 // CHECK5-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8, !dbg [[DBG124]]
 // CHECK5-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0, !dbg [[DBG126:![0-9]+]]
 // CHECK5-NEXT:    store i32* [[A3]], i32** [[A2]], align 8, !dbg [[DBG126]]
 // CHECK5-NEXT:    [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1, !dbg [[DBG127:![0-9]+]]

clang/test/OpenMP/teams_private_codegen.cpp

 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK1-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK1-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK1-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK1-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 // CHECK1-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8

 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK2-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK2-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK2-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK2-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK2-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK2-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK2-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK2-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK2-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 // CHECK2-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8

 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
 // CHECK3-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 4
 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK3-NEXT:    store i32 0, i32* [[A]], align 4
 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK3-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK3-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
 // CHECK3-NEXT:    store i32* [[TMP0]], i32** [[C]], align 4
 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 // CHECK3-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4

 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
 // CHECK4-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 4
 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK4-NEXT:    store i32 0, i32* [[A]], align 4
 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK4-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK4-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
 // CHECK4-NEXT:    store i32* [[TMP0]], i32** [[C]], align 4
 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 // CHECK4-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4

 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
 // CHECK9-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK9-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK9-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK9-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK9-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK9-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK9-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK9-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK9-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK9-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK9-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK9-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 // CHECK9-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
 // CHECK9-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8

 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
 // CHECK10-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
 // CHECK10-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 8
 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
 // CHECK10-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK10-NEXT:    store i32 0, i32* [[A]], align 8
 // CHECK10-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK10-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK10-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK10-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK10-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK10-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK10-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK10-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
 // CHECK10-NEXT:    store i32* [[TMP0]], i32** [[C]], align 8
 // CHECK10-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 // CHECK10-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
 // CHECK10-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8

 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
 // CHECK11-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
 // CHECK11-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 4
 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
 // CHECK11-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK11-NEXT:    store i32 0, i32* [[A]], align 4
 // CHECK11-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK11-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK11-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK11-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK11-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK11-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK11-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK11-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
 // CHECK11-NEXT:    store i32* [[TMP0]], i32** [[C]], align 4
 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 // CHECK11-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
 // CHECK11-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4

 // CHECK12-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
 // CHECK12-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
 // CHECK12-NEXT:    store i32* [[D]], i32** [[D_ADDR]], align 4
 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
 // CHECK12-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
 // CHECK12-NEXT:    store i32 0, i32* [[A]], align 4
 // CHECK12-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
 // CHECK12-NEXT:    [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
-// CHECK12-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
+// CHECK12-NEXT:    [[BF_FREEZE:%.*]] = freeze i8 [[BF_LOAD]]
+// CHECK12-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_FREEZE]], -16
 // CHECK12-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 // CHECK12-NEXT:    store i8 [[BF_SET]], i8* [[B]], align 4
 // CHECK12-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
 // CHECK12-NEXT:    store i32* [[TMP0]], i32** [[C]], align 4
 // CHECK12-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 // CHECK12-NEXT:    [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
 // CHECK12-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4