Add pattern-matching code for instructions testing for same-sign of two inputs, and reduce. e.g:
define i1 @samesign(i32 %x, i32 %y) {
%a = and i32 %x, %y
%lt = icmp slt i32 %a, 0
%o = or i32 %x, %y
%gt = icmp sgt i32 %o, -1
%r = or i1 %lt, %gt
ret i1 %r
}becomes =>
define i1 @samesign(i32 %x, i32 %y) {
%a = xor i32 %x, %y
%r = icmp sgt i32 %a, -1
ret i1 %r
}Also now covering the inverted form (example):
define i1 @samesign_inverted(i32 %x, i32 %y) {
%a = and i32 %x, %y
%gt = icmp sgt i32 %a, -1
%o = or i32 %x, %y
%lt = icmp slt i32 %o, 0
%r = and i1 %gt, %lt
ret i1 %r
}becomes =>
define i1 @samesign_inverted(i32 %x, i32 %y) {
%3 = xor i32 %x, %y
%4 = icmp slt i32 %3, 0
ret i1 %4
}godbolt for inverted form
alive2 for inverted form
issue #55988
It's fine to ignore the inverted logic pattern that ends with an 'and' instruction, but please put a TODO comment on this, so we know it can be handled in a follow-up patch.