[SystemZ] Load FP immediates via a GPR instead of the constant pool.

[jonpa]

Summary

Performance results so far show minor changes both ways, overall a slight regression, which may be worth looking into. I however got several nice improvements with my first version of this patch which (by mistake sort of) loaded the fp constants into a full VR128 instead of a VR32/VR64. I found that I with that first patch got a lot more spilling overall (the vector regs are never callee saved, right), but however also some nice improvements:

(VR128 version)
Improvements:  
0.938: f507.cactuBSSN_r 
0.975: f544.nab_r 
0.985: f511.povray_r 

Regressions:
1.016: i523.xalancbmk_r

I am trying to look into why cactus is so much better and I know for one thing that in that particular file there is a lot *less* spilling for some reason when constants are loaded into full vector regs instead of VR32/64 ones (this is the same file that was improving previusly with fp-contract=off, with a huge function that is not that easy to analyze...). This could be something "random" or there may be an explanation / heuristic to be found. I am not sure why VR128 should work better... The VR128 version gave less spills than main or the VR32/VR64 version, which were about the same.

Not quite sure if it is necessary to have the new SystemZ::INSERT_FP_LANE - perhaps it would be easier to just emit the machine nodes directly there instead.

With a handling in foldMemoryOperandImpl(), I don't know much to improve except to try to figure out more about the cactus difference.

[jonpa]

I think I have found at least an interesting explanation: The reason the spilling decreased significantly when VR128 regs were used (VR128 = vlgg; extract subreg => use of VR128:subreg) is that those registers now have all the 32 registers to choose from. If however a VR64 is produced containing the immediate it will be constrained to FP64 whenever there is a user that folds a memory operand using an FP opcode. This makes many of those constants occupy FP64 regs instead of VR64, which increases reg-pressure significantly!

I have some ideas I will look into:

• rematerialize a load from constant pool
• avoid using FP reg/mem opcodes in case of high register pressure generally.

Comparing with fp-contract "off" (which previously ran faster), it looks like with "off" there are still less spills, but performance is the same. Not sure yet why there are less spills with "off", but IIRC that is a huge function (with huge blocks) with many FP constants that for some reason go through regalloc with a better result, even though I do not know why. Seems very promising if it is possible to eliminate the extra spills per above...

llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp

void SystemZAsmPrinter::emitInstruction(const MachineInstr *MI) {
   case SystemZ::LFER:
     LoweredMI = MCInstBuilder(SystemZ::VLGVF)
       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(0).getReg()))
       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg()))
       .addReg(0).addImm(0);
     break;
 
   case SystemZ::LEFR:
+  case SystemZ::VLVGF32:
     LoweredMI = MCInstBuilder(SystemZ::VLVGF)
       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
       .addReg(MI->getOperand(1).getReg())
       .addReg(0).addImm(0);
     break;
 
+  case SystemZ::VLVGG64:
+    LoweredMI = MCInstBuilder(SystemZ::VLVGG)
+      .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
+      .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
+      .addReg(MI->getOperand(1).getReg())
+      .addReg(0).addImm(0);
+    break;
+
+
 #define LOWER_LOW(NAME)                                                 \
   case SystemZ::NAME##64: LoweredMI = lowerRILow(MI, SystemZ::NAME); break
 
   LOWER_LOW(IILL);
   LOWER_LOW(IILH);
   LOWER_LOW(TMLL);
   LOWER_LOW(TMLH);
   LOWER_LOW(NILL);

llvm/lib/Target/SystemZ/SystemZISelLowering.h

enum NodeType : unsigned {
   VSTRSZ_CC,
 
   // Test Data Class.
   //
   // Operand 0: the value to test
   // Operand 1: the bit mask
   TDC,
 
+  // Produces an FP32/FP64 value in an FP vector.
+  INSERT_FP_LANE,
+
   // Strict variants of scalar floating-point comparisons.
   // Quiet and signaling versions.
   STRICT_FCMP = ISD::FIRST_TARGET_STRICTFP_OPCODE,
   STRICT_FCMPS,
 
   // Strict variants of vector floating-point comparisons.
   // Quiet and signaling versions.
   STRICT_VFCMPE,
SDValue lowerTLSGetOffset(GlobalAddressSDNode *Node,
                             SelectionDAG &DAG, unsigned Opcode,
                             SDValue GOTOffset) const;
   SDValue lowerThreadPointer(const SDLoc &DL, SelectionDAG &DAG) const;
   SDValue lowerGlobalTLSAddress(GlobalAddressSDNode *Node,
                                 SelectionDAG &DAG) const;
   SDValue lowerBlockAddress(BlockAddressSDNode *Node,
                             SelectionDAG &DAG) const;
   SDValue lowerJumpTable(JumpTableSDNode *JT, SelectionDAG &DAG) const;
+  SDValue lowerConstantFP(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerConstantPool(ConstantPoolSDNode *CP, SelectionDAG &DAG) const;
   SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerVASTART(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerVASTART_ELF(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerVASTART_XPLINK(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerVACOPY(SDValue Op, SelectionDAG &DAG) const;
   SDValue lowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;

llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM,
 
   // We have 64-bit FPR<->GPR moves, but need special handling for
   // 32-bit forms.
   if (!Subtarget.hasVector()) {
     setOperationAction(ISD::BITCAST, MVT::i32, Custom);
     setOperationAction(ISD::BITCAST, MVT::f32, Custom);
   }
 
+  // Load (most) FP constants via a GPR instead of using the Constant Pool.
+  setOperationAction(ISD::ConstantFP, MVT::f32, Custom);
+  setOperationAction(ISD::ConstantFP, MVT::f64, Custom);
+
   // VASTART and VACOPY need to deal with the SystemZ-specific varargs
   // structure, but VAEND is a no-op.
   setOperationAction(ISD::VASTART, MVT::Other, Custom);
   setOperationAction(ISD::VACOPY,  MVT::Other, Custom);
   setOperationAction(ISD::VAEND,   MVT::Other, Expand);
 
   // Codes for which we want to perform some z-specific combinations.
   setTargetDAGCombine({ISD::ZERO_EXTEND,
SDValue SystemZTargetLowering::lowerJumpTable(JumpTableSDNode *JT,
   SDLoc DL(JT);
   EVT PtrVT = getPointerTy(DAG.getDataLayout());
   SDValue Result = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
 
   // Use LARL to load the address of the table.
   return DAG.getNode(SystemZISD::PCREL_WRAPPER, DL, PtrVT, Result);
 }
 
+SDValue SystemZTargetLowering::lowerConstantFP(SDValue Op,
+                                               SelectionDAG &DAG) const {
+  SDLoc DL(Op);
+  MVT VT = Op.getValueType().getSimpleVT();
+  ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Op);
+  const APFloat &FPVal = CFP->getValueAPF();
+
+  if (!Subtarget.hasVector() || isFPImmLegal(FPVal, VT, false) ||
+      (VT != MVT::f32 && VT != MVT::f64))
+    return SDValue();
+
+  uint64_t UVal = FPVal.bitcastToAPInt().getZExtValue();
+  if (VT == MVT::f32 || (SystemZ::isImmHH(UVal) || SystemZ::isImmHF(UVal)))
+    return DAG.getNode(SystemZISD::INSERT_FP_LANE, DL, VT,
+                       DAG.getConstant(UVal, DL, VT.changeTypeToInteger()));
+
+  return SDValue();
+}
+
 SDValue SystemZTargetLowering::lowerConstantPool(ConstantPoolSDNode *CP,
                                                  SelectionDAG &DAG) const {
   SDLoc DL(CP);
   EVT PtrVT = getPointerTy(DAG.getDataLayout());
 
   SDValue Result;
   if (CP->isMachineConstantPoolEntry())
     Result =
SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
   case ISD::GlobalAddress:
     return lowerGlobalAddress(cast<GlobalAddressSDNode>(Op), DAG);
   case ISD::GlobalTLSAddress:
     return lowerGlobalTLSAddress(cast<GlobalAddressSDNode>(Op), DAG);
   case ISD::BlockAddress:
     return lowerBlockAddress(cast<BlockAddressSDNode>(Op), DAG);
   case ISD::JumpTable:
     return lowerJumpTable(cast<JumpTableSDNode>(Op), DAG);
+  case ISD::ConstantFP:
+    return lowerConstantFP(Op, DAG);
   case ISD::ConstantPool:
     return lowerConstantPool(cast<ConstantPoolSDNode>(Op), DAG);
   case ISD::BITCAST:
     return lowerBITCAST(Op, DAG);
   case ISD::VASTART:
     return lowerVASTART(Op, DAG);
   case ISD::VACOPY:
     return lowerVACOPY(Op, DAG);
switch ((SystemZISD::NodeType)Opcode) {
     OPCODE(ATOMIC_LOAD_128);
     OPCODE(ATOMIC_STORE_128);
     OPCODE(ATOMIC_CMP_SWAP_128);
     OPCODE(LRV);
     OPCODE(STRV);
     OPCODE(VLER);
     OPCODE(VSTER);
     OPCODE(PREFETCH);
+    OPCODE(INSERT_FP_LANE);
   }
   return nullptr;
 #undef OPCODE
 }
 
 // Return true if VT is a vector whose elements are a whole number of bytes
 // in width. Also check for presence of vector support.
 bool SystemZTargetLowering::canTreatAsByteVector(EVT VT) const {

llvm/lib/Target/SystemZ/SystemZInstrFormats.td

: Alias<6, (outs cls:$R1), (ins cls:$R1src, imm:$I2),
           [(set cls:$R1, (operator cls:$R1src, imm:$I2))]> {
   let Constraints = "$R1 = $R1src";
 }
 
 // An alias of a BinaryVRRf, but with different register sizes.
 class BinaryAliasVRRf<RegisterOperand cls>
   : Alias<6, (outs VR128:$V1), (ins cls:$R2, cls:$R3), []>;
 
+// An alias of a TernaryVRSb, but with different register sizes.
+class TernaryAliasVRSb<TypedReg tr1, RegisterOperand cls2,
+                       SDPatternOperator operator>
+  : Alias<6, (outs tr1.op:$V1), (ins cls2:$R2),
+              [(set (tr1.vt tr1.op:$V1), (operator cls2:$R2))]>;
+
 // An alias of a CompareRI, but with different register sizes.
 class CompareAliasRI<SDPatternOperator operator, RegisterOperand cls,
                      ImmOpWithPattern imm>
   : Alias<4, (outs), (ins cls:$R1, imm:$I2),
           [(set CC, (operator cls:$R1, imm:$I2))]> {
   let isCompare = 1;
 }
 

llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp

if (OpNum == 1) {
                      get(LoadOpcode))
         .add(MI.getOperand(0))
         .addFrameIndex(FrameIndex)
         .addImm(0)
         .addReg(0);
     }
   }
 
+  if (OpNum == 0 &&
+      (Opcode == SystemZ::VLVGF32 || Opcode == SystemZ::VLVGG64)) {
+    // If we're spilling the destination of an VLVGXXX, store the source
+    // register instead.
+    unsigned StoreOpcode =
+      Opcode == SystemZ::VLVGF32 ? SystemZ::STMux : SystemZ::STG;
+    return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
+                   get(StoreOpcode))
+      .add(MI.getOperand(1))
+      .addFrameIndex(FrameIndex)
+      .addImm(0)
+      .addReg(0);
+  }
+
   // Look for cases where the source of a simple store or the destination
   // of a simple load is being spilled.  Try to use MVC instead.
   //
   // Although MVC is in practice a fast choice in these cases, it is still
   // logically a bytewise copy.  This means that we cannot use it if the
   // load or store is volatile.  We also wouldn't be able to use MVC if
   // the two memories partially overlap, but that case cannot occur here,
   // because we know that one of the memories is a full frame index.

llvm/lib/Target/SystemZ/SystemZInstrVector.td

let Predicates = [FeatureVector] in {
   def VLVGF : TernaryVRSb<"vlvgf", 0xE722, z_vector_insert,
                           v128f, v128f, GR32, 2>;
   def VLVGG : TernaryVRSb<"vlvgg", 0xE722, z_vector_insert,
                           v128g, v128g, GR64, 3>;
 
   // Load VR from GRs disjoint.
   def VLVGP : BinaryVRRf<"vlvgp", 0xE762, z_join_dwords, v128g>;
   def VLVGP32 : BinaryAliasVRRf<GR32>;
+
+  // Insert and produce an FP value (in element 0).
+  def VLVGF32 : TernaryAliasVRSb<v32sb, GR32, z_insert_fp_lane>;
+  def VLVGG64 : TernaryAliasVRSb<v64db, GR64, z_insert_fp_lane>;
 }
 
 // Extractions always assign to the full GR64, even if the element would
 // fit in the lower 32 bits.  Sub-i64 extracts therefore need to take a
 // subreg of the result.
 class VectorExtractSubreg<ValueType type, Instruction insn>
   : Pat<(i32 (z_vector_extract (type VR128:$vec), shift12only:$index)),
         (EXTRACT_SUBREG (insn VR128:$vec, shift12only:$index), subreg_l32)>;

llvm/lib/Target/SystemZ/SystemZOperators.td

def SDT_ZTEnd               : SDTypeProfile<1, 0,
                                             [SDTCisVT<0, i32>]>;
 def SDT_ZInsertVectorElt    : SDTypeProfile<1, 3,
                                             [SDTCisVec<0>,
                                              SDTCisSameAs<0, 1>,
                                              SDTCisVT<3, i32>]>;
 def SDT_ZExtractVectorElt   : SDTypeProfile<1, 2,
                                             [SDTCisVec<1>,
                                              SDTCisVT<2, i32>]>;
+def SDT_ZInsertFPLane       : SDTypeProfile<1, 1,
+                                            [SDTCisFP<0>,
+                                             SDTCisInt<1>]>;
 def SDT_ZReplicate          : SDTypeProfile<1, 1,
                                             [SDTCisVec<0>]>;
 def SDT_ZVecUnaryConv       : SDTypeProfile<1, 1,
                                             [SDTCisVec<0>,
                                              SDTCisVec<1>]>;
 def SDT_ZVecUnary           : SDTypeProfile<1, 1,
                                             [SDTCisVec<0>,
                                              SDTCisSameAs<0, 1>]>;

 
 def z_tdc               : SDNode<"SystemZISD::TDC", SDT_ZTest>;
 
 // Defined because the index is an i32 rather than a pointer.
 def z_vector_insert     : SDNode<"ISD::INSERT_VECTOR_ELT",
                                  SDT_ZInsertVectorElt>;
 def z_vector_extract    : SDNode<"ISD::EXTRACT_VECTOR_ELT",
                                  SDT_ZExtractVectorElt>;
+def z_insert_fp_lane    : SDNode<"SystemZISD::INSERT_FP_LANE",
+                                 SDT_ZInsertFPLane>;
 def z_byte_mask         : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>;
 def z_rotate_mask       : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>;
 def z_replicate         : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>;
 def z_join_dwords       : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>;
 def z_splat             : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>;
 def z_merge_high        : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>;
 def z_merge_low         : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>;
 def z_shl_double        : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>;

llvm/lib/Target/SystemZ/SystemZScheduleZ13.td

 // --------------------------------- Vector --------------------------------- //
 
 //===----------------------------------------------------------------------===//
 // Vector: Move instructions
 //===----------------------------------------------------------------------===//
 
 def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
 def : InstRW<[WLat4, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
-def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
+def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H|F32|G64)?$")>;
 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Vector: Immediate instructions
 //===----------------------------------------------------------------------===//
 
 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;

llvm/lib/Target/SystemZ/SystemZScheduleZ14.td

 // --------------------------------- Vector --------------------------------- //
 
 //===----------------------------------------------------------------------===//
 // Vector: Move instructions
 //===----------------------------------------------------------------------===//
 
 def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
-def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
+def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H|F32|G64)?$")>;
 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Vector: Immediate instructions
 //===----------------------------------------------------------------------===//
 
 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;

llvm/lib/Target/SystemZ/SystemZScheduleZ15.td

 // --------------------------------- Vector --------------------------------- //
 
 //===----------------------------------------------------------------------===//
 // Vector: Move instructions
 //===----------------------------------------------------------------------===//
 
 def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
-def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
+def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H|F32|G64)?$")>;
 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Vector: Immediate instructions
 //===----------------------------------------------------------------------===//
 
 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;

llvm/lib/Target/SystemZ/SystemZScheduleZ16.td

 // --------------------------------- Vector --------------------------------- //
 
 //===----------------------------------------------------------------------===//
 // Vector: Move instructions
 //===----------------------------------------------------------------------===//
 
 def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
-def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
+def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H|F32|G64)?$")>;
 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Vector: Immediate instructions
 //===----------------------------------------------------------------------===//
 
 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;

llvm/test/CodeGen/SystemZ/foldmemop-fpimmviagpr.mir

+# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z14 -start-before=greedy %s -o - \
+# RUN:   | FileCheck %s
+#
+# Test storing of a spilled fp immediate directly after the immediate load
+# rather than from a loaded vector register.
+
+--- |
+  define void @fun(ptr %arg) { ret void }
+
+...
+
+# CHECK-LABEL: fun
+# CHECK: llihh %r0, 16402
+# CHECK-NEXT: stg %r0, 160(%r15)     # 8-byte Folded Spill
+
+---
+name:            fun
+alignment:       16
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: addr64bit }
+  - { id: 1, class: addr64bit }
+  - { id: 2, class: gr64bit }
+  - { id: 3, class: gr64bit }
+  - { id: 4, class: addr64bit }
+  - { id: 5, class: gr64bit }
+  - { id: 6, class: fp64bit }
+  - { id: 7, class: addr64bit }
+  - { id: 8, class: vr64bit }
+  - { id: 9, class: vr64bit }
+  - { id: 10, class: fp64bit }
+  - { id: 11, class: fp64bit }
+  - { id: 12, class: vr64bit }
+  - { id: 13, class: vr64bit }
+  - { id: 14, class: addr64bit }
+  - { id: 15, class: fp64bit }
+  - { id: 16, class: gr64bit }
+  - { id: 17, class: vr64bit }
+  - { id: 18, class: vr64bit }
+  - { id: 19, class: vr128bit }
+  - { id: 20, class: vr64bit }
+  - { id: 21, class: vr64bit }
+  - { id: 22, class: vr128bit }
+  - { id: 23, class: vr64bit }
+  - { id: 24, class: vr64bit }
+  - { id: 25, class: vr64bit }
+  - { id: 26, class: vr64bit }
+  - { id: 27, class: addr64bit }
+  - { id: 28, class: fp64bit }
+  - { id: 29, class: addr64bit }
+  - { id: 30, class: vr64bit }
+  - { id: 31, class: vr64bit }
+  - { id: 32, class: vr64bit }
+  - { id: 33, class: vr64bit }
+  - { id: 34, class: vr64bit }
+  - { id: 35, class: vr64bit }
+  - { id: 36, class: vr64bit }
+  - { id: 37, class: gr64bit }
+  - { id: 38, class: vr64bit }
+  - { id: 39, class: vr64bit }
+  - { id: 40, class: vr64bit }
+  - { id: 41, class: vr64bit }
+  - { id: 42, class: vr64bit }
+  - { id: 43, class: vr64bit }
+  - { id: 44, class: vr64bit }
+  - { id: 45, class: vr64bit }
+  - { id: 46, class: fp64bit }
+  - { id: 47, class: vr128bit }
+  - { id: 48, class: vr64bit }
+  - { id: 49, class: vr64bit }
+  - { id: 50, class: vr64bit }
+  - { id: 51, class: vr64bit }
+  - { id: 52, class: vr64bit }
+  - { id: 53, class: vr64bit }
+  - { id: 54, class: vr64bit }
+  - { id: 55, class: vr64bit }
+  - { id: 56, class: vr64bit }
+  - { id: 57, class: vr64bit }
+  - { id: 58, class: vr64bit }
+  - { id: 59, class: vr64bit }
+  - { id: 60, class: vr64bit }
+  - { id: 61, class: vr64bit }
+  - { id: 62, class: vr64bit }
+  - { id: 63, class: addr64bit }
+  - { id: 64, class: vr64bit }
+  - { id: 65, class: vr64bit }
+  - { id: 66, class: vr64bit }
+  - { id: 67, class: vr64bit }
+  - { id: 68, class: addr64bit }
+  - { id: 69, class: vr64bit }
+  - { id: 70, class: vr64bit }
+  - { id: 71, class: addr64bit }
+  - { id: 72, class: vr64bit }
+  - { id: 73, class: vr64bit }
+  - { id: 74, class: vr64bit }
+  - { id: 75, class: vr64bit }
+  - { id: 76, class: addr64bit }
+  - { id: 77, class: vr64bit }
+  - { id: 78, class: vr64bit }
+  - { id: 79, class: vr64bit }
+  - { id: 80, class: vr64bit }
+  - { id: 81, class: vr64bit }
+  - { id: 82, class: addr64bit }
+  - { id: 83, class: vr64bit }
+  - { id: 84, class: vr64bit }
+  - { id: 85, class: vr64bit }
+  - { id: 86, class: addr64bit }
+  - { id: 87, class: vr64bit }
+  - { id: 88, class: vr64bit }
+  - { id: 89, class: vr64bit }
+  - { id: 90, class: vr64bit }
+  - { id: 91, class: addr64bit }
+  - { id: 92, class: vr64bit }
+  - { id: 93, class: vr64bit }
+  - { id: 94, class: vr64bit }
+  - { id: 95, class: vr64bit }
+  - { id: 96, class: vr64bit }
+  - { id: 97, class: addr64bit }
+  - { id: 98, class: vr64bit }
+  - { id: 99, class: vr64bit }
+  - { id: 100, class: vr64bit }
+  - { id: 101, class: vr64bit }
+  - { id: 102, class: vr64bit }
+  - { id: 103, class: addr64bit }
+  - { id: 104, class: vr64bit }
+  - { id: 105, class: vr64bit }
+  - { id: 106, class: vr64bit }
+  - { id: 107, class: vr64bit }
+  - { id: 108, class: addr64bit }
+  - { id: 109, class: vr64bit }
+  - { id: 110, class: vr64bit }
+  - { id: 111, class: vr64bit }
+  - { id: 112, class: addr64bit }
+  - { id: 113, class: addr64bit }
+  - { id: 114, class: addr64bit }
+liveins:
+  - { reg: '$r2d', virtual-reg: '%4' }
+frameInfo:
+  maxAlignment:    1
+constants:
+  - id:              0
+    value:           double 0x3FAC71C71C71C71C
+    alignment:       8
+  - id:              1
+    value:           double 0x3F9C71C71C71C71C
+    alignment:       8
+  - id:              2
+    value:           double 2.000000e-03
+    alignment:       8
+  - id:              3
+    value:           'double -1.950000e+00'
+    alignment:       8
+  - id:              4
+    value:           double 0xBFB0ECF56BE69CA7
+    alignment:       8
+machineFunctionInfo: {}
+body:             |
+  bb.0:
+    liveins: $r2d
+  
+    %4:addr64bit = COPY $r2d
+    %114:addr64bit = LGHI 0
+    %14:addr64bit = LARL %const.0
+    %16:gr64bit = LLIHH 16402
+    %17:vr64bit = VLVGG64 %16
+    %19:vr128bit = VGMG 2, 11
+    %22:vr128bit = VGMG 1, 12
+    %27:addr64bit = LARL %const.1
+    %29:addr64bit = LARL %const.2
+    %30:vr64bit = VL64 %29, 0, $noreg :: (load (s64) from constant-pool)
+    %37:gr64bit = LLIHH 16392
+    %38:vr64bit = VLVGG64 %37
+    %47:vr128bit = VGMG 2, 10
+    %63:addr64bit = LARL %const.3
+    %64:vr64bit = VL64 %63, 0, $noreg :: (load (s64) from constant-pool)
+    %68:addr64bit = LARL %const.4
+    %69:vr64bit = VL64 %68, 0, $noreg :: (load (s64) from constant-pool)
+    %84:vr64bit = nofpexcept WFMADB %69, %22.subreg_h64, undef %85:vr64bit, implicit $fpc
+    %92:vr64bit = nofpexcept WFMADB undef %93:vr64bit, %64, undef %94:vr64bit, implicit $fpc
+    %104:vr64bit = nofpexcept WFMADB %64, %22.subreg_h64, undef %105:vr64bit, implicit $fpc
+    %109:vr64bit = nofpexcept WFMADB undef %110:vr64bit, %69, undef %111:vr64bit, implicit $fpc
+    %113:addr64bit = COPY %4
+  
+  bb.1:
+    %9:vr64bit = VL64 %4, 0, $noreg
+    %10:fp64bit = LZDR
+    %28:fp64bit = nofpexcept WFADB %9, %10, implicit $fpc
+    %13:vr64bit = nofpexcept WFDDB %10, %28, implicit $fpc
+    %6:fp64bit = VL64 undef %7:addr64bit, 0, $noreg
+    %8:vr64bit = VL64 %113, 32, $noreg
+    %12:vr64bit = nofpexcept WFSDB %10, %8, implicit $fpc
+    %15:fp64bit = COPY %28
+    %15:fp64bit = nofpexcept MDB %15, %14, 0, $noreg, implicit $fpc :: (load (s64) from constant-pool)
+    %18:vr64bit = nofpexcept WFMDB %13, %17, implicit $fpc
+    %21:vr64bit = nofpexcept WFMADB %18, %13, %19.subreg_h64, implicit $fpc
+    %26:vr64bit = nofpexcept WFMDB %15, %10, implicit $fpc
+    %28:fp64bit = nofpexcept MDB %28, %27, 0, $noreg, implicit $fpc :: (load (s64) from constant-pool)
+    %31:vr64bit = nofpexcept WFADB %13, %30, implicit $fpc
+    %32:vr64bit = nofpexcept WFSDB %30, %13, implicit $fpc
+    %24:vr64bit = nofpexcept WFSDB %21, %22.subreg_h64, implicit $fpc
+    %33:vr64bit = nofpexcept WFMADB undef %34:vr64bit, %32, %19.subreg_h64, implicit $fpc
+    %39:vr64bit = nofpexcept WFMDB %15, %38, implicit $fpc
+    %40:vr64bit = nofpexcept WFMDB %39, %30, implicit $fpc
+    %42:vr64bit = nofpexcept WFMDB %39, %10, implicit $fpc
+    %43:vr64bit = nofpexcept WFMDB %28, %38, implicit $fpc
+    %35:vr64bit = nofpexcept WFSDB %33, %22.subreg_h64, implicit $fpc
+    %45:vr64bit = nofpexcept WFMDB %43, %10, implicit $fpc
+    %52:vr64bit = nofpexcept WFADB %6, %10, implicit $fpc
+    %54:vr64bit = nofpexcept WFADB %6, %9, implicit $fpc
+    %57:vr64bit = nofpexcept WFSDB %10, %6, implicit $fpc
+    %59:vr64bit = nofpexcept WFSDB %6, %9, implicit $fpc
+    %25:vr64bit = nofpexcept WFMDB %15, %24, implicit $fpc
+    %46:fp64bit = COPY %6
+    %46:fp64bit = nofpexcept ADB %46, $noreg, 0, $noreg, implicit-def dead $cc, implicit $fpc
+    %49:vr64bit = nofpexcept WFMDB %46, %47.subreg_h64, implicit $fpc
+    %61:vr64bit = nofpexcept WFSDB %10, %9, implicit $fpc
+    %50:vr64bit = nofpexcept WFADB %8, %10, implicit $fpc
+    %36:vr64bit = nofpexcept WFMDB %28, %35, implicit $fpc
+    %51:vr64bit = nofpexcept WFMDB %50, %47.subreg_h64, implicit $fpc
+    %53:vr64bit = nofpexcept WFMDB %52, %47.subreg_h64, implicit $fpc
+    %55:vr64bit = nofpexcept WFMDB %54, %47.subreg_h64, implicit $fpc
+    %56:vr64bit = nofpexcept WFMDB %12, %47.subreg_h64, implicit $fpc
+    %58:vr64bit = nofpexcept WFMDB %57, %47.subreg_h64, implicit $fpc
+    %41:vr64bit = nofpexcept WFMDB %39, %13, implicit $fpc
+    %60:vr64bit = nofpexcept WFMDB %59, %47.subreg_h64, implicit $fpc
+    %62:vr64bit = nofpexcept WFMDB %61, %47.subreg_h64, implicit $fpc
+    %65:vr64bit = nofpexcept WFMADB %49, %64, undef %66:vr64bit, implicit $fpc
+    %67:vr64bit = nofpexcept WFSDB %40, %22.subreg_h64, implicit $fpc
+    %70:vr64bit = nofpexcept WFMADB %67, %69, %65, implicit $fpc
+    %44:vr64bit = nofpexcept WFMDB %43, %31, implicit $fpc
+    VST64 %70, undef %71:addr64bit, 0, $noreg
+    %72:vr64bit = nofpexcept WFSDB %51, %25, implicit $fpc
+    %73:vr64bit = nofpexcept WFMADB %72, %64, %8, implicit $fpc
+    %74:vr64bit = nofpexcept WFSDB %41, %56, implicit $fpc
+    %75:vr64bit = nofpexcept WFMADB %74, %69, %73, implicit $fpc
+    VST64 %75, undef %76:addr64bit, 0, $noreg
+    %77:vr64bit = nofpexcept WFSDB %53, %26, implicit $fpc
+    %78:vr64bit = nofpexcept WFMADB %77, %64, undef %79:vr64bit, implicit $fpc
+    %80:vr64bit = nofpexcept WFSDB %42, %22.subreg_h64, implicit $fpc
+    %81:vr64bit = nofpexcept WFMADB %80, %69, %78, implicit $fpc
+    %83:vr64bit = nofpexcept WFSDB %22.subreg_h64, %36, implicit $fpc
+    VST64 %81, undef %82:addr64bit, 0, $noreg
+    VST64 %84, undef %86:addr64bit, 0, $noreg
+    %87:vr64bit = nofpexcept WFMADB %83, %64, undef %88:vr64bit, implicit $fpc
+    %89:vr64bit = nofpexcept WFMADB undef %90:vr64bit, %69, %87, implicit $fpc
+    %95:vr64bit = nofpexcept WFSDB %44, %58, implicit $fpc
+    %96:vr64bit = nofpexcept WFMADB %95, %69, %92, implicit $fpc
+    VST64 %89, undef %91:addr64bit, 0, $noreg
+    VST64 %96, undef %97:addr64bit, 0, $noreg
+    %98:vr64bit = nofpexcept WFSDB %55, %22.subreg_h64, implicit $fpc
+    %99:vr64bit = nofpexcept WFMADB %98, %64, undef %100:vr64bit, implicit $fpc
+    %101:vr64bit = nofpexcept WFSDB %60, %22.subreg_h64, implicit $fpc
+    %102:vr64bit = nofpexcept WFMADB %101, %69, %99, implicit $fpc
+    VST64 %102, undef %103:addr64bit, 0, $noreg
+    %106:vr64bit = nofpexcept WFSDB %62, %45, implicit $fpc
+    %107:vr64bit = nofpexcept WFMADB %106, %69, %104, implicit $fpc
+    VST64 %107, undef %108:addr64bit, 0, $noreg
+    %114:addr64bit = nuw nsw LA %114, 20, $noreg
+    %113:addr64bit = LA %113, 160, $noreg
+    VST64 %109, undef %112:addr64bit, 0, $noreg
+    J %bb.1
+
+...

llvm/test/CodeGen/SystemZ/fp-const-13.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
+;
+; Test loading of FP constants via GPR
+
+define float @f0() {    ; LH
+; CHECK-LABEL: f0:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    llilh %r0, 16064
+; CHECK-NEXT:    vlvgf %v0, %r0, 0
+; CHECK-NEXT:    br %r14
+  ret float 0.375
+}
+
+define float @f1() {    ; LF
+; CHECK-LABEL: f1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    iilf %r0, 1182958080
+; CHECK-NEXT:    vlvgf %v0, %r0, 0
+; CHECK-NEXT:    br %r14
+  ret float 16705.0
+}
+
+define double @f2() {   ; HH
+; CHECK-LABEL: f2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    llihh %r0, 16336
+; CHECK-NEXT:    vlvgg %v0, %r0, 0
+; CHECK-NEXT:    br %r14
+  ret double 0.25
+}
+
+define double @f3() {   ; HF
+; CHECK-LABEL: f3:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    llihf %r0, 1079222272
+; CHECK-NEXT:    vlvgg %v0, %r0, 0
+; CHECK-NEXT:    br %r14
+  ret double 78.5
+}
+

llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -O3 -mtriple=s390x-linux-gnu  < %s | FileCheck --check-prefix=S390X %s
 ; RUN: llc -O3 -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck --check-prefix=SZ13 %s
 
 define <1 x float> @constrained_vector_fdiv_v1f32() #0 {
 ; S390X-LABEL: constrained_vector_fdiv_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI0_0
 ; S390X-NEXT:    le %f0, 0(%r1)
 ; S390X-NEXT:    larl %r1, .LCPI0_1
 ; S390X-NEXT:    deb %f0, 0(%r1)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fdiv_v1f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI0_0
-; SZ13-NEXT:    vgmf %v0, 2, 8
-; SZ13-NEXT:    deb %f0, 0(%r1)
-; SZ13-NEXT:    vlr %v24, %v0
+; SZ13-NEXT:    llilh %r0, 16672
+; SZ13-NEXT:    vgmf %v1, 2, 8
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    debr %f1, %f0
+; SZ13-NEXT:    vlr %v24, %v1
 ; SZ13-NEXT:    br %r14
 entry:
   %div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32(
            <1 x float> <float 1.000000e+00>,
            <1 x float> <float 1.000000e+01>,
            metadata !"round.dynamic",
            metadata !"fpexcept.strict") #0
   ret <1 x float> %div

 ; S390X-NEXT:    le %f0, 0(%r1)
 ; S390X-NEXT:    debr %f4, %f1
 ; S390X-NEXT:    debr %f2, %f1
 ; S390X-NEXT:    debr %f0, %f1
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fdiv_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI2_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI2_1
-; SZ13-NEXT:    lde %f1, 0(%r1)
-; SZ13-NEXT:    debr %f1, %f0
+; SZ13-NEXT:    llilh %r0, 16672
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16448
 ; SZ13-NEXT:    vgmf %v2, 2, 8
-; SZ13-NEXT:    vgmf %v3, 1, 1
 ; SZ13-NEXT:    debr %f2, %f0
+; SZ13-NEXT:    vgmf %v3, 1, 1
+; SZ13-NEXT:    vlvgf %v1, %r0, 0
+; SZ13-NEXT:    debr %f1, %f0
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    debr %f3, %f0
 ; SZ13-NEXT:    vmrhf %v0, %v2, %v3
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    br %r14
 entry:
   %div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32(
            <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,

 ; S390X-NEXT:    std %f1, 0(%r2)
 ; S390X-NEXT:    std %f0, 8(%r2)
 ; S390X-NEXT:    std %f2, 16(%r2)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fdiv_v3f64:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    larl %r1, .LCPI3_0
-; SZ13-NEXT:    ld %f1, 0(%r1)
-; SZ13-NEXT:    ddb %f1, 16(%r2)
-; SZ13-NEXT:    larl %r1, .LCPI3_1
 ; SZ13-NEXT:    vl %v0, 0(%r2), 4
 ; SZ13-NEXT:    vl %v2, 0(%r1), 3
-; SZ13-NEXT:    std %f1, 16(%r2)
 ; SZ13-NEXT:    vfddb %v0, %v2, %v0
+; SZ13-NEXT:    llihh %r0, 16392
+; SZ13-NEXT:    vlvgg %v1, %r0, 0
+; SZ13-NEXT:    ddb %f1, 16(%r2)
 ; SZ13-NEXT:    vst %v0, 0(%r2), 4
+; SZ13-NEXT:    std %f1, 16(%r2)
 ; SZ13-NEXT:    br %r14
 entry:
   %b = load <3 x double>, <3 x double>* %a
   %div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64(
            <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
            <3 x double> %b,
            metadata !"round.dynamic",
            metadata !"fpexcept.strict") #0

 ;
 ; SZ13-LABEL: constrained_vector_frem_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI5_0
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16672
 ; SZ13-NEXT:    vgmf %v0, 2, 8
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmodf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32(
            <1 x float> <float 1.000000e+00>,

 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -184
 ; SZ13-NEXT:    .cfi_def_cfa_offset 344
 ; SZ13-NEXT:    std %f8, 176(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
-; SZ13-NEXT:    larl %r1, .LCPI6_0
-; SZ13-NEXT:    ld %f8, 0(%r1)
+; SZ13-NEXT:    llihh %r0, 16420
+; SZ13-NEXT:    vlvgg %v8, %r0, 0
 ; SZ13-NEXT:    vgmg %v0, 1, 1
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmod@PLT
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    vgmg %v0, 2, 11
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmod@PLT

 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -200
 ; SZ13-NEXT:    .cfi_def_cfa_offset 360
 ; SZ13-NEXT:    std %f8, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
-; SZ13-NEXT:    larl %r1, .LCPI7_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI7_1
-; SZ13-NEXT:    lde %f8, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16448
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16672
+; SZ13-NEXT:    vlvgf %v8, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmodf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    vgmf %v0, 2, 8
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmodf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0

 ; SZ13-NEXT:    vl %v0, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepg %v2, %v0, 1
 ; SZ13-NEXT:    vgmg %v0, 1, 1
 ; SZ13-NEXT:    # kill: def $f2d killed $f2d killed $v2
 ; SZ13-NEXT:    brasl %r14, fmod@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v1, %v0
-; SZ13-NEXT:    larl %r1, .LCPI8_0
+; SZ13-NEXT:    llihh %r0, 16392
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmod@PLT
 ; SZ13-NEXT:    std %f0, 16(%r13)
 ; SZ13-NEXT:    vl %v0, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    ld %f8, 192(%r15) # 8-byte Folded Reload
 ; SZ13-NEXT:    vst %v0, 0(%r13), 4
 ; SZ13-NEXT:    lmg %r13, %r15, 304(%r15)
 ; SZ13-NEXT:    br %r14

 ; SZ13:       # %bb.0:
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -200
 ; SZ13-NEXT:    .cfi_def_cfa_offset 360
 ; SZ13-NEXT:    std %f8, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
-; SZ13-NEXT:    larl %r1, .LCPI9_0
-; SZ13-NEXT:    ld %f8, 0(%r1)
+; SZ13-NEXT:    llihh %r0, 16420
+; SZ13-NEXT:    vlvgg %v8, %r0, 0
 ; SZ13-NEXT:    vgmg %v0, 1, 1
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmod@PLT
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    vgmg %v0, 2, 11
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmod@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI9_1
+; SZ13-NEXT:    llihh %r0, 16400
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmod@PLT
-; SZ13-NEXT:    larl %r1, .LCPI9_2
+; SZ13-NEXT:    llihh %r0, 16392
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmod@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    ld %f8, 192(%r15) # 8-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 312(%r15)

 ; S390X-NEXT:    ler %f2, %f0
 ; S390X-NEXT:    meeb %f2, 0(%r1)
 ; S390X-NEXT:    larl %r1, .LCPI12_3
 ; S390X-NEXT:    meeb %f0, 0(%r1)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fmul_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    vgmf %v0, 1, 8
-; SZ13-NEXT:    larl %r1, .LCPI12_0
-; SZ13-NEXT:    vgmf %v2, 2, 8
+; SZ13-NEXT:    llilh %r0, 17096
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    vgmf %v1, 1, 8
-; SZ13-NEXT:    meeb %f1, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI12_1
-; SZ13-NEXT:    meebr %f2, %f0
-; SZ13-NEXT:    meeb %f0, 0(%r1)
-; SZ13-NEXT:    vmrhf %v0, %v2, %v0
-; SZ13-NEXT:    vrepf %v1, %v1, 0
-; SZ13-NEXT:    vmrhg %v24, %v0, %v1
+; SZ13-NEXT:    vgmf %v2, 2, 8
+; SZ13-NEXT:    llilh %r0, 16672
+; SZ13-NEXT:    vlvgf %v3, %r0, 0
+; SZ13-NEXT:    meebr %f0, %f1
+; SZ13-NEXT:    meebr %f2, %f1
+; SZ13-NEXT:    meebr %f3, %f1
+; SZ13-NEXT:    vmrhf %v1, %v2, %v3
+; SZ13-NEXT:    vrepf %v0, %v0, 0
+; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry:
   %mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32(
            <3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000,
                         float 0x7FF0000000000000>,
            <3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>,
            metadata !"round.dynamic",
            metadata !"fpexcept.strict") #0

 ; S390X-LABEL: constrained_vector_sqrt_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI25_0
 ; S390X-NEXT:    sqeb %f0, 0(%r1)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_sqrt_v1f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI25_0
-; SZ13-NEXT:    sqeb %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    sqebr %f0, %f0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    br %r14
 entry:
   %sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32(
                               <1 x float> <float 42.0>,
                               metadata !"round.dynamic",
                               metadata !"fpexcept.strict") #0
   ret <1 x float> %sqrt

 ; S390X-NEXT:    larl %r1, .LCPI27_1
 ; S390X-NEXT:    sqeb %f2, 0(%r1)
 ; S390X-NEXT:    larl %r1, .LCPI27_2
 ; S390X-NEXT:    sqeb %f0, 0(%r1)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_sqrt_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI27_0
-; SZ13-NEXT:    sqeb %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI27_1
-; SZ13-NEXT:    vrepf %v0, %v0, 0
-; SZ13-NEXT:    sqeb %f1, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI27_2
-; SZ13-NEXT:    sqeb %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    sqebr %f0, %f0
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v1, %r0, 0
+; SZ13-NEXT:    sqebr %f1, %f1
+; SZ13-NEXT:    llilh %r0, 16940
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
+; SZ13-NEXT:    sqebr %f2, %f2
 ; SZ13-NEXT:    vmrhf %v1, %v1, %v2
+; SZ13-NEXT:    vrepf %v0, %v0, 0
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry:
   %sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32(
                               <3 x float> <float 42.0, float 43.0, float 44.0>,
                               metadata !"round.dynamic",
                               metadata !"fpexcept.strict") #0
   ret <3 x float> %sqrt

 ;
 ; SZ13-LABEL: constrained_vector_pow_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI30_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI30_1
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16448
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, powf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32(
                              <1 x float> <float 42.0>,

 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -184
 ; SZ13-NEXT:    .cfi_def_cfa_offset 344
 ; SZ13-NEXT:    std %f8, 176(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
 ; SZ13-NEXT:    larl %r1, .LCPI31_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI31_1
-; SZ13-NEXT:    ld %f8, 0(%r1)
+; SZ13-NEXT:    llihh %r0, 16392
+; SZ13-NEXT:    vlvgg %v8, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, pow@PLT
-; SZ13-NEXT:    larl %r1, .LCPI31_2
+; SZ13-NEXT:    larl %r1, .LCPI31_1
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, pow@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    ld %f8, 176(%r15) # 8-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0

 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -200
 ; SZ13-NEXT:    .cfi_def_cfa_offset 360
 ; SZ13-NEXT:    std %f8, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
-; SZ13-NEXT:    larl %r1, .LCPI32_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI32_1
-; SZ13-NEXT:    lde %f8, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16448
+; SZ13-NEXT:    vlvgf %v8, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, powf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI32_2
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, powf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI32_3
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, powf@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    ld %f8, 192(%r15) # 8-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0

 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -208
 ; SZ13-NEXT:    .cfi_def_cfa_offset 368
 ; SZ13-NEXT:    std %f8, 200(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    std %f9, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
 ; SZ13-NEXT:    .cfi_offset %f9, -176
-; SZ13-NEXT:    larl %r1, .LCPI33_0
-; SZ13-NEXT:    ld %f9, 0(%r1)
 ; SZ13-NEXT:    vl %v0, 0(%r2), 4
 ; SZ13-NEXT:    ld %f8, 16(%r2)
+; SZ13-NEXT:    llihh %r0, 16392
+; SZ13-NEXT:    vlvgg %v9, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f9
 ; SZ13-NEXT:    lgr %r13, %r2
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d killed $v0
 ; SZ13-NEXT:    brasl %r14, pow@PLT
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    vl %v0, 176(%r15), 3 # 16-byte Folded Reload

 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -200
 ; SZ13-NEXT:    .cfi_def_cfa_offset 360
 ; SZ13-NEXT:    std %f8, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
 ; SZ13-NEXT:    larl %r1, .LCPI34_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI34_1
-; SZ13-NEXT:    ld %f8, 0(%r1)
+; SZ13-NEXT:    llihh %r0, 16392
+; SZ13-NEXT:    vlvgg %v8, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, pow@PLT
-; SZ13-NEXT:    larl %r1, .LCPI34_2
+; SZ13-NEXT:    larl %r1, .LCPI34_1
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, pow@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI34_3
+; SZ13-NEXT:    larl %r1, .LCPI34_2
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, pow@PLT
-; SZ13-NEXT:    larl %r1, .LCPI34_4
+; SZ13-NEXT:    larl %r1, .LCPI34_3
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, pow@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    ld %f8, 192(%r15) # 8-byte Folded Reload

 ;
 ; SZ13-LABEL: constrained_vector_powi_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI35_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    lghi %r2, 3
 ; SZ13-NEXT:    brasl %r14, __powisf2@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32(

 ;
 ; SZ13-LABEL: constrained_vector_powi_v3f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI37_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    lghi %r2, 3
 ; SZ13-NEXT:    brasl %r14, __powisf2@PLT
-; SZ13-NEXT:    larl %r1, .LCPI37_1
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    lghi %r2, 3
 ; SZ13-NEXT:    brasl %r14, __powisf2@PLT
-; SZ13-NEXT:    larl %r1, .LCPI37_2
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    lghi %r2, 3
 ; SZ13-NEXT:    brasl %r14, __powisf2@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1

 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
 ; SZ13-NEXT:    larl %r1, .LCPI38_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    lgr %r13, %r2
 ; SZ13-NEXT:    lghi %r2, 3
 ; SZ13-NEXT:    brasl %r14, __powidf2@PLT
-; SZ13-NEXT:    larl %r1, .LCPI38_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    lghi %r2, 3
 ; SZ13-NEXT:    brasl %r14, __powidf2@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI38_2
+; SZ13-NEXT:    larl %r1, .LCPI38_1
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    lghi %r2, 3
 ; SZ13-NEXT:    brasl %r14, __powidf2@PLT
 ; SZ13-NEXT:    std %f0, 16(%r13)
 ; SZ13-NEXT:    vl %v0, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vst %v0, 0(%r13), 4
 ; SZ13-NEXT:    lmg %r13, %r15, 280(%r15)

 ;
 ; SZ13-LABEL: constrained_vector_sin_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI40_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, sinf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32(
                              <1 x float> <float 42.0>,

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
 ; SZ13-NEXT:    larl %r1, .LCPI41_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, sin@PLT
-; SZ13-NEXT:    larl %r1, .LCPI41_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, sin@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64(

 ;
 ; SZ13-LABEL: constrained_vector_sin_v3f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI42_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, sinf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI42_1
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, sinf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI42_2
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, sinf@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
 ; SZ13-NEXT:    larl %r1, .LCPI44_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, sin@PLT
-; SZ13-NEXT:    larl %r1, .LCPI44_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, sin@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI44_2
+; SZ13-NEXT:    larl %r1, .LCPI44_1
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, sin@PLT
-; SZ13-NEXT:    larl %r1, .LCPI44_3
+; SZ13-NEXT:    larl %r1, .LCPI44_2
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, sin@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1

 ;
 ; SZ13-LABEL: constrained_vector_cos_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI45_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, cosf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32(
                              <1 x float> <float 42.0>,

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
 ; SZ13-NEXT:    larl %r1, .LCPI46_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, cos@PLT
-; SZ13-NEXT:    larl %r1, .LCPI46_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, cos@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64(

 ;
 ; SZ13-LABEL: constrained_vector_cos_v3f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI47_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, cosf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI47_1
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, cosf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI47_2
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, cosf@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
 ; SZ13-NEXT:    larl %r1, .LCPI49_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, cos@PLT
-; SZ13-NEXT:    larl %r1, .LCPI49_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, cos@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI49_2
+; SZ13-NEXT:    larl %r1, .LCPI49_1
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, cos@PLT
-; SZ13-NEXT:    larl %r1, .LCPI49_3
+; SZ13-NEXT:    larl %r1, .LCPI49_2
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, cos@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1

 ;
 ; SZ13-LABEL: constrained_vector_exp_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI50_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, expf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32(
                              <1 x float> <float 42.0>,

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
 ; SZ13-NEXT:    larl %r1, .LCPI51_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, exp@PLT
-; SZ13-NEXT:    larl %r1, .LCPI51_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, exp@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64(

 ;
 ; SZ13-LABEL: constrained_vector_exp_v3f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI52_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, expf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI52_1
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, expf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI52_2
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, expf@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
 ; SZ13-NEXT:    larl %r1, .LCPI54_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, exp@PLT
-; SZ13-NEXT:    larl %r1, .LCPI54_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, exp@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI54_2
+; SZ13-NEXT:    larl %r1, .LCPI54_1
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, exp@PLT
-; SZ13-NEXT:    larl %r1, .LCPI54_3
+; SZ13-NEXT:    larl %r1, .LCPI54_2
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, exp@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1

 ;
 ; SZ13-LABEL: constrained_vector_exp2_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI55_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, exp2f@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32(
                              <1 x float> <float 42.0>,

 ;
 ; SZ13-LABEL: constrained_vector_exp2_v2f64:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
-; SZ13-NEXT:    larl %r1, .LCPI56_0
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    llihh %r0, 16453
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, exp2@PLT
-; SZ13-NEXT:    larl %r1, .LCPI56_1
+; SZ13-NEXT:    larl %r1, .LCPI56_0
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, exp2@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)

 ;
 ; SZ13-LABEL: constrained_vector_exp2_v3f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI57_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, exp2f@PLT
-; SZ13-NEXT:    larl %r1, .LCPI57_1
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, exp2f@PLT
-; SZ13-NEXT:    larl %r1, .LCPI57_2
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, exp2f@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)

 ;
 ; SZ13-LABEL: constrained_vector_log_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI60_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, logf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %log = call <1 x float> @llvm.experimental.constrained.log.v1f32(
                              <1 x float> <float 42.0>,

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
 ; SZ13-NEXT:    larl %r1, .LCPI61_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log@PLT
-; SZ13-NEXT:    larl %r1, .LCPI61_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %log = call <2 x double> @llvm.experimental.constrained.log.v2f64(

 ;
 ; SZ13-LABEL: constrained_vector_log_v3f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI62_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, logf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI62_1
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, logf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI62_2
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, logf@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
 ; SZ13-NEXT:    larl %r1, .LCPI64_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log@PLT
-; SZ13-NEXT:    larl %r1, .LCPI64_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI64_2
+; SZ13-NEXT:    larl %r1, .LCPI64_1
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log@PLT
-; SZ13-NEXT:    larl %r1, .LCPI64_3
+; SZ13-NEXT:    larl %r1, .LCPI64_2
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1

 ;
 ; SZ13-LABEL: constrained_vector_log10_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI65_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log10f@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32(
                              <1 x float> <float 42.0>,

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
 ; SZ13-NEXT:    larl %r1, .LCPI66_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log10@PLT
-; SZ13-NEXT:    larl %r1, .LCPI66_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log10@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64(

 ;
 ; SZ13-LABEL: constrained_vector_log10_v3f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI67_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log10f@PLT
-; SZ13-NEXT:    larl %r1, .LCPI67_1
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log10f@PLT
-; SZ13-NEXT:    larl %r1, .LCPI67_2
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log10f@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
 ; SZ13-NEXT:    larl %r1, .LCPI69_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log10@PLT
-; SZ13-NEXT:    larl %r1, .LCPI69_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log10@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI69_2
+; SZ13-NEXT:    larl %r1, .LCPI69_1
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log10@PLT
-; SZ13-NEXT:    larl %r1, .LCPI69_3
+; SZ13-NEXT:    larl %r1, .LCPI69_2
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log10@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1

 ;
 ; SZ13-LABEL: constrained_vector_log2_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI70_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log2f@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32(
                              <1 x float> <float 42.0>,

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
 ; SZ13-NEXT:    larl %r1, .LCPI71_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log2@PLT
-; SZ13-NEXT:    larl %r1, .LCPI71_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log2@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64(

 ;
 ; SZ13-LABEL: constrained_vector_log2_v3f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI72_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log2f@PLT
-; SZ13-NEXT:    larl %r1, .LCPI72_1
+; SZ13-NEXT:    llilh %r0, 16936
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log2f@PLT
-; SZ13-NEXT:    larl %r1, .LCPI72_2
+; SZ13-NEXT:    llilh %r0, 16940
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log2f@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)

 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
 ; SZ13-NEXT:    larl %r1, .LCPI74_0
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log2@PLT
-; SZ13-NEXT:    larl %r1, .LCPI74_1
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
 ; SZ13-NEXT:    brasl %r14, log2@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI74_2
+; SZ13-NEXT:    larl %r1, .LCPI74_1
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log2@PLT
-; SZ13-NEXT:    larl %r1, .LCPI74_3
+; SZ13-NEXT:    larl %r1, .LCPI74_2
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    ld %f0, 0(%r1)
 ; SZ13-NEXT:    brasl %r14, log2@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1

 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI75_0
 ; S390X-NEXT:    le %f0, 0(%r1)
 ; S390X-NEXT:    fiebr %f0, 0, %f0
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_rint_v1f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI75_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    fiebr %f0, 0, %f0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    br %r14
 entry:
   %rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32(
                              <1 x float> <float 42.0>,
                              metadata !"round.dynamic",
                              metadata !"fpexcept.strict") #0

 ; S390X-NEXT:    le %f3, 0(%r1)
 ; S390X-NEXT:    fiebr %f4, 0, %f0
 ; S390X-NEXT:    fiebr %f2, 0, %f1
 ; S390X-NEXT:    fiebr %f0, 0, %f3
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_rint_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI77_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI77_1
-; SZ13-NEXT:    lde %f1, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI77_2
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v1, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16940
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    fiebr %f0, 0, %f0
 ; SZ13-NEXT:    fiebr %f1, 0, %f1
 ; SZ13-NEXT:    fiebr %f2, 0, %f2
 ; SZ13-NEXT:    vmrhf %v1, %v1, %v2
 ; SZ13-NEXT:    vrepf %v0, %v0, 0
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
  entry:

 ; S390X-NEXT:    larl %r1, .LCPI80_0
 ; S390X-NEXT:    le %f0, 0(%r1)
 ; S390X-NEXT:    brasl %r14, nearbyintf@PLT
 ; S390X-NEXT:    lmg %r14, %r15, 272(%r15)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_nearbyint_v1f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI80_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    fiebra %f0, 0, %f0, 4
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    br %r14
 entry:
   %nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32(
                                <1 x float> <float 42.0>,
                                metadata !"round.dynamic",
                                metadata !"fpexcept.strict") #0

 ; S390X-NEXT:    ler %f4, %f8
 ; S390X-NEXT:    ld %f8, 168(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    ld %f9, 160(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    lmg %r14, %r15, 288(%r15)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_nearbyint_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI82_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI82_1
-; SZ13-NEXT:    lde %f1, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI82_2
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v1, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16940
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    fiebra %f0, 0, %f0, 4
 ; SZ13-NEXT:    fiebra %f1, 0, %f1, 4
 ; SZ13-NEXT:    fiebra %f2, 0, %f2, 4
 ; SZ13-NEXT:    vmrhf %v1, %v1, %v2
 ; SZ13-NEXT:    vrepf %v0, %v0, 0
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry:

 ;
 ; SZ13-LABEL: constrained_vector_maxnum_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI85_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI85_1
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16932
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmaxf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32(
                                <1 x float> <float 42.0>, <1 x float> <float 41.0>,

 ;
 ; SZ13-LABEL: constrained_vector_maxnum_v2f64:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
-; SZ13-NEXT:    larl %r1, .LCPI86_0
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI86_1
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    llihh %r0, 16453
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihh %r0, 16452
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
-; SZ13-NEXT:    larl %r1, .LCPI86_2
+; SZ13-NEXT:    llihf %r0, 1078296576
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI86_3
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihf %r0, 1078231040
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64(

 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -200
 ; SZ13-NEXT:    .cfi_def_cfa_offset 360
 ; SZ13-NEXT:    std %f8, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
-; SZ13-NEXT:    larl %r1, .LCPI87_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI87_1
-; SZ13-NEXT:    lde %f8, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16948
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16940
+; SZ13-NEXT:    vlvgf %v8, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fmaxf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI87_2
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16932
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    ldr %f0, %f8
 ; SZ13-NEXT:    brasl %r14, fmaxf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI87_3
+; SZ13-NEXT:    llilh %r0, 16944
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI87_4
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmaxf@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    ld %f8, 192(%r15) # 8-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1

 ; SZ13-NEXT:    stmg %r13, %r15, 104(%r15)
 ; SZ13-NEXT:    .cfi_offset %r13, -56
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -200
 ; SZ13-NEXT:    .cfi_def_cfa_offset 360
 ; SZ13-NEXT:    std %f8, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
-; SZ13-NEXT:    larl %r1, .LCPI88_0
 ; SZ13-NEXT:    vl %v0, 0(%r2), 4
-; SZ13-NEXT:    ld %f2, 0(%r1)
 ; SZ13-NEXT:    ld %f8, 16(%r2)
+; SZ13-NEXT:    llihh %r0, 16452
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    lgr %r13, %r2
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d killed $v0
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
-; SZ13-NEXT:    larl %r1, .LCPI88_1
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    vl %v0, 176(%r15), 3 # 16-byte Folded Reload
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    llihf %r0, 1078231040
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    vrepg %v0, %v0, 1
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d killed $v0
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
-; SZ13-NEXT:    larl %r1, .LCPI88_2
-; SZ13-NEXT:    ld %f2, 0(%r1)
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v1, %v0
+; SZ13-NEXT:    llihh %r0, 16453
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    ldr %f0, %f8
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
 ; SZ13-NEXT:    std %f0, 16(%r13)
 ; SZ13-NEXT:    vl %v0, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    ld %f8, 192(%r15) # 8-byte Folded Reload
 ; SZ13-NEXT:    vst %v0, 0(%r13), 4
 ; SZ13-NEXT:    lmg %r13, %r15, 304(%r15)
 ; SZ13-NEXT:    br %r14

 ;
 ; SZ13-LABEL: constrained_vector_maxnum_v4f64:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI89_0
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI89_1
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    llihf %r0, 1078362112
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihf %r0, 1078231040
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
-; SZ13-NEXT:    larl %r1, .LCPI89_2
+; SZ13-NEXT:    llihh %r0, 16454
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI89_3
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihh %r0, 16452
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI89_4
+; SZ13-NEXT:    llihf %r0, 1078427648
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI89_5
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihf %r0, 1078296576
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
-; SZ13-NEXT:    larl %r1, .LCPI89_6
+; SZ13-NEXT:    llihh %r0, 16455
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI89_7
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihh %r0, 16453
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmax@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)
 ; SZ13-NEXT:    br %r14
 entry:

 ;
 ; SZ13-LABEL: constrained_vector_minnum_v1f32:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -160
 ; SZ13-NEXT:    .cfi_def_cfa_offset 320
-; SZ13-NEXT:    larl %r1, .LCPI90_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI90_1
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16932
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fminf@PLT
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vlr %v24, %v0
 ; SZ13-NEXT:    lmg %r14, %r15, 272(%r15)
 ; SZ13-NEXT:    br %r14
  entry:
   %min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32(
                                <1 x float> <float 42.0>, <1 x float> <float 41.0>,

 ;
 ; SZ13-LABEL: constrained_vector_minnum_v2f64:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -176
 ; SZ13-NEXT:    .cfi_def_cfa_offset 336
-; SZ13-NEXT:    larl %r1, .LCPI91_0
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI91_1
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    llihh %r0, 16453
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihh %r0, 16452
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmin@PLT
-; SZ13-NEXT:    larl %r1, .LCPI91_2
+; SZ13-NEXT:    llihf %r0, 1078296576
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI91_3
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihf %r0, 1078231040
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmin@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 288(%r15)
 ; SZ13-NEXT:    br %r14
 entry:
   %min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64(

 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -200
 ; SZ13-NEXT:    .cfi_def_cfa_offset 360
 ; SZ13-NEXT:    std %f8, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
-; SZ13-NEXT:    larl %r1, .LCPI92_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI92_1
-; SZ13-NEXT:    lde %f8, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16948
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16940
+; SZ13-NEXT:    vlvgf %v8, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f8
 ; SZ13-NEXT:    brasl %r14, fminf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI92_2
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16932
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    ldr %f0, %f8
 ; SZ13-NEXT:    brasl %r14, fminf@PLT
-; SZ13-NEXT:    larl %r1, .LCPI92_3
+; SZ13-NEXT:    llilh %r0, 16944
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI92_4
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fminf@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0s killed $f0s def $v0
 ; SZ13-NEXT:    vmrhf %v0, %v1, %v0
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    ld %f8, 192(%r15) # 8-byte Folded Reload
 ; SZ13-NEXT:    vrepf %v1, %v1, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1

 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -208
 ; SZ13-NEXT:    .cfi_def_cfa_offset 368
 ; SZ13-NEXT:    std %f8, 200(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    std %f9, 192(%r15) # 8-byte Folded Spill
 ; SZ13-NEXT:    .cfi_offset %f8, -168
 ; SZ13-NEXT:    .cfi_offset %f9, -176
-; SZ13-NEXT:    larl %r1, .LCPI93_0
-; SZ13-NEXT:    ld %f9, 0(%r1)
 ; SZ13-NEXT:    vl %v0, 0(%r2), 4
 ; SZ13-NEXT:    ld %f8, 16(%r2)
+; SZ13-NEXT:    llihh %r0, 16392
+; SZ13-NEXT:    vlvgg %v9, %r0, 0
 ; SZ13-NEXT:    ldr %f2, %f9
 ; SZ13-NEXT:    lgr %r13, %r2
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d killed $v0
 ; SZ13-NEXT:    brasl %r14, fmin@PLT
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
 ; SZ13-NEXT:    vl %v0, 176(%r15), 3 # 16-byte Folded Reload

 ;
 ; SZ13-LABEL: constrained_vector_minnum_v4f64:
 ; SZ13:       # %bb.0: # %entry
 ; SZ13-NEXT:    stmg %r14, %r15, 112(%r15)
 ; SZ13-NEXT:    .cfi_offset %r14, -48
 ; SZ13-NEXT:    .cfi_offset %r15, -40
 ; SZ13-NEXT:    aghi %r15, -192
 ; SZ13-NEXT:    .cfi_def_cfa_offset 352
-; SZ13-NEXT:    larl %r1, .LCPI94_0
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI94_1
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    llihf %r0, 1078362112
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihf %r0, 1078231040
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmin@PLT
-; SZ13-NEXT:    larl %r1, .LCPI94_2
+; SZ13-NEXT:    llihh %r0, 16454
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI94_3
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihh %r0, 16452
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmin@PLT
 ; SZ13-NEXT:    vl %v1, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v0, %v0, %v1
-; SZ13-NEXT:    larl %r1, .LCPI94_4
+; SZ13-NEXT:    llihf %r0, 1078427648
 ; SZ13-NEXT:    vst %v0, 160(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI94_5
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihf %r0, 1078296576
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmin@PLT
-; SZ13-NEXT:    larl %r1, .LCPI94_6
+; SZ13-NEXT:    llihh %r0, 16455
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vst %v0, 176(%r15), 3 # 16-byte Folded Spill
-; SZ13-NEXT:    ld %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI94_7
-; SZ13-NEXT:    ld %f2, 0(%r1)
+; SZ13-NEXT:    vlvgg %v0, %r0, 0
+; SZ13-NEXT:    llihh %r0, 16453
+; SZ13-NEXT:    vlvgg %v2, %r0, 0
 ; SZ13-NEXT:    brasl %r14, fmin@PLT
 ; SZ13-NEXT:    vl %v1, 176(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    vl %v24, 160(%r15), 3 # 16-byte Folded Reload
 ; SZ13-NEXT:    # kill: def $f0d killed $f0d def $v0
 ; SZ13-NEXT:    vmrhg %v26, %v0, %v1
 ; SZ13-NEXT:    lmg %r14, %r15, 304(%r15)
 ; SZ13-NEXT:    br %r14
 entry:

 ; S390X-LABEL: constrained_vector_fpext_v1f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI99_0
 ; S390X-NEXT:    ldeb %f0, 0(%r1)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fpext_v1f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI99_0
-; SZ13-NEXT:    ldeb %f0, 0(%r1)
-; SZ13-NEXT:    vlr %v24, %v0
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    wldeb %v24, %f0
 ; SZ13-NEXT:    br %r14
 entry:
   %result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(
                                 <1 x float><float 42.0>,
                                 metadata !"fpexcept.strict") #0
   ret <1 x double> %result
 }
 
 define <2 x double> @constrained_vector_fpext_v2f32() #0 {
 ; S390X-LABEL: constrained_vector_fpext_v2f32:
 ; S390X:       # %bb.0: # %entry
 ; S390X-NEXT:    larl %r1, .LCPI100_0
 ; S390X-NEXT:    ldeb %f2, 0(%r1)
 ; S390X-NEXT:    larl %r1, .LCPI100_1
 ; S390X-NEXT:    ldeb %f0, 0(%r1)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fpext_v2f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI100_0
-; SZ13-NEXT:    ldeb %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI100_1
-; SZ13-NEXT:    ldeb %f1, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16940
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v1, %r0, 0
+; SZ13-NEXT:    ldebr %f0, %f0
+; SZ13-NEXT:    ldebr %f1, %f1
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry:
   %result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(
                                 <2 x float><float 42.0, float 43.0>,
                                 metadata !"fpexcept.strict") #0
   ret <2 x double> %result
 }

 ; S390X-NEXT:    larl %r1, .LCPI102_2
 ; S390X-NEXT:    ldeb %f2, 0(%r1)
 ; S390X-NEXT:    larl %r1, .LCPI102_3
 ; S390X-NEXT:    ldeb %f0, 0(%r1)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fpext_v4f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI102_0
-; SZ13-NEXT:    ldeb %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI102_1
-; SZ13-NEXT:    ldeb %f1, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI102_2
+; SZ13-NEXT:    llilh %r0, 16940
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16936
+; SZ13-NEXT:    vlvgf %v1, %r0, 0
+; SZ13-NEXT:    ldebr %f0, %f0
+; SZ13-NEXT:    ldebr %f1, %f1
+; SZ13-NEXT:    llilh %r0, 16948
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
-; SZ13-NEXT:    ldeb %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI102_3
-; SZ13-NEXT:    ldeb %f1, 0(%r1)
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
+; SZ13-NEXT:    llilh %r0, 16944
+; SZ13-NEXT:    vlvgf %v1, %r0, 0
+; SZ13-NEXT:    ldebr %f0, %f0
+; SZ13-NEXT:    ldebr %f1, %f1
 ; SZ13-NEXT:    vmrhg %v26, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry:
   %result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32(
                                 <4 x float><float 42.0, float 43.0,
                                             float 44.0, float 45.0>,
                                 metadata !"fpexcept.strict") #0
   ret <4 x double> %result

 ; S390X-NEXT:    ler %f4, %f8
 ; S390X-NEXT:    ld %f8, 168(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    ld %f9, 160(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    lmg %r14, %r15, 288(%r15)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_ceil_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI105_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI105_1
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16480
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    vgmf %v1, 2, 9
+; SZ13-NEXT:    llilh %r0, 16416
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    fiebra %f0, 6, %f0, 4
 ; SZ13-NEXT:    fiebra %f1, 6, %f1, 4
 ; SZ13-NEXT:    fiebra %f2, 6, %f2, 4
 ; SZ13-NEXT:    vmrhf %v1, %v1, %v2
 ; SZ13-NEXT:    vrepf %v0, %v0, 0
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry:

 ; S390X-NEXT:    ler %f4, %f8
 ; S390X-NEXT:    ld %f8, 168(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    ld %f9, 160(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    lmg %r14, %r15, 288(%r15)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_floor_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI109_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI109_1
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16480
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    vgmf %v1, 2, 9
+; SZ13-NEXT:    llilh %r0, 16416
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    fiebra %f0, 7, %f0, 4
 ; SZ13-NEXT:    fiebra %f1, 7, %f1, 4
 ; SZ13-NEXT:    fiebra %f2, 7, %f2, 4
 ; SZ13-NEXT:    vmrhf %v1, %v1, %v2
 ; SZ13-NEXT:    vrepf %v0, %v0, 0
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry:

 ; S390X-NEXT:    ler %f4, %f8
 ; S390X-NEXT:    ld %f8, 168(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    ld %f9, 160(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    lmg %r14, %r15, 288(%r15)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_round_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI113_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI113_1
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16480
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    vgmf %v1, 2, 9
+; SZ13-NEXT:    llilh %r0, 16416
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    fiebra %f0, 1, %f0, 4
 ; SZ13-NEXT:    fiebra %f1, 1, %f1, 4
 ; SZ13-NEXT:    fiebra %f2, 1, %f2, 4
 ; SZ13-NEXT:    vmrhf %v1, %v1, %v2
 ; SZ13-NEXT:    vrepf %v0, %v0, 0
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry:

 ; S390X-NEXT:    ler %f4, %f8
 ; S390X-NEXT:    ld %f8, 168(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    ld %f9, 160(%r15) # 8-byte Folded Reload
 ; S390X-NEXT:    lmg %r14, %r15, 288(%r15)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_trunc_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    larl %r1, .LCPI117_0
-; SZ13-NEXT:    lde %f0, 0(%r1)
-; SZ13-NEXT:    larl %r1, .LCPI117_1
-; SZ13-NEXT:    lde %f2, 0(%r1)
+; SZ13-NEXT:    llilh %r0, 16480
+; SZ13-NEXT:    vlvgf %v0, %r0, 0
 ; SZ13-NEXT:    vgmf %v1, 2, 9
+; SZ13-NEXT:    llilh %r0, 16416
+; SZ13-NEXT:    vlvgf %v2, %r0, 0
 ; SZ13-NEXT:    fiebra %f0, 5, %f0, 4
 ; SZ13-NEXT:    fiebra %f1, 5, %f1, 4
 ; SZ13-NEXT:    fiebra %f2, 5, %f2, 4
 ; SZ13-NEXT:    vmrhf %v1, %v1, %v2
 ; SZ13-NEXT:    vrepf %v0, %v0, 0
 ; SZ13-NEXT:    vmrhg %v24, %v1, %v0
 ; SZ13-NEXT:    br %r14
 entry: