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[MC][AVR] Implement decoding ST/LD
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Authored by benshi001 on Apr 10 2022, 6:48 PM.

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benshi001 created this revision.Apr 10 2022, 6:48 PM
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benshi001 requested review of this revision.Apr 10 2022, 6:48 PM
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benshi001 added inline comments.Apr 10 2022, 6:53 PM
llvm/test/MC/AVR/inst-ld.s
79

ldd Rd, Y+0 is equivalant to ld Rd, Y in all factors: encoding, HW functionality and SW semantic.

llvm/test/MC/AVR/inst-st.s
77

std Y+0, Rr is equivalant to ST Y, Rr in all factors: encoding, HW functionality and SW semantic.

benshi001 added inline comments.Apr 10 2022, 6:56 PM
llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
445

The LD/ST instructions should be correctly decoded by the above decodeInstruction, unfortunately we have to explicitly use a specified DecoderFunction decodeLoadStore.

As I mentioned in https://reviews.llvm.org/D123442, we should re-think the organization of definition of LD/ST/LDD/STD in TD files to avoid that. But currently I can not figure out a proper way, it invloves register allocation.

aykevl accepted this revision.May 4 2022, 2:19 PM
This revision is now accepted and ready to land.May 4 2022, 2:19 PM
This revision was landed with ongoing or failed builds.May 4 2022, 7:08 PM
This revision was automatically updated to reflect the committed changes.