[AVR] Generate 'rcall' instead of 'call' on avr2 and avr25

[benshi001]

Summary

The 'call' (long call) instruction is available on avr3 and above,
and devices in avr2 and avr25 should use the 'rcall' (short call)
instruction for function calls.

[benshi001]

This patch fixes bug https://github.com/llvm/llvm-project/issues/54345 .

[aykevl]

Looks good to me!

As a possible optimization, you could look into using rcall instead of call instructions when the target is close enough. For example, here: https://godbolt.org/z/rEz9j71dq (apparently avr-gcc doesn't do this optimization).

int foo(int a, int b) {
    return a + b;
}

int bar(int a, int b) {
    return foo(a, b) + 3;
}

If -ffunction-sections is not used, rcall is both shorter in code size and faster in execution speed.
(This is just an idea, unrelated to this patch).

[benshi001]

In D121539#3401092, @aykevl wrote:

Looks good to me!

As a possible optimization, you could look into using rcall instead of call instructions when the target is close enough. For example, here: https://godbolt.org/z/rEz9j71dq (apparently avr-gcc doesn't do this optimization).

int foo(int a, int b) {
    return a + b;
}

int bar(int a, int b) {
    return foo(a, b) + 3;
}

If -ffunction-sections is not used, rcall is both shorter in code size and faster in execution speed.
(This is just an idea, unrelated to this patch).

Thanks. I have created an issue to note this task.
https://github.com/llvm/llvm-project/issues/54508

llvm/lib/Target/AVR/AVRInstrInfo.td

def relbrtarget_7 : Operand<OtherVT> {
   let EncoderMethod = "encodeRelCondBrTarget<AVR::fixup_7_pcrel>";
 }
 
 def brtarget_13 : Operand<OtherVT> {
   let PrintMethod = "printPCRelImm";
   let EncoderMethod = "encodeRelCondBrTarget<AVR::fixup_13_pcrel>";
 }
 
+def rcalltarget_13 : Operand<i16> {
+  let PrintMethod = "printPCRelImm";
+  let EncoderMethod = "encodeRelCondBrTarget<AVR::fixup_13_pcrel>";
+}
+
 // The target of a 22 or 16-bit call/jmp instruction.
 def call_target : Operand<iPTR> {
   let EncoderMethod = "encodeCallTarget";
   let DecoderMethod = "decodeCallTarget";
 }
 
 // A 16-bit address (which can lead to an R_AVR_16 relocation).
 def imm16 : Operand<i16> { let EncoderMethod = "encodeImm<AVR::fixup_16, 2>"; }

 }
 
 //===----------------------------------------------------------------------===//
 // Call instructions
 //===----------------------------------------------------------------------===//
 let isCall = 1 in {
   // SP is marked as a use to prevent stack-pointer assignments that appear
   // immediately before calls from potentially appearing dead.
-  let Uses = [SP] in def RCALLk : FBRk<1, (outs),
-                                       (ins brtarget_13
-                                        : $target),
-                                       "rcall\t$target", []>;
+  let Uses = [SP] in def RCALLk : FBRk<1, (outs), (ins rcalltarget_13:$k),
+                                       "rcall\t$k", [(AVRcall imm:$k)]>;
 
   // SP is marked as a use to prevent stack-pointer assignments that appear
   // immediately before calls from potentially appearing dead.
   let Uses = [SP, R31R30] in def ICALL
       : F16<0b1001010100001001, (outs), (ins variable_ops), "icall", []>,
       Requires<[HasIJMPCALL]>;
 
   // SP is marked as a use to prevent stack-pointer assignments that appear
   // immediately before calls from potentially appearing dead.
   let Uses = [SP, R31R30] in def EICALL
       : F16<0b1001010100011001, (outs), (ins variable_ops), "eicall", []>,
       Requires<[HasEIJMPCALL]>;
 
   // SP is marked as a use to prevent stack-pointer assignments that appear
   // immediately before calls from potentially appearing dead.
   //
-  //: TODO: the imm field can be either 16 or 22 bits in devices with more
+  // TODO: the imm field can be either 16 or 22 bits in devices with more
   // than 64k of ROM, fix it once we support the largest devices.
-  let Uses = [SP] in def CALLk : F32BRk<0b111, (outs),
-                                        (ins call_target
-                                         : $k),
-                                        "call\t$k", [(AVRcall imm
-                                                      : $k)]>,
+  let Uses = [SP] in def CALLk : F32BRk<0b111, (outs), (ins call_target:$k),
+                                        "call\t$k", [(AVRcall imm:$k)]>,
       Requires<[HasJMPCALL]>;
 }
 
 //===----------------------------------------------------------------------===//
 // Return instructions.
 //===----------------------------------------------------------------------===//
 let isTerminator = 1, isReturn = 1, isBarrier = 1 in {
   def RET : F16<0b1001010100001000, (outs), (ins), "ret", [(AVRretflag)]>;

 def : Pat<(adde i8
            : $src1, imm
            : $src2),
           (SBCIRdK i8
            : $src1, (imm8_neg_XFORM imm
                      : $src2))>;
 
 // Calls.
-def : Pat<(AVRcall(i16 tglobaladdr : $dst)), (CALLk tglobaladdr : $dst)>;
-def : Pat<(AVRcall(i16 texternalsym : $dst)), (CALLk texternalsym : $dst)>;
+let Predicates = [HasJMPCALL] in {
+  def : Pat<(AVRcall(i16 tglobaladdr:$dst)), (CALLk tglobaladdr:$dst)>;
+  def : Pat<(AVRcall(i16 texternalsym:$dst)), (CALLk texternalsym:$dst)>;
+}
+def : Pat<(AVRcall(i16 tglobaladdr:$dst)), (RCALLk tglobaladdr:$dst)>;
+def : Pat<(AVRcall(i16 texternalsym:$dst)), (RCALLk texternalsym:$dst)>;
 
 // `anyext`
 def : Pat<(i16(anyext i8
                : $src)),
           (INSERT_SUBREG(i16(IMPLICIT_DEF)), i8
            : $src, sub_lo)>;
 
 // `trunc`

llvm/test/CodeGen/AVR/call.ll

-; RUN: llc < %s -march=avr -mattr=avr6 | FileCheck %s
+; RUN: llc < %s -mtriple=avr -mcpu=avr6 | FileCheck %s --check-prefixes=CHECK,AVR6
+; RUN: llc < %s -mtriple=avr -mcpu=avr2 | FileCheck %s --check-prefixes=CHECK,AVR2
 
 ; TODO: test returning byval structs
 
 declare i8 @foo8_1(i8)
 declare i8 @foo8_2(i8, i8, i8)
 declare i8 @foo8_3(i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8)
 
 declare i16 @foo16_1(i16, i16)
 declare i16 @foo16_2(i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16)
 
 declare i32 @foo32_1(i32, i32)
 declare i32 @foo32_2(i32, i32, i32, i32, i32)
 
 declare i64 @foo64_1(i64)
 declare i64 @foo64_2(i64, i64, i64)
 
 define i8 @calli8_reg() {
 ; CHECK-LABEL: calli8_reg:
 ; CHECK: ldi r24, 12
-; CHECK: call foo8_1
+; AVR6:  call foo8_1
+; AVR2:  rcall foo8_1
 ; CHECK: ldi r24, 12
 ; CHECK: ldi r22, 13
 ; CHECK: ldi r20, 14
-; CHECK: call foo8_2
+; AVR6:  call foo8_2
+; AVR2:  rcall foo8_2
     %result1 = call i8 @foo8_1(i8 12)
     %result2 = call i8 @foo8_2(i8 12, i8 13, i8 14)
     ret i8 %result2
 }
 
 define i8 @calli8_stack() {
 ; CHECK-LABEL: calli8_stack:
 ; CHECK: ldi [[REG1:r[0-9]+]], 10
 ; CHECK: ldi [[REG2:r[0-9]+]], 11
 ; CHECK: std Z+1, [[REG1]]
 ; CHECK: std Z+2, [[REG2]]
-; CHECK: call foo8_3
+; AVR6:  call foo8_3
+; AVR2:  rcall foo8_3
     %result1 = call i8 @foo8_3(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11)
     ret i8 %result1
 }
 
 define i16 @calli16_reg() {
 ; CHECK-LABEL: calli16_reg:
 ; CHECK: ldi r24, 1
 ; CHECK: ldi r25, 2
 ; CHECK: ldi r22, 2
 ; CHECK: ldi r23, 2
-; CHECK: call foo16_1
+; AVR6:  call foo16_1
+; AVR2:  rcall foo16_1
     %result1 = call i16 @foo16_1(i16 513, i16 514)
     ret i16 %result1
 }
 
 define i16 @calli16_stack() {
 ; CHECK-LABEL: calli16_stack:
 ; CHECK: ldi [[REG1:r[0-9]+]], 10
 ; CHECK: ldi [[REG2:r[0-9]+]], 2
 ; CHECK: std Z+3, [[REG1]]
 ; CHECK: std Z+4, [[REG2]]
 ; CHECK: ldi [[REG1:r[0-9]+]], 9
 ; CHECK: ldi [[REG2:r[0-9]+]], 2
 ; CHECK: std Z+1, [[REG1]]
 ; CHECK: std Z+2, [[REG2]]
-; CHECK: call foo16_2
+; AVR6:  call foo16_2
+; AVR2:  rcall foo16_2
     %result1 = call i16 @foo16_2(i16 512, i16 513, i16 514, i16 515, i16 516, i16 517, i16 518, i16 519, i16 520, i16 521, i16 522)
     ret i16 %result1
 }
 
 define i32 @calli32_reg() {
 ; CHECK-LABEL: calli32_reg:
 ; CHECK: ldi r22, 64
 ; CHECK: ldi r23, 66
 ; CHECK: ldi r24, 15
 ; CHECK: ldi r25, 2
 ; CHECK: ldi r18, 128
 ; CHECK: ldi r19, 132
 ; CHECK: ldi r20, 30
 ; CHECK: ldi r21, 2
-; CHECK: call foo32_1
+; AVR6:  call foo32_1
+; AVR2:  rcall foo32_1
     %result1 = call i32 @foo32_1(i32 34554432, i32 35554432)
     ret i32 %result1
 }
 
 define i32 @calli32_stack() {
 ; CHECK-LABEL: calli32_stack:
 ; CHECK: ldi [[REG1:r[0-9]+]], 15
 ; CHECK: ldi [[REG2:r[0-9]+]], 2
 ; CHECK: std Z+3, [[REG1]]
 ; CHECK: std Z+4, [[REG2]]
 ; CHECK: ldi [[REG1:r[0-9]+]], 64
 ; CHECK: ldi [[REG2:r[0-9]+]], 66
 ; CHECK: std Z+1, [[REG1]]
 ; CHECK: std Z+2, [[REG2]]
-; CHECK: call foo32_2
+; AVR6:  call foo32_2
+; AVR2:  rcall foo32_2
     %result1 = call i32 @foo32_2(i32 1, i32 2, i32 3, i32 4, i32 34554432)
     ret i32 %result1
 }
 
 define i64 @calli64_reg() {
 ; CHECK-LABEL: calli64_reg:
 ; CHECK: ldi r18, 255
 ; CHECK: ldi r19, 255
 ; CHECK: ldi r20, 155
 ; CHECK: ldi r21, 88
 ; CHECK: ldi r22, 76
 ; CHECK: ldi r23, 73
 ; CHECK: ldi r24, 31
 ; CHECK: ldi r25, 242
-; CHECK: call foo64_1
+; AVR6:  call foo64_1
+; AVR2:  rcall foo64_1
     %result1 = call i64 @foo64_1(i64 17446744073709551615)
     ret i64 %result1
 }
 
 define i64 @calli64_stack() {
 ; CHECK-LABEL: calli64_stack:
 
 ; CHECK: ldi [[REG1:r[0-9]+]], 31
 ; CHECK: ldi [[REG2:r[0-9]+]], 242
 ; CHECK: std Z+7, [[REG1]]
 ; CHECK: std Z+8, [[REG2]]
 ; CHECK: ldi [[REG1:r[0-9]+]], 76
 ; CHECK: ldi [[REG2:r[0-9]+]], 73
 ; CHECK: std Z+5, [[REG1]]
 ; CHECK: std Z+6, [[REG2]]
 ; CHECK: ldi [[REG1:r[0-9]+]], 155
 ; CHECK: ldi [[REG2:r[0-9]+]], 88
 ; CHECK: std Z+3, [[REG1]]
 ; CHECK: std Z+4, [[REG2]]
 ; CHECK: ldi [[REG1:r[0-9]+]], 255
 ; CHECK: ldi [[REG2:r[0-9]+]], 255
 ; CHECK: std Z+1, [[REG1]]
 ; CHECK: std Z+2, [[REG2]]
-; CHECK: call foo64_2
+; AVR6:  call foo64_2
+; AVR2:  rcall foo64_2
     %result1 = call i64 @foo64_2(i64 1, i64 2, i64 17446744073709551615)
     ret i64 %result1
 }
 
 ; Test passing arguments through the stack when the call frame is allocated
 ; in the prologue.
 declare void @foo64_3(i64, i64, i64, i8, i16*)
 
; CHECK: pop r28
   %p = alloca [8 x i16]
   %arraydecay = getelementptr inbounds [8 x i16], [8 x i16]* %p, i16 0, i16 0
   call void @foo64_3(i64 723685415333071112, i64 723685415333071112, i64 723685415333071112, i8 88, i16* %arraydecay)
   ret void
 }
 
 define i32 @icall(i32 (i32) addrspace(1)* %foo) {
 ; CHECK-LABEL: icall:
-; CHECK: movw r30, r24
+; AVR6:  movw r30, r24
+; AVR2:  mov r30, r24
+; AVR2:  mov r31, r25
 ; CHECK: ldi r22, 147
 ; CHECK: ldi r23, 248
 ; CHECK: ldi r24, 214
 ; CHECK: ldi r25, 198
 ; CHECK: icall
 ; CHECK: subi r22, 251
 ; CHECK: sbci r23, 255
 ; CHECK: sbci r24, 255
 ; CHECK: sbci r25, 255
   %1 = call i32 %foo(i32 3335977107)
   %2 = add nsw i32 %1, 5
   ret i32 %2
 }
 
 ; Calling external functions (like __divsf3) require extra processing for
 ; arguments and return values in the LowerCall function.
 declare i32 @foofloat(float)
 
 define i32 @externcall(float %a, float %b) {
 ; CHECK-LABEL: externcall:
-; CHECK: movw [[REG1:(r[0-9]+|[XYZ])]], r24
-; CHECK: movw [[REG2:(r[0-9]+|[XYZ])]], r22
-; CHECK: movw r22, r18
-; CHECK: movw r24, r20
-; CHECK: movw r18, [[REG2]]
-; CHECK: movw r20, [[REG1]]
-; CHECK: call __divsf3
-; CHECK: call foofloat
+; AVR6:  movw [[REG0:(r[0-9]+|[XYZ])]], r24
+; AVR6:  movw [[REG1:(r[0-9]+|[XYZ])]], r22
+; AVR6:  movw r22, r18
+; AVR6:  movw r24, r20
+; AVR6:  movw r18, [[REG1]]
+; AVR6:  movw r20, [[REG0]]
+; AVR6:  call __divsf3
+; AVR6:  call foofloat
+; AVR2:  mov [[REG0:(r[0-9]+)]], r24
+; AVR2:  mov [[REG1:(r[0-9]+)]], r25
+; AVR2:  mov [[REG2:(r[0-9]+)]], r22
+; AVR2:  mov [[REG3:(r[0-9]+)]], r23
+; AVR2:  mov r22, r18
+; AVR2:  mov r23, r19
+; AVR2:  mov r24, r20
+; AVR2:  mov r25, r21
+; AVR2:  mov r18, [[REG2]]
+; AVR2:  mov r19, [[REG3]]
+; AVR2:  mov r20, [[REG0]]
+; AVR2:  mov r21, [[REG1]]
+; AVR2:  rcall __divsf3
+; AVR2:  rcall foofloat
 ; CHECK: subi r22, 251
 ; CHECK: sbci r23, 255
 ; CHECK: sbci r24, 255
 ; CHECK: sbci r25, 255
   %1 = fdiv float %b, %a
   %2 = call i32 @foofloat(float %1)
   %3 = add nsw i32 %2, 5
   ret i32 %3
 }