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Differential D121394

[HWASan] Update use-after-scope test to use ARM64.
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Authored by fmayer on Mar 10 2022, 10:57 AM.

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hctim
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rG448c89415b7a: [HWASan] Update use-after-scope test to use ARM64.

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fmayer created this revision.Mar 10 2022, 10:57 AM
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fmayer requested review of this revision.Mar 10 2022, 10:57 AM
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fmayer updated this revision to Diff 414432.Mar 10 2022, 10:58 AM

update

fmayer added a reviewer: hctim.Mar 10 2022, 10:59 AM
fmayer added a child revision: D121395: [HWASan] add shortgranule tests to use-after-scope..Mar 10 2022, 11:05 AM
Harbormaster completed remote builds in B153604: Diff 414432.Mar 10 2022, 11:56 AM
hctim added a comment.Mar 10 2022, 3:36 PM

This test is really hard to validate changes to. I mean, it's basically "$COMPILER produces $BLOB", right? I'm not really sure what are the interesting parts I'm supposed to be looking for.

Is it possible to reduce the test to check the actual conditions?

Like, for standard_lifetime, we have lifetime start -> shadow setup (some minimal UID like __hwasan_generate_tag) -> lifetime end -> shadow teardown (some minimal UID like memset-zero).

fmayer added a comment.Mar 10 2022, 3:41 PM
In D121394#3374029, @hctim wrote:

This test is really hard to validate changes to. I mean, it's basically "$COMPILER produces $BLOB", right? I'm not really sure what are the interesting parts I'm supposed to be looking for.

Is it possible to reduce the test to check the actual conditions?

Like, for standard_lifetime, we have lifetime start -> shadow setup (some minimal UID like __hwasan_generate_tag) -> lifetime end -> shadow teardown (some minimal UID like memset-zero).

This is a auto-generated golden test: ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py

I think there is a value in that, to make sure any changes don't exceed the intended scope. There are more focused tests as well in this directory.

hctim added a comment.Mar 10 2022, 6:42 PM
In D121394#3374071, @fmayer wrote:

This is a auto-generated golden test: ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py

I think there is a value in that, to make sure any changes don't exceed the intended scope. There are more focused tests as well in this directory.

Maybe I'm just biased against golden-file tests like this because they're almost impossible to review (apart from "I trust the author"), and they increase churn significantly when one wants to make instrumentation changes. But, I do agree there's some value in the "didn't mess things up" check.

If that's all we're aiming for, would it make sense to have use-after-scope-arm64.ll and use-after-scope-x64.ll?

fmayer added a comment.Mar 15 2022, 1:12 PM
In D121394#3374362, @hctim wrote:
In D121394#3374071, @fmayer wrote:

This is a auto-generated golden test: ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py

I think there is a value in that, to make sure any changes don't exceed the intended scope. There are more focused tests as well in this directory.

Maybe I'm just biased against golden-file tests like this because they're almost impossible to review (apart from "I trust the author"), and they increase churn significantly when one wants to make instrumentation changes. But, I do agree there's some value in the "didn't mess things up" check.

If that's all we're aiming for, would it make sense to have use-after-scope-arm64.ll and use-after-scope-x64.ll?

Or we just put x86 and aarch64 into the same file, by using -target. That will make the file very large (2x the expectation comments), but makes sure they don't diverge. I would prefer that. WDYT?

hctim added a comment.Mar 15 2022, 1:48 PM
In D121394#3383600, @fmayer wrote:

Or we just put x86 and aarch64 into the same file, by using -target. That will make the file very large (2x the expectation comments), but makes sure they don't diverge. I would prefer that. WDYT?

Sure.

fmayer updated this revision to Diff 415579.Mar 15 2022, 2:14 PM

keep x86

fmayer updated this revision to Diff 415580.Mar 15 2022, 2:15 PM

commit message update

Harbormaster completed remote builds in B154426: Diff 415580.Mar 15 2022, 3:17 PM
hctim accepted this revision.Mar 16 2022, 10:28 AM
This revision is now accepted and ready to land.Mar 16 2022, 10:28 AM
This revision was landed with ongoing or failed builds.Mar 16 2022, 10:31 AM
Closed by commit rG448c89415b7a: [HWASan] Update use-after-scope test to use ARM64. (authored by fmayer). · Explain Why
This revision was automatically updated to reflect the committed changes.
fmayer added a commit: rG448c89415b7a: [HWASan] Update use-after-scope test to use ARM64..

Revision Contents

PathSize
llvm/
test/
Instrumentation/
HWAddressSanitizer/
725 lines

Diff 415898

llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=hwasan -hwasan-use-after-scope=1 -hwasan-generate-tags-with-calls -S < %s | FileCheck %s --check-prefixes=SCOPE ; RUN: opt -mtriple=x86_64-unknown-linux-gnu -passes=hwasan \
; RUN: opt -passes=hwasan -hwasan-use-after-scope=0 -hwasan-generate-tags-with-calls -S < %s | FileCheck %s --check-prefixes=NOSCOPE ; RUN: -hwasan-use-after-scope=1 -hwasan-generate-tags-with-calls -S < %s | \
; RUN: FileCheck %s --check-prefixes=X86-SCOPE
; ModuleID = 'use-after-scope.c' ; RUN: opt -mtriple=x86_64-unknown-linux-gnu -passes=hwasan \
source_filename = "use-after-scope.c" ; RUN: -hwasan-use-after-scope=0 -hwasan-generate-tags-with-calls -S < %s | \
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" ; RUN: FileCheck %s --check-prefixes=X86-NOSCOPE
target triple = "x86_64-unknown-linux-gnu"
; RUN: opt -mtriple=aarch64-unknown-linux-android29 -passes=hwasan \
; RUN: -hwasan-use-after-scope=1 -hwasan-generate-tags-with-calls -S < %s | \
; RUN: FileCheck %s --check-prefixes=AARCH64-SCOPE
; RUN: opt -mtriple=aarch64-unknown-linux-android29 -passes=hwasan \
; RUN: -hwasan-use-after-scope=0 -hwasan-generate-tags-with-calls -S < %s | \
; RUN: FileCheck %s --check-prefixes=AARCH64-NOSCOPE
define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress { define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress {
; SCOPE-LABEL: @standard_lifetime( ; X86-SCOPE-LABEL: @standard_lifetime(
; SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null) ; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
; SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
; SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8* ; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
; SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64 ; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
; SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8* ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
; SCOPE-NEXT: br label [[TMP8:%.*]] ; X86-SCOPE-NEXT: br label [[TMP8:%.*]]
; SCOPE: 8: ; X86-SCOPE: 8:
; SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8 ; X86-SCOPE-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP9]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP9]], i64 16)
; SCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond() ; X86-SCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond()
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP8]] ; X86-SCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP8]]
; SCOPE: 11: ; X86-SCOPE: 11:
; SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: ret i32 0 ; X86-SCOPE-NEXT: ret i32 0
; ;
; NOSCOPE-LABEL: @standard_lifetime( ; X86-NOSCOPE-LABEL: @standard_lifetime(
; NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null) ; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
; NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
; NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8* ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
; NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64 ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
; NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8* ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
; NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8 ; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
; NOSCOPE-NEXT: br label [[TMP9:%.*]] ; X86-NOSCOPE-NEXT: br label [[TMP9:%.*]]
; NOSCOPE: 9: ; X86-NOSCOPE: 9:
; NOSCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond() ; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond()
; NOSCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP9]] ; X86-NOSCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP9]]
; NOSCOPE: 11: ; X86-NOSCOPE: 11:
; NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; NOSCOPE-NEXT: ret i32 0 ; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @standard_lifetime(
; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
; AARCH64-SCOPE-NEXT: store i64 [[TMP11]], i64* [[TMP10]], align 4
; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
; AARCH64-SCOPE-NEXT: br label [[TMP26:%.*]]
; AARCH64-SCOPE: 26:
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = trunc i64 [[TMP22]] to i8
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP29]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP30]], i8 [[TMP27]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP35:%.*]], label [[TMP26]]
; AARCH64-SCOPE: 35:
; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @standard_lifetime(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
; AARCH64-NOSCOPE-NEXT: store i64 [[TMP11]], i64* [[TMP10]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: br label [[TMP30:%.*]]
; AARCH64-NOSCOPE: 30:
; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
; AARCH64-NOSCOPE: 32:
; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP34]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP35]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
br label %2 br label %2
2: ; preds = %2, %0 2: ; preds = %2, %0
; We should tag the memory after the br (in the loop). ; We should tag the memory after the br (in the loop).
call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
%3 = tail call i1 (...) @cond() #2 %3 = tail call i1 (...) @cond() #2
; We should tag the memory before the next br (before the jump back). ; We should tag the memory before the next br (before the jump back).
call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
br i1 %3, label %4, label %2 br i1 %3, label %4, label %2
4: ; preds = %2 4: ; preds = %2
call void @use(i8* nonnull %1) #2 call void @use(i8* nonnull %1) #2
ret i32 0 ret i32 0
} }
define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noinline sanitize_hwaddress { define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noinline sanitize_hwaddress {
; SCOPE-LABEL: @standard_lifetime_optnone( ; X86-SCOPE-LABEL: @standard_lifetime_optnone(
; SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null) ; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
; SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
; SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8* ; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
; SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64 ; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
; SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8* ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
; SCOPE-NEXT: br label [[TMP8:%.*]] ; X86-SCOPE-NEXT: br label [[TMP8:%.*]]
; SCOPE: 8: ; X86-SCOPE: 8:
; SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8 ; X86-SCOPE-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP9]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP9]], i64 16)
; SCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond() ; X86-SCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond()
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP8]] ; X86-SCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP8]]
; SCOPE: 11: ; X86-SCOPE: 11:
; SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: ret i32 0 ; X86-SCOPE-NEXT: ret i32 0
; ;
; NOSCOPE-LABEL: @standard_lifetime_optnone( ; X86-NOSCOPE-LABEL: @standard_lifetime_optnone(
; NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null) ; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
; NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
; NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8* ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
; NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64 ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
; NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8* ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
; NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8 ; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
; NOSCOPE-NEXT: br label [[TMP9:%.*]] ; X86-NOSCOPE-NEXT: br label [[TMP9:%.*]]
; NOSCOPE: 9: ; X86-NOSCOPE: 9:
; NOSCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond() ; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond()
; NOSCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP9]] ; X86-NOSCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP9]]
; NOSCOPE: 11: ; X86-NOSCOPE: 11:
; NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; NOSCOPE-NEXT: ret i32 0 ; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @standard_lifetime_optnone(
; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
; AARCH64-SCOPE-NEXT: store i64 [[TMP11]], i64* [[TMP10]], align 4
; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
; AARCH64-SCOPE-NEXT: br label [[TMP26:%.*]]
; AARCH64-SCOPE: 26:
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = trunc i64 [[TMP22]] to i8
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP29]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP30]], i8 [[TMP27]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP35:%.*]], label [[TMP26]]
; AARCH64-SCOPE: 35:
; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @standard_lifetime_optnone(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
; AARCH64-NOSCOPE-NEXT: store i64 [[TMP11]], i64* [[TMP10]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: br label [[TMP30:%.*]]
; AARCH64-NOSCOPE: 30:
; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
; AARCH64-NOSCOPE: 32:
; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP34]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP35]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
br label %2 br label %2
2: ; preds = %2, %0 2: ; preds = %2, %0
; We should tag the memory after the br (in the loop). ; We should tag the memory after the br (in the loop).
call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
%3 = tail call i1 (...) @cond() #2 %3 = tail call i1 (...) @cond() #2
; We should tag the memory before the next br (before the jump back). ; We should tag the memory before the next br (before the jump back).
call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
br i1 %3, label %4, label %2 br i1 %3, label %4, label %2
4: ; preds = %2 4: ; preds = %2
call void @use(i8* nonnull %1) #2 call void @use(i8* nonnull %1) #2
ret i32 0 ret i32 0
} }
define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress { define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress {
; SCOPE-LABEL: @multiple_lifetimes( ; X86-SCOPE-LABEL: @multiple_lifetimes(
; SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null) ; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
; SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
; SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8* ; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
; SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64 ; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
; SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8* ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
; SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8 ; X86-SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
; SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; SCOPE-NEXT: ret i32 0 ; X86-SCOPE-NEXT: ret i32 0
; ;
; NOSCOPE-LABEL: @multiple_lifetimes( ; X86-NOSCOPE-LABEL: @multiple_lifetimes(
; NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null) ; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
; NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
; NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8* ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
; NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64 ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
; NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8* ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
; NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8 ; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
; NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; NOSCOPE-NEXT: ret i32 0 ; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @multiple_lifetimes(
; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
; AARCH64-SCOPE-NEXT: store i64 [[TMP11]], i64* [[TMP10]], align 4
; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP31]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP32]], i8 0, i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
; AARCH64-NOSCOPE-NEXT: store i64 [[TMP11]], i64* [[TMP10]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP31]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP32]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
; We erase lifetime markers if we insert instrumentation outside of the ; We erase lifetime markers if we insert instrumentation outside of the
; lifetime. ; lifetime.
call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
call void @use(i8* nonnull %1) #2 call void @use(i8* nonnull %1) #2
call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
call void @use(i8* nonnull %1) #2 call void @use(i8* nonnull %1) #2
call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
ret i32 0 ret i32 0
} }
define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress { define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
; SCOPE-LABEL: @unreachable_exit( ; X86-SCOPE-LABEL: @unreachable_exit(
; SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null) ; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
; SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
; SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8* ; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
; SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64 ; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
; SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8* ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
; SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8 ; X86-SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
; SCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond() ; X86-SCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
; SCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]] ; X86-SCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]]
; SCOPE: 10: ; X86-SCOPE: 10:
; SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; SCOPE-NEXT: ret i32 0 ; X86-SCOPE-NEXT: ret i32 0
; SCOPE: 11: ; X86-SCOPE: 11:
; SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; SCOPE-NEXT: ret i32 0 ; X86-SCOPE-NEXT: ret i32 0
; ;
; NOSCOPE-LABEL: @unreachable_exit( ; X86-NOSCOPE-LABEL: @unreachable_exit(
; NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null) ; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
; NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
; NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8* ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
; NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64 ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
; NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8* ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
; NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8 ; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
; NOSCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond() ; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
; NOSCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]] ; X86-NOSCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]]
; NOSCOPE: 10: ; X86-NOSCOPE: 10:
; NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; NOSCOPE-NEXT: ret i32 0 ; X86-NOSCOPE-NEXT: ret i32 0
; NOSCOPE: 11: ; X86-NOSCOPE: 11:
; NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
; NOSCOPE-NEXT: ret i32 0 ; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @unreachable_exit(
; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
; AARCH64-SCOPE-NEXT: store i64 [[TMP11]], i64* [[TMP10]], align 4
; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP35:%.*]]
; AARCH64-SCOPE: 31:
; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
; AARCH64-SCOPE: 35:
; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP37]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP38]], i8 0, i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @unreachable_exit(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP4]] to i64*
; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = or i64 [[TMP6]], [[TMP9]]
; AARCH64-NOSCOPE-NEXT: store i64 [[TMP11]], i64* [[TMP10]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP35:%.*]]
; AARCH64-NOSCOPE: 31:
; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
; AARCH64-NOSCOPE: 35:
; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint i8* [[TMP20]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP37]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP38]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1) call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
%2 = tail call i1 (...) @cond() #2 %2 = tail call i1 (...) @cond() #2
br i1 %2, label %3, label %4 br i1 %2, label %3, label %4
3: 3:
call void @use(i8* nonnull %1) #2 call void @use(i8* nonnull %1) #2
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