x32. Fixes a bug in x32 exception handling.

[jpp]

Summary

This patch updates the X86 lowering so that the Exception Pointer and Selector are 64-bit wide only if Subtarget.isTarget64BitLP64.

[dschuff]

The change LGTM, but I'm not 100% sure this is the best way to write a test for EH codegen. I'll bet @rnk knows?

[rnk]

lgtm

test/CodeGen/X86/x32-landingpad.ll

19

s/Excception/Exception/

20

You probably want to tighten up the CHECK with something like this:

; CHECK: LBB{{.*}} : # %lpad
; CHECK-DAG: movl %eax, {{.*}}
; CHECK-DAG: movl %edx, {{.*}}
; CHECK: callq bar

lib/Target/X86/X86ISelLowering.cpp

X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
   }
 
   // FIXME - use subtarget debug flags
   if (!Subtarget->isTargetDarwin() && !Subtarget->isTargetELF() &&
       !Subtarget->isTargetCygMing() && !Subtarget->isTargetWin64()) {
     setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
   }
 
-  if (Subtarget->is64Bit()) {
+  if (Subtarget->isTarget64BitLP64()) {
     setExceptionPointerRegister(X86::RAX);
     setExceptionSelectorRegister(X86::RDX);
   } else {
     setExceptionPointerRegister(X86::EAX);
     setExceptionSelectorRegister(X86::EDX);
   }
   setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i32, Custom);
   setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i64, Custom);

test/CodeGen/X86/x32-landingpad.ll

+; RUN: llc < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic -fast-isel | FileCheck %s
+;
+; Ensures that landingpad instructions in x32 use the right Exception Pointer
+; and Exception Selector registers.
+
+declare void @foo()
+declare void @bar(i8*, i32) noreturn
+declare i32 @__gxx_personality_v0(...)
+
+define void @test1() uwtable personality i32 (...)* @__gxx_personality_v0 {
+entry:
+  invoke void @foo() to label %done unwind label %lpad
+done:
+  ret void
+lpad:
+  %0 = landingpad { i8*, i32 } cleanup
+; The Exception Pointer is %eax; the Exception Selector, %edx.
+; CHECK: LBB{{[^%]*}} %lpad
+; CHECK-DAG: movl %eax, {{.*}}
+; CHECK-DAG: movl %edx, {{.*}}
+; CHECK: callq bar
+  %1 = extractvalue { i8*, i32 } %0, 0
+  %2 = extractvalue { i8*, i32 } %0, 1
+  call void @bar(i8* %1, i32 %2)
+  unreachable
+}