[X86][Costmodel] `trunc v32i16 to v64i1` can appear after legalization, cost is same as for `trunc v32i16 to v32i1`

[RKSimon]

LGTM

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

auto AdjustCost = [&CostKind](InstructionCost Cost) -> InstructionCost {
     return Cost;
   };
 
   // The cost tables include both specific, custom (non-legal) src/dst type
   // conversions and generic, legalized types. We test for customs first, before
   // falling back to legalization.
   // FIXME: Need a better design of the cost table to handle non-simple types of
   // potential massive combinations (elem_num x src_type x dst_type).
   static const TypeConversionCostTblEntry AVX512BWConversionTbl[] {
     { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i8, 1 },
     { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i8, 1 },
 
     // Mask sign extend has an instruction.
     { ISD::SIGN_EXTEND, MVT::v2i8,   MVT::v2i1,  1 },
     { ISD::SIGN_EXTEND, MVT::v2i16,  MVT::v2i1,  1 },
     { ISD::SIGN_EXTEND, MVT::v4i8,   MVT::v4i1,  1 },
     { ISD::SIGN_EXTEND, MVT::v4i16,  MVT::v4i1,  1 },
static const TypeConversionCostTblEntry AVX512BWConversionTbl[] {
     { ISD::TRUNCATE,    MVT::v4i8,   MVT::v4i16,  2 }, // vpmovwb
     { ISD::TRUNCATE,    MVT::v8i1,   MVT::v8i8,   2 }, // widen to zmm
     { ISD::TRUNCATE,    MVT::v8i1,   MVT::v8i16,  2 }, // widen to zmm
     { ISD::TRUNCATE,    MVT::v8i8,   MVT::v8i16,  2 }, // vpmovwb
     { ISD::TRUNCATE,    MVT::v16i1,  MVT::v16i8,  2 }, // widen to zmm
     { ISD::TRUNCATE,    MVT::v16i1,  MVT::v16i16, 2 }, // widen to zmm
     { ISD::TRUNCATE,    MVT::v32i1,  MVT::v32i8,  2 }, // widen to zmm
     { ISD::TRUNCATE,    MVT::v32i1,  MVT::v32i16, 2 },
+    { ISD::TRUNCATE,    MVT::v64i1,  MVT::v32i16, 2 },
     { ISD::TRUNCATE,    MVT::v64i1,  MVT::v64i8,  2 },
   };
 
   static const TypeConversionCostTblEntry AVX512DQConversionTbl[] = {
     { ISD::SINT_TO_FP,  MVT::v8f32,  MVT::v8i64,  1 },
     { ISD::SINT_TO_FP,  MVT::v8f64,  MVT::v8i64,  1 },
 
     { ISD::UINT_TO_FP,  MVT::v8f32,  MVT::v8i64,  1 },

llvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll

 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = trunc <16 x i32> undef to <16 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V32i32 = trunc <32 x i32> undef to <32 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V64i32 = trunc <64 x i32> undef to <64 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i16 = trunc <2 x i16> undef to <2 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i16 = trunc <4 x i16> undef to <4 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i16 = trunc <8 x i16> undef to <8 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = trunc <16 x i16> undef to <16 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i16 = trunc <32 x i16> undef to <32 x i1>
-; SKX512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i1>
+; SKX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = trunc <2 x i8> undef to <2 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = trunc <4 x i8> undef to <4 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = trunc <8 x i8> undef to <8 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i8 = trunc <16 x i8> undef to <16 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = trunc <32 x i8> undef to <32 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V64i8 = trunc <64 x i8> undef to <64 x i1>
 ; SKX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
 ;

llvm/test/Analysis/CostModel/X86/trunc.ll

 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V10i16 = trunc <10 x i16> undef to <10 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V12i16 = trunc <12 x i16> undef to <12 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V14i16 = trunc <14 x i16> undef to <14 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V16i16 = trunc <16 x i16> undef to <16 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V20i16 = trunc <20 x i16> undef to <20 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V24i16 = trunc <24 x i16> undef to <24 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V28i16 = trunc <28 x i16> undef to <28 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V32i16 = trunc <32 x i16> undef to <32 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %V40i16 = trunc <40 x i16> undef to <40 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V48i16 = trunc <48 x i16> undef to <48 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %V56i16 = trunc <56 x i16> undef to <56 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 160 for instruction: %V80i16 = trunc <80 x i16> undef to <80 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 224 for instruction: %V112i16 = trunc <112 x i16> undef to <112 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V128i16 = trunc <128 x i16> undef to <128 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 320 for instruction: %V160i16 = trunc <160 x i16> undef to <160 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 384 for instruction: %V192i16 = trunc <192 x i16> undef to <192 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 448 for instruction: %V224i16 = trunc <224 x i16> undef to <224 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %V256i16 = trunc <256 x i16> undef to <256 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 640 for instruction: %V320i16 = trunc <320 x i16> undef to <320 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 768 for instruction: %V384i16 = trunc <384 x i16> undef to <384 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 896 for instruction: %V448i16 = trunc <448 x i16> undef to <448 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %V512i16 = trunc <512 x i16> undef to <512 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1280 for instruction: %V640i16 = trunc <640 x i16> undef to <640 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1536 for instruction: %V768i16 = trunc <768 x i16> undef to <768 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 1792 for instruction: %V896i16 = trunc <896 x i16> undef to <896 x i1>
-; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %V1024i16 = trunc <1024 x i16> undef to <1024 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V40i16 = trunc <40 x i16> undef to <40 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V48i16 = trunc <48 x i16> undef to <48 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V56i16 = trunc <56 x i16> undef to <56 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V80i16 = trunc <80 x i16> undef to <80 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V112i16 = trunc <112 x i16> undef to <112 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V128i16 = trunc <128 x i16> undef to <128 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V160i16 = trunc <160 x i16> undef to <160 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V192i16 = trunc <192 x i16> undef to <192 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V224i16 = trunc <224 x i16> undef to <224 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V256i16 = trunc <256 x i16> undef to <256 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V320i16 = trunc <320 x i16> undef to <320 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V384i16 = trunc <384 x i16> undef to <384 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V448i16 = trunc <448 x i16> undef to <448 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V512i16 = trunc <512 x i16> undef to <512 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V640i16 = trunc <640 x i16> undef to <640 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V768i16 = trunc <768 x i16> undef to <768 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V896i16 = trunc <896 x i16> undef to <896 x i1>
+; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V1024i16 = trunc <1024 x i16> undef to <1024 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %i8 = trunc i8 undef to i1
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V2i8 = trunc <2 x i8> undef to <2 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %V3i8 = trunc <3 x i8> undef to <3 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V4i8 = trunc <4 x i8> undef to <4 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %V5i8 = trunc <5 x i8> undef to <5 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %V6i8 = trunc <6 x i8> undef to <6 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %V7i8 = trunc <7 x i8> undef to <7 x i1>
 ; AVX512BW-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i8 = trunc <8 x i8> undef to <8 x i1>