AMDGPU: Optimize out implicit kernarg argument allocation if unused

[arsenm]

Summary

We already annotate whether llvm.amdgcn.implicitarg.ptr is known to be
unused. Start using it to avoid allocating the implicit arguments if
unneeded.

[arsenm]

Attach right version

[rampitec]

LGTM

[arsenm]

Use subtarget size check in another place

[rampitec]

Still LGTM.

[arsenm]

ae0ba7dedd276c4cc983b61dabb5a8e7ae4a4c00

llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h

 class Argument;
 class DataLayout;
 class Function;
 class MachineFunction;
 class MDNode;
 class Module;
 struct SIProgramInfo;
 class Type;
+class GCNSubtarget;
 
 namespace AMDGPU {
 
 namespace IsaInfo {
 class AMDGPUTargetID;
 }
 
 namespace HSAMD {
protected:
   void emitVersion();
 
   void emitPrintf(const Module &Mod);
 
   void emitKernelLanguage(const Function &Func, msgpack::MapDocNode Kern);
 
   void emitKernelAttrs(const Function &Func, msgpack::MapDocNode Kern);
 
-  void emitKernelArgs(const Function &Func, msgpack::MapDocNode Kern);
+  void emitKernelArgs(const Function &Func, const GCNSubtarget &ST,
+                      msgpack::MapDocNode Kern);
 
   void emitKernelArg(const Argument &Arg, unsigned &Offset,
                      msgpack::ArrayDocNode Args);
 
   void emitKernelArg(const DataLayout &DL, Type *Ty, Align Alignment,
                      StringRef ValueKind, unsigned &Offset,
                      msgpack::ArrayDocNode Args, MaybeAlign PointeeAlign = None,
                      StringRef Name = "", StringRef TypeName = "",
                      StringRef BaseTypeName = "", StringRef AccQual = "",
                      StringRef TypeQual = "");
 
-  void emitHiddenKernelArgs(const Function &Func, unsigned &Offset,
-                            msgpack::ArrayDocNode Args);
+  void emitHiddenKernelArgs(const Function &Func, const GCNSubtarget &ST,
+                            unsigned &Offset, msgpack::ArrayDocNode Args);
 
   msgpack::DocNode &getRootMetadata(StringRef Key) {
     return HSAMetadataDoc->getRoot().getMap(/*Convert=*/true)[Key];
   }
 
   msgpack::DocNode &getHSAMetadataRoot() {
     return HSAMetadataDoc->getRoot();
   }
private:
   void emitVersion();
 
   void emitPrintf(const Module &Mod);
 
   void emitKernelLanguage(const Function &Func);
 
   void emitKernelAttrs(const Function &Func);
 
-  void emitKernelArgs(const Function &Func);
+  void emitKernelArgs(const Function &Func, const GCNSubtarget &ST);
 
   void emitKernelArg(const Argument &Arg);
 
   void emitKernelArg(const DataLayout &DL, Type *Ty, Align Alignment,
                      ValueKind ValueKind, MaybeAlign PointeeAlign = None,
                      StringRef Name = "", StringRef TypeName = "",
                      StringRef BaseTypeName = "", StringRef AccQual = "",
                      StringRef TypeQual = "");
 
-  void emitHiddenKernelArgs(const Function &Func);
+  void emitHiddenKernelArgs(const Function &Func, const GCNSubtarget &ST);
 
   const Metadata &getHSAMetadata() const {
     return HSAMetadata;
   }
 
 public:
   MetadataStreamerV2() = default;
   ~MetadataStreamerV2() = default;

llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp

Attrs.mVecTypeHint = getTypeName(
         mdconst::extract<ConstantInt>(Node->getOperand(1))->getZExtValue());
   }
   if (Func.hasFnAttribute("runtime-handle")) {
     Attrs.mRuntimeHandle =
         Func.getFnAttribute("runtime-handle").getValueAsString().str();
   }
 }
 
-void MetadataStreamerV2::emitKernelArgs(const Function &Func) {
+void MetadataStreamerV2::emitKernelArgs(const Function &Func,
+                                        const GCNSubtarget &ST) {
   for (auto &Arg : Func.args())
     emitKernelArg(Arg);
 
-  emitHiddenKernelArgs(Func);
+  emitHiddenKernelArgs(Func, ST);
 }
 
 void MetadataStreamerV2::emitKernelArg(const Argument &Arg) {
   auto Func = Arg.getParent();
   auto ArgNo = Arg.getArgNo();
   const MDNode *Node;
 
   StringRef Name;
auto P = StringSwitch<bool*>(Key)
                  .Case("volatile", &Arg.mIsVolatile)
                  .Case("pipe",     &Arg.mIsPipe)
                  .Default(nullptr);
     if (P)
       *P = true;
   }
 }
 
-void MetadataStreamerV2::emitHiddenKernelArgs(const Function &Func) {
-  int HiddenArgNumBytes =
-      getIntegerAttribute(Func, "amdgpu-implicitarg-num-bytes", 0);
-
+void MetadataStreamerV2::emitHiddenKernelArgs(const Function &Func,
+                                              const GCNSubtarget &ST) {
+  unsigned HiddenArgNumBytes = ST.getImplicitArgNumBytes(Func);
   if (!HiddenArgNumBytes)
     return;
 
   auto &DL = Func.getParent()->getDataLayout();
   auto Int64Ty = Type::getInt64Ty(Func.getContext());
 
   if (HiddenArgNumBytes >= 8)
     emitKernelArg(DL, Int64Ty, Align(8), ValueKind::HiddenGlobalOffsetX);
if (Func.getCallingConv() != CallingConv::AMDGPU_KERNEL)
     return;
 
   auto CodeProps = getHSACodeProps(MF, ProgramInfo);
   auto DebugProps = getHSADebugProps(MF, ProgramInfo);
 
   HSAMetadata.mKernels.push_back(Kernel::Metadata());
   auto &Kernel = HSAMetadata.mKernels.back();
 
+  const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
   Kernel.mName = std::string(Func.getName());
   Kernel.mSymbolName = (Twine(Func.getName()) + Twine("@kd")).str();
   emitKernelLanguage(Func);
   emitKernelAttrs(Func);
-  emitKernelArgs(Func);
+  emitKernelArgs(Func, ST);
   HSAMetadata.mKernels.back().mCodeProps = CodeProps;
   HSAMetadata.mKernels.back().mDebugProps = DebugProps;
 }
 
 //===----------------------------------------------------------------------===//
 // HSAMetadataStreamerV3
 //===----------------------------------------------------------------------===//
 
void MetadataStreamerV3::emitKernelAttrs(const Function &Func,
   }
   if (Func.hasFnAttribute("device-init"))
     Kern[".kind"] = Kern.getDocument()->getNode("init");
   else if (Func.hasFnAttribute("device-fini"))
     Kern[".kind"] = Kern.getDocument()->getNode("fini");
 }
 
 void MetadataStreamerV3::emitKernelArgs(const Function &Func,
+                                        const GCNSubtarget &ST,
                                         msgpack::MapDocNode Kern) {
   unsigned Offset = 0;
   auto Args = HSAMetadataDoc->getArrayNode();
   for (auto &Arg : Func.args())
     emitKernelArg(Arg, Offset, Args);
 
-  emitHiddenKernelArgs(Func, Offset, Args);
+  emitHiddenKernelArgs(Func, ST, Offset, Args);
 
   Kern[".args"] = Args;
 }
 
 void MetadataStreamerV3::emitKernelArg(const Argument &Arg, unsigned &Offset,
                                        msgpack::ArrayDocNode Args) {
   auto Func = Arg.getParent();
   auto ArgNo = Arg.getArgNo();
for (StringRef Key : SplitTypeQuals) {
     else if (Key == "pipe")
       Arg[".is_pipe"] = Arg.getDocument()->getNode(true);
   }
 
   Args.push_back(Arg);
 }
 
 void MetadataStreamerV3::emitHiddenKernelArgs(const Function &Func,
+                                              const GCNSubtarget &ST,
                                               unsigned &Offset,
                                               msgpack::ArrayDocNode Args) {
-  int HiddenArgNumBytes =
-      getIntegerAttribute(Func, "amdgpu-implicitarg-num-bytes", 0);
-
+  unsigned HiddenArgNumBytes = ST.getImplicitArgNumBytes(Func);
   if (!HiddenArgNumBytes)
     return;
 
   const Module *M = Func.getParent();
   auto &DL = M->getDataLayout();
   auto Int64Ty = Type::getInt64Ty(Func.getContext());
 
   if (HiddenArgNumBytes >= 8)
void MetadataStreamerV3::end() {
   if (VerifyHSAMetadata)
     verify(StrOS.str());
 }
 
 void MetadataStreamerV3::emitKernel(const MachineFunction &MF,
                                     const SIProgramInfo &ProgramInfo) {
   auto &Func = MF.getFunction();
   auto Kern = getHSAKernelProps(MF, ProgramInfo);
+  const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
 
   assert(Func.getCallingConv() == CallingConv::AMDGPU_KERNEL ||
          Func.getCallingConv() == CallingConv::SPIR_KERNEL);
 
   auto Kernels =
       getRootMetadata("amdhsa.kernels").getArray(/*Convert=*/true);
 
   {
     Kern[".name"] = Kern.getDocument()->getNode(Func.getName());
     Kern[".symbol"] = Kern.getDocument()->getNode(
         (Twine(Func.getName()) + Twine(".kd")).str(), /*Copy=*/true);
     emitKernelLanguage(Func, Kern);
     emitKernelAttrs(Func, Kern);
-    emitKernelArgs(Func, Kern);
+    emitKernelArgs(Func, ST, Kern);
   }
 
   Kernels.push_back(Kern);
 }
 
 //===----------------------------------------------------------------------===//
 // HSAMetadataStreamerV4
 //===----------------------------------------------------------------------===//

llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp

bool AMDGPUSubtarget::makeLIDRangeMetadata(Instruction *I) const {
   MDBuilder MDB(I->getContext());
   MDNode *MaxWorkGroupSizeRange = MDB.createRange(APInt(32, MinSize),
                                                   APInt(32, MaxSize));
   I->setMetadata(LLVMContext::MD_range, MaxWorkGroupSizeRange);
   return true;
 }
 
 unsigned AMDGPUSubtarget::getImplicitArgNumBytes(const Function &F) const {
+  // We don't allocate the segment if we know the implicit arguments weren't
+  // used, even if the ABI implies we need them.
+  if (F.hasFnAttribute("amdgpu-no-implicitarg-ptr"))
+    return 0;
+
   if (isMesaKernel(F))
     return 16;
   return AMDGPU::getIntegerAttribute(F, "amdgpu-implicitarg-num-bytes", 0);
 }
 
 uint64_t AMDGPUSubtarget::getExplicitKernArgSize(const Function &F,
                                                  Align &MaxAlign) const {
   assert(F.getCallingConv() == CallingConv::AMDGPU_KERNEL ||

llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll

 ; GPRIDX-NEXT:     private_element_size = 1
 ; GPRIDX-NEXT:     is_ptr64 = 1
 ; GPRIDX-NEXT:     is_dynamic_callstack = 0
 ; GPRIDX-NEXT:     is_debug_enabled = 0
 ; GPRIDX-NEXT:     is_xnack_enabled = 1
 ; GPRIDX-NEXT:     workitem_private_segment_byte_size = 0
 ; GPRIDX-NEXT:     workgroup_group_segment_byte_size = 0
 ; GPRIDX-NEXT:     gds_segment_byte_size = 0
-; GPRIDX-NEXT:     kernarg_segment_byte_size = 28
+; GPRIDX-NEXT:     kernarg_segment_byte_size = 12
 ; GPRIDX-NEXT:     workgroup_fbarrier_count = 0
 ; GPRIDX-NEXT:     wavefront_sgpr_count = 9
 ; GPRIDX-NEXT:     workitem_vgpr_count = 3
 ; GPRIDX-NEXT:     reserved_vgpr_first = 0
 ; GPRIDX-NEXT:     reserved_vgpr_count = 0
 ; GPRIDX-NEXT:     reserved_sgpr_first = 0
 ; GPRIDX-NEXT:     reserved_sgpr_count = 0
 ; GPRIDX-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

 ; MOVREL-NEXT:     private_element_size = 1
 ; MOVREL-NEXT:     is_ptr64 = 1
 ; MOVREL-NEXT:     is_dynamic_callstack = 0
 ; MOVREL-NEXT:     is_debug_enabled = 0
 ; MOVREL-NEXT:     is_xnack_enabled = 0
 ; MOVREL-NEXT:     workitem_private_segment_byte_size = 0
 ; MOVREL-NEXT:     workgroup_group_segment_byte_size = 0
 ; MOVREL-NEXT:     gds_segment_byte_size = 0
-; MOVREL-NEXT:     kernarg_segment_byte_size = 28
+; MOVREL-NEXT:     kernarg_segment_byte_size = 12
 ; MOVREL-NEXT:     workgroup_fbarrier_count = 0
 ; MOVREL-NEXT:     wavefront_sgpr_count = 9
 ; MOVREL-NEXT:     workitem_vgpr_count = 4
 ; MOVREL-NEXT:     reserved_vgpr_first = 0
 ; MOVREL-NEXT:     reserved_vgpr_count = 0
 ; MOVREL-NEXT:     reserved_sgpr_first = 0
 ; MOVREL-NEXT:     reserved_sgpr_count = 0
 ; MOVREL-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

 ; GFX10-NEXT:     private_element_size = 1
 ; GFX10-NEXT:     is_ptr64 = 1
 ; GFX10-NEXT:     is_dynamic_callstack = 0
 ; GFX10-NEXT:     is_debug_enabled = 0
 ; GFX10-NEXT:     is_xnack_enabled = 1
 ; GFX10-NEXT:     workitem_private_segment_byte_size = 0
 ; GFX10-NEXT:     workgroup_group_segment_byte_size = 0
 ; GFX10-NEXT:     gds_segment_byte_size = 0
-; GFX10-NEXT:     kernarg_segment_byte_size = 28
+; GFX10-NEXT:     kernarg_segment_byte_size = 12
 ; GFX10-NEXT:     workgroup_fbarrier_count = 0
 ; GFX10-NEXT:     wavefront_sgpr_count = 9
 ; GFX10-NEXT:     workitem_vgpr_count = 3
 ; GFX10-NEXT:     reserved_vgpr_first = 0
 ; GFX10-NEXT:     reserved_vgpr_count = 0
 ; GFX10-NEXT:     reserved_sgpr_first = 0
 ; GFX10-NEXT:     reserved_sgpr_count = 0
 ; GFX10-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

 ; GPRIDX-NEXT:     private_element_size = 1
 ; GPRIDX-NEXT:     is_ptr64 = 1
 ; GPRIDX-NEXT:     is_dynamic_callstack = 0
 ; GPRIDX-NEXT:     is_debug_enabled = 0
 ; GPRIDX-NEXT:     is_xnack_enabled = 1
 ; GPRIDX-NEXT:     workitem_private_segment_byte_size = 0
 ; GPRIDX-NEXT:     workgroup_group_segment_byte_size = 0
 ; GPRIDX-NEXT:     gds_segment_byte_size = 0
-; GPRIDX-NEXT:     kernarg_segment_byte_size = 28
+; GPRIDX-NEXT:     kernarg_segment_byte_size = 12
 ; GPRIDX-NEXT:     workgroup_fbarrier_count = 0
 ; GPRIDX-NEXT:     wavefront_sgpr_count = 6
 ; GPRIDX-NEXT:     workitem_vgpr_count = 2
 ; GPRIDX-NEXT:     reserved_vgpr_first = 0
 ; GPRIDX-NEXT:     reserved_vgpr_count = 0
 ; GPRIDX-NEXT:     reserved_sgpr_first = 0
 ; GPRIDX-NEXT:     reserved_sgpr_count = 0
 ; GPRIDX-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

 ; MOVREL-NEXT:     private_element_size = 1
 ; MOVREL-NEXT:     is_ptr64 = 1
 ; MOVREL-NEXT:     is_dynamic_callstack = 0
 ; MOVREL-NEXT:     is_debug_enabled = 0
 ; MOVREL-NEXT:     is_xnack_enabled = 0
 ; MOVREL-NEXT:     workitem_private_segment_byte_size = 0
 ; MOVREL-NEXT:     workgroup_group_segment_byte_size = 0
 ; MOVREL-NEXT:     gds_segment_byte_size = 0
-; MOVREL-NEXT:     kernarg_segment_byte_size = 28
+; MOVREL-NEXT:     kernarg_segment_byte_size = 12
 ; MOVREL-NEXT:     workgroup_fbarrier_count = 0
 ; MOVREL-NEXT:     wavefront_sgpr_count = 6
 ; MOVREL-NEXT:     workitem_vgpr_count = 3
 ; MOVREL-NEXT:     reserved_vgpr_first = 0
 ; MOVREL-NEXT:     reserved_vgpr_count = 0
 ; MOVREL-NEXT:     reserved_sgpr_first = 0
 ; MOVREL-NEXT:     reserved_sgpr_count = 0
 ; MOVREL-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

 ; GFX10-NEXT:     private_element_size = 1
 ; GFX10-NEXT:     is_ptr64 = 1
 ; GFX10-NEXT:     is_dynamic_callstack = 0
 ; GFX10-NEXT:     is_debug_enabled = 0
 ; GFX10-NEXT:     is_xnack_enabled = 1
 ; GFX10-NEXT:     workitem_private_segment_byte_size = 0
 ; GFX10-NEXT:     workgroup_group_segment_byte_size = 0
 ; GFX10-NEXT:     gds_segment_byte_size = 0
-; GFX10-NEXT:     kernarg_segment_byte_size = 28
+; GFX10-NEXT:     kernarg_segment_byte_size = 12
 ; GFX10-NEXT:     workgroup_fbarrier_count = 0
 ; GFX10-NEXT:     wavefront_sgpr_count = 6
 ; GFX10-NEXT:     workitem_vgpr_count = 2
 ; GFX10-NEXT:     reserved_vgpr_first = 0
 ; GFX10-NEXT:     reserved_vgpr_count = 0
 ; GFX10-NEXT:     reserved_sgpr_first = 0
 ; GFX10-NEXT:     reserved_sgpr_count = 0
 ; GFX10-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

 ; GPRIDX-NEXT:     private_element_size = 1
 ; GPRIDX-NEXT:     is_ptr64 = 1
 ; GPRIDX-NEXT:     is_dynamic_callstack = 0
 ; GPRIDX-NEXT:     is_debug_enabled = 0
 ; GPRIDX-NEXT:     is_xnack_enabled = 1
 ; GPRIDX-NEXT:     workitem_private_segment_byte_size = 0
 ; GPRIDX-NEXT:     workgroup_group_segment_byte_size = 0
 ; GPRIDX-NEXT:     gds_segment_byte_size = 0
-; GPRIDX-NEXT:     kernarg_segment_byte_size = 28
+; GPRIDX-NEXT:     kernarg_segment_byte_size = 12
 ; GPRIDX-NEXT:     workgroup_fbarrier_count = 0
 ; GPRIDX-NEXT:     wavefront_sgpr_count = 7
 ; GPRIDX-NEXT:     workitem_vgpr_count = 3
 ; GPRIDX-NEXT:     reserved_vgpr_first = 0
 ; GPRIDX-NEXT:     reserved_vgpr_count = 0
 ; GPRIDX-NEXT:     reserved_sgpr_first = 0
 ; GPRIDX-NEXT:     reserved_sgpr_count = 0
 ; GPRIDX-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

 ; MOVREL-NEXT:     private_element_size = 1
 ; MOVREL-NEXT:     is_ptr64 = 1
 ; MOVREL-NEXT:     is_dynamic_callstack = 0
 ; MOVREL-NEXT:     is_debug_enabled = 0
 ; MOVREL-NEXT:     is_xnack_enabled = 0
 ; MOVREL-NEXT:     workitem_private_segment_byte_size = 0
 ; MOVREL-NEXT:     workgroup_group_segment_byte_size = 0
 ; MOVREL-NEXT:     gds_segment_byte_size = 0
-; MOVREL-NEXT:     kernarg_segment_byte_size = 28
+; MOVREL-NEXT:     kernarg_segment_byte_size = 12
 ; MOVREL-NEXT:     workgroup_fbarrier_count = 0
 ; MOVREL-NEXT:     wavefront_sgpr_count = 7
 ; MOVREL-NEXT:     workitem_vgpr_count = 4
 ; MOVREL-NEXT:     reserved_vgpr_first = 0
 ; MOVREL-NEXT:     reserved_vgpr_count = 0
 ; MOVREL-NEXT:     reserved_sgpr_first = 0
 ; MOVREL-NEXT:     reserved_sgpr_count = 0
 ; MOVREL-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

 ; GFX10-NEXT:     private_element_size = 1
 ; GFX10-NEXT:     is_ptr64 = 1
 ; GFX10-NEXT:     is_dynamic_callstack = 0
 ; GFX10-NEXT:     is_debug_enabled = 0
 ; GFX10-NEXT:     is_xnack_enabled = 1
 ; GFX10-NEXT:     workitem_private_segment_byte_size = 0
 ; GFX10-NEXT:     workgroup_group_segment_byte_size = 0
 ; GFX10-NEXT:     gds_segment_byte_size = 0
-; GFX10-NEXT:     kernarg_segment_byte_size = 28
+; GFX10-NEXT:     kernarg_segment_byte_size = 12
 ; GFX10-NEXT:     workgroup_fbarrier_count = 0
 ; GFX10-NEXT:     wavefront_sgpr_count = 7
 ; GFX10-NEXT:     workitem_vgpr_count = 3
 ; GFX10-NEXT:     reserved_vgpr_first = 0
 ; GFX10-NEXT:     reserved_vgpr_count = 0
 ; GFX10-NEXT:     reserved_sgpr_first = 0
 ; GFX10-NEXT:     reserved_sgpr_count = 0
 ; GFX10-NEXT:     debug_wavefront_private_segment_offset_sgpr = 0

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll

 define amdgpu_kernel void @opencl_test_implicit_alignment(i32 addrspace(1)* %out, <2 x i8> %in) #2 {
   %implicitarg.ptr = call noalias i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
   %arg.ptr = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
   %val = load i32, i32 addrspace(4)* %arg.ptr
   store i32 %val, i32 addrspace(1)* %out
   ret void
 }
 
-; Mesa implies 16-bytes are always allocated, hsa requires the
-; attribute for the additional space.
 ; ALL-LABEL: {{^}}test_no_kernargs:
-; HSA: enable_sgpr_kernarg_segment_ptr = 0
-; HSA: kernarg_segment_byte_size = 0
-
-; OS-MESA3D: enable_sgpr_kernarg_segment_ptr = 1
-; OS-MESA3D: kernarg_segment_byte_size = 16
+; CO-V2: enable_sgpr_kernarg_segment_ptr = 0
+; CO-V2: kernarg_segment_byte_size = 0
 ; CO-V2: kernarg_segment_alignment = 4
 
 ; HSA: s_mov_b64 [[OFFSET_NULL:s\[[0-9]+:[0-9]+\]]], 40{{$}}
 ; HSA: s_load_dword s{{[0-9]+}}, [[OFFSET_NULL]]
 define amdgpu_kernel void @test_no_kernargs() #1 {
   %kernarg.segment.ptr = call noalias i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
   %header.ptr = bitcast i8 addrspace(4)* %kernarg.segment.ptr to i32 addrspace(4)*
   %gep = getelementptr i32, i32 addrspace(4)* %header.ptr, i64 10
   %value = load i32, i32 addrspace(4)* %gep
   store volatile i32 %value, i32 addrspace(1)* undef
   ret void
 }
 
 ; ALL-LABEL: {{^}}opencl_test_implicit_alignment_no_explicit_kernargs:
 ; HSA: kernarg_segment_byte_size = 48
-; OS-MESA3d: kernarg_segment_byte_size = 16
+; OS-MESA3D: kernarg_segment_byte_size = 16
 ; CO-V2: kernarg_segment_alignment = 4
 define amdgpu_kernel void @opencl_test_implicit_alignment_no_explicit_kernargs() #2 {
   %implicitarg.ptr = call noalias i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
   %arg.ptr = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
   %val = load volatile i32, i32 addrspace(4)* %arg.ptr
   store volatile i32 %val, i32 addrspace(1)* null
   ret void
 }

llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel-v3.ll

define amdgpu_kernel void @test_enqueue_kernel_caller(i8 %a) #1
   ret void
 }
 
 ; CHECK:  amdhsa.version:
 ; CHECK-NEXT: - 1
 ; CHECK-NEXT: - 0
 ; CHECK-NOT:  amdhsa.printf:
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="48" }
-attributes #1 = { "calls-enqueue-kernel" "amdgpu-implicitarg-num-bytes"="48" }
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="48" }
+attributes #1 = { optnone noinline "calls-enqueue-kernel" "amdgpu-implicitarg-num-bytes"="48" }
 
 !1 = !{i32 0}
 !2 = !{!"none"}
 !3 = !{!"char"}
 !4 = !{!""}
 
 !opencl.ocl.version = !{!90}
 !90 = !{i32 2, i32 0}
 
 ; PARSER: AMDGPU HSA Metadata Parser Test: PASS

llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel.ll

 ; CHECK-NEXT:       ValueKind:     HiddenCompletionAction
 ; CHECK-NEXT:       AddrSpaceQual: Global
 define amdgpu_kernel void @test_enqueue_kernel_caller(i8 %a) #1
     !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
     !kernel_arg_base_type !3 !kernel_arg_type_qual !4 {
   ret void
 }
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="48" }
-attributes #1 = { "calls-enqueue-kernel" "amdgpu-implicitarg-num-bytes"="48" }
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="48" }
+attributes #1 = { optnone noinline "calls-enqueue-kernel" "amdgpu-implicitarg-num-bytes"="48" }
 
 !1 = !{i32 0}
 !2 = !{!"none"}
 !3 = !{!"char"}
 !4 = !{!""}
 
 !opencl.ocl.version = !{!90}
 !90 = !{i32 2, i32 0}
 
 ; PARSER: AMDGPU HSA Metadata Parser Test: PASS

llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full-v3.ll

 
 ; CHECK:  amdhsa.printf:
 ; CHECK-NEXT: - '1:1:4:%d\n'
 ; CHECK-NEXT: - '2:1:8:%g\n'
 ; CHECK:  amdhsa.version:
 ; CHECK-NEXT: - 1
 ; CHECK-NEXT: - 0
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="56" }
-attributes #1 = { "amdgpu-implicitarg-num-bytes"="56" "runtime-handle"="__test_block_invoke_kernel_runtime_handle" }
-attributes #2 = { "amdgpu-implicitarg-num-bytes"="56" "calls-enqueue-kernel" }
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="56" }
+attributes #1 = { optnone noinline "amdgpu-implicitarg-num-bytes"="56" "runtime-handle"="__test_block_invoke_kernel_runtime_handle" }
+attributes #2 = { optnone noinline "amdgpu-implicitarg-num-bytes"="56" "calls-enqueue-kernel" }
 
 !llvm.printf.fmts = !{!100, !101}
 
 !1 = !{i32 0}
 !2 = !{!"none"}
 !3 = !{!"int"}
 !4 = !{!""}
 !5 = !{i32 undef, i32 1}

llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll

 ; CHECK-NEXT: - Name:            ptr
 ; CHECK-NEXT: Size:            8
 ; CHECK-NEXT: Align:           8
 ; CHECK-NEXT: ValueKind:       GlobalBuffer
 define amdgpu_kernel void @unknown_addrspace_kernarg(i32 addrspace(12345)* %ptr) #0 {
   ret void
 }
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="56" }
-attributes #1 = { "amdgpu-implicitarg-num-bytes"="56" "runtime-handle"="__test_block_invoke_kernel_runtime_handle" }
-attributes #2 = { "amdgpu-implicitarg-num-bytes"="56" "calls-enqueue-kernel" }
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="56" }
+attributes #1 = { optnone noinline "amdgpu-implicitarg-num-bytes"="56" "runtime-handle"="__test_block_invoke_kernel_runtime_handle" }
+attributes #2 = { optnone noinline "amdgpu-implicitarg-num-bytes"="56" "calls-enqueue-kernel" }
 
 !llvm.printf.fmts = !{!100, !101}
 
 !1 = !{i32 0}
 !2 = !{!"none"}
 !3 = !{!"int"}
 !4 = !{!""}
 !5 = !{i32 undef, i32 1}

llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v3.ll

entry:
   store half %r.val, half addrspace(1)* %r
   ret void
 }
 
 ; CHECK:  amdhsa.version:
 ; CHECK-NEXT: - 1
 ; CHECK-NEXT: - 0
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="8" }
-attributes #1 = { "amdgpu-implicitarg-num-bytes"="16" }
-attributes #2 = { "amdgpu-implicitarg-num-bytes"="24" }
-attributes #3 = { "amdgpu-implicitarg-num-bytes"="32" }
-attributes #4 = { "amdgpu-implicitarg-num-bytes"="48" }
-attributes #5 = { "amdgpu-implicitarg-num-bytes"="56" }
+; We don't have a use of llvm.amdgcn.implicitarg.ptr, so optnone to
+; avoid optimizing out the implicit argument allocation.
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="8" }
+attributes #1 = { optnone noinline "amdgpu-implicitarg-num-bytes"="16" }
+attributes #2 = { optnone noinline "amdgpu-implicitarg-num-bytes"="24" }
+attributes #3 = { optnone noinline "amdgpu-implicitarg-num-bytes"="32" }
+attributes #4 = { optnone noinline "amdgpu-implicitarg-num-bytes"="48" }
+attributes #5 = { optnone noinline "amdgpu-implicitarg-num-bytes"="56" }

llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args.ll

 entry:
   %a.val = load half, half addrspace(1)* %a
   %b.val = load half, half addrspace(1)* %b
   %r.val = fadd half %a.val, %b.val
   store half %r.val, half addrspace(1)* %r
   ret void
 }
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="8" }
-attributes #1 = { "amdgpu-implicitarg-num-bytes"="16" }
-attributes #2 = { "amdgpu-implicitarg-num-bytes"="24" }
-attributes #3 = { "amdgpu-implicitarg-num-bytes"="32" }
-attributes #4 = { "amdgpu-implicitarg-num-bytes"="48" }
-attributes #5 = { "amdgpu-implicitarg-num-bytes"="56" }
+; We don't have a use of llvm.amdgcn.implicitarg.ptr, so optnone to
+; avoid optimizing out the implicit argument allocation.
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="8" }
+attributes #1 = { optnone noinline "amdgpu-implicitarg-num-bytes"="16" }
+attributes #2 = { optnone noinline "amdgpu-implicitarg-num-bytes"="24" }
+attributes #3 = { optnone noinline "amdgpu-implicitarg-num-bytes"="32" }
+attributes #4 = { optnone noinline "amdgpu-implicitarg-num-bytes"="48" }
+attributes #5 = { optnone noinline "amdgpu-implicitarg-num-bytes"="56" }

llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-absent-v3.ll

define amdgpu_kernel void @test_kernel(i8 %a) #0
     !kernel_arg_base_type !3 !kernel_arg_type_qual !4 {
   ret void
 }
 
 ; CHECK:  amdhsa.version:
 ; CHECK-NEXT: - 1
 ; CHECK-NEXT: - 0
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="48" }
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="48" }
 
 !1 = !{i32 0}
 !2 = !{!"none"}
 !3 = !{!"char"}
 !4 = !{!""}
 
 !opencl.ocl.version = !{!90}
 !90 = !{i32 2, i32 0}
 
 ; PARSER: AMDGPU HSA Metadata Parser Test: PASS

llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-absent.ll

 ; CHECK-NOT:        ValueKind:     HiddenCompletionAction
 
 define amdgpu_kernel void @test_kernel(i8 %a) #0
     !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
     !kernel_arg_base_type !3 !kernel_arg_type_qual !4 {
   ret void
 }
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="48" }
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="48" }
 
 !1 = !{i32 0}
 !2 = !{!"none"}
 !3 = !{!"char"}
 !4 = !{!""}
 
 !opencl.ocl.version = !{!90}
 !90 = !{i32 2, i32 0}
 
 ; PARSER: AMDGPU HSA Metadata Parser Test: PASS

llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-present-v3.ll

define amdgpu_kernel void @test_kernel(i8 %a) #0
     !kernel_arg_base_type !3 !kernel_arg_type_qual !4 {
   ret void
 }
 
 ; CHECK:  amdhsa.version:
 ; CHECK-NEXT: - 1
 ; CHECK-NEXT: - 0
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="48" }
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="48" }
 
 !1 = !{i32 0}
 !2 = !{!"none"}
 !3 = !{!"char"}
 !4 = !{!""}
 
 !opencl.ocl.version = !{!90}
 !90 = !{i32 2, i32 0}
 
 !llvm.module.flags = !{!0}
 !0 = !{i32 1, !"amdgpu_hostcall", i32 1}
 
 ; PARSER: AMDGPU HSA Metadata Parser Test: PASS

llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-present.ll

 declare <2 x i64> @__ockl_hostcall_internal(i8*, i32, i64, i64, i64, i64, i64, i64, i64, i64)
 
 define amdgpu_kernel void @test_kernel(i8 %a) #0
     !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
     !kernel_arg_base_type !3 !kernel_arg_type_qual !4 {
   ret void
 }
 
-attributes #0 = { "amdgpu-implicitarg-num-bytes"="48" }
+attributes #0 = { optnone noinline "amdgpu-implicitarg-num-bytes"="48" }
 
 !1 = !{i32 0}
 !2 = !{!"none"}
 !3 = !{!"char"}
 !4 = !{!""}
 
 !opencl.ocl.version = !{!90}
 !90 = !{i32 2, i32 0}
 
 ; PARSER: AMDGPU HSA Metadata Parser Test: PASS

llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll

 define amdgpu_kernel void @opencl_test_implicit_alignment(i32 addrspace(1)* %out, <2 x i8> %in) #2 {
   %implicitarg.ptr = call noalias i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
   %arg.ptr = bitcast i8 addrspace(4)* %implicitarg.ptr to i32 addrspace(4)*
   %val = load i32, i32 addrspace(4)* %arg.ptr
   store i32 %val, i32 addrspace(1)* %out
   ret void
 }
 
-; Mesa implies 16-bytes are always allocated, hsa requires the
-; attribute for the additional space.
 ; ALL-LABEL: {{^}}test_no_kernargs:
-; HSA: enable_sgpr_kernarg_segment_ptr = 0
-; HSA: kernarg_segment_byte_size = 0
+; CO-V2: enable_sgpr_kernarg_segment_ptr = 0
+; CO-V2: kernarg_segment_byte_size = 0
 
-; OS-MESA3D: enable_sgpr_kernarg_segment_ptr = 1
-; OS-MESA3D: kernarg_segment_byte_size = 16
 ; CO-V2: kernarg_segment_alignment = 4
 
 ; HSA: s_mov_b64 [[NULL:s\[[0-9]+:[0-9]+\]]], 0{{$}}
 ; HSA: s_load_dword s{{[0-9]+}}, [[NULL]], 0xa{{$}}
 define amdgpu_kernel void @test_no_kernargs() #1 {
   %kernarg.segment.ptr = call noalias i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
   %header.ptr = bitcast i8 addrspace(4)* %kernarg.segment.ptr to i32 addrspace(4)*
   %gep = getelementptr i32, i32 addrspace(4)* %header.ptr, i64 10