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Differential D112471

[LLDB] Fix Cpsr size for WoA64 target
ClosedPublic

Authored by omjavaid on Oct 25 2021, 10:43 AM.

Details

Reviewers
mstorsjo
DavidSpickett
Commits
rGb595137fe1c0: [LLDB] Fix Cpsr size for WoA64 target
Summary

CPSR on Arm64 is 4 bytes in size but windows on Arm implementation is trying to read/write 8 bytes against a byte register causing LLDB unit tests failures.

Ref: https://docs.microsoft.com/en-us/windows/win32/api/winnt/ns-winnt-arm64_nt_context

Diff Detail

Event Timeline

omjavaid created this revision.Oct 25 2021, 10:43 AM
Herald added a subscriber: kristof.beyls. · View Herald TranscriptOct 25 2021, 10:43 AM
omjavaid requested review of this revision.Oct 25 2021, 10:43 AM
Harbormaster completed remote builds in B130503: Diff 382045.Oct 25 2021, 10:45 AM
mstorsjo accepted this revision.Oct 25 2021, 11:42 AM

LGTM

This revision is now accepted and ready to land.Oct 25 2021, 11:42 AM
Closed by commit rGb595137fe1c0: [LLDB] Fix Cpsr size for WoA64 target (authored by omjavaid). · Explain WhyNov 4 2021, 5:44 AM
This revision was automatically updated to reflect the committed changes.
omjavaid added a commit: rGb595137fe1c0: [LLDB] Fix Cpsr size for WoA64 target.
Herald added a project: Restricted Project. · View Herald TranscriptNov 4 2021, 5:44 AM

Revision Contents

PathSize
lldb/
source/
Plugins/
Process/
Windows/
Common/
4 lines
arm64/
4 lines

Diff 382045

lldb/source/Plugins/Process/Windows/Common/NativeRegisterContextWindows_arm64.cpp

Show First 20 Lines • Show All 214 Lines • ▼ Show 20 Lines case gpr_sp_arm64:
break; break;
case gpr_lr_arm64: case gpr_lr_arm64:
reg_value.SetUInt64(tls_context.Lr); reg_value.SetUInt64(tls_context.Lr);
break; break;
case gpr_pc_arm64: case gpr_pc_arm64:
reg_value.SetUInt64(tls_context.Pc); reg_value.SetUInt64(tls_context.Pc);
break; break;
case gpr_cpsr_arm64: case gpr_cpsr_arm64:
reg_value.SetUInt64(tls_context.Cpsr); reg_value.SetUInt32(tls_context.Cpsr);
break; break;
case gpr_w0_arm64: case gpr_w0_arm64:
case gpr_w1_arm64: case gpr_w1_arm64:
case gpr_w2_arm64: case gpr_w2_arm64:
case gpr_w3_arm64: case gpr_w3_arm64:
case gpr_w4_arm64: case gpr_w4_arm64:
case gpr_w5_arm64: case gpr_w5_arm64:
▲ Show 20 Lines • Show All 80 Lines • ▼ Show 20 Lines case gpr_sp_arm64:
break; break;
case gpr_lr_arm64: case gpr_lr_arm64:
tls_context.Lr = reg_value.GetAsUInt64(); tls_context.Lr = reg_value.GetAsUInt64();
break; break;
case gpr_pc_arm64: case gpr_pc_arm64:
tls_context.Pc = reg_value.GetAsUInt64(); tls_context.Pc = reg_value.GetAsUInt64();
break; break;
case gpr_cpsr_arm64: case gpr_cpsr_arm64:
tls_context.Cpsr = reg_value.GetAsUInt64(); tls_context.Cpsr = reg_value.GetAsUInt32();
break; break;
case gpr_w0_arm64: case gpr_w0_arm64:
case gpr_w1_arm64: case gpr_w1_arm64:
case gpr_w2_arm64: case gpr_w2_arm64:
case gpr_w3_arm64: case gpr_w3_arm64:
case gpr_w4_arm64: case gpr_w4_arm64:
case gpr_w5_arm64: case gpr_w5_arm64:
▲ Show 20 Lines • Show All 426 Lines • Show Last 20 Lines

lldb/source/Plugins/Process/Windows/Common/arm64/RegisterContextWindows_arm64.cpp

Show First 20 Lines • Show All 165 Lines • ▼ Show 20 Lines case gpr_sp:
break; break;
case gpr_lr: case gpr_lr:
reg_value.SetUInt64(m_context.Lr); reg_value.SetUInt64(m_context.Lr);
break; break;
case gpr_pc: case gpr_pc:
reg_value.SetUInt64(m_context.Pc); reg_value.SetUInt64(m_context.Pc);
break; break;
case gpr_cpsr: case gpr_cpsr:
reg_value.SetUInt64(m_context.Cpsr); reg_value.SetUInt32(m_context.Cpsr);
break; break;
case gpr_w0: case gpr_w0:
case gpr_w1: case gpr_w1:
case gpr_w2: case gpr_w2:
case gpr_w3: case gpr_w3:
case gpr_w4: case gpr_w4:
case gpr_w5: case gpr_w5:
▲ Show 20 Lines • Show All 197 Lines • ▼ Show 20 Lines case gpr_sp:
break; break;
case gpr_lr: case gpr_lr:
m_context.Lr = reg_value.GetAsUInt64(); m_context.Lr = reg_value.GetAsUInt64();
break; break;
case gpr_pc: case gpr_pc:
m_context.Pc = reg_value.GetAsUInt64(); m_context.Pc = reg_value.GetAsUInt64();
break; break;
case gpr_cpsr: case gpr_cpsr:
m_context.Cpsr = reg_value.GetAsUInt64(); m_context.Cpsr = reg_value.GetAsUInt32();
break; break;
case fpu_v0: case fpu_v0:
case fpu_v1: case fpu_v1:
case fpu_v2: case fpu_v2:
case fpu_v3: case fpu_v3:
case fpu_v4: case fpu_v4:
case fpu_v5: case fpu_v5:
▲ Show 20 Lines • Show All 46 Lines • Show Last 20 Lines