[X86][Costmodel] Load/store i64/f64 Stride=3 VF=16 interleaving costs

[lebedev.ri]

Summary

This required huge amount of assembly surgery, but i think this is about right.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/z11crMEcj - for intels Block RThroughput: =20.0; for ryzens, Block RThroughput: <=18.0
So could pick cost of 25.

For store we have:
https://godbolt.org/z/eqT4ze3j4 - for intels Block RThroughput: =24.0; for ryzens, Block RThroughput: <=16.0
So we could pick cost of 24.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

[RKSimon]

We are quite limited - even adding all xmm0 to the llvm-mca asm capture (~{xmm0} etc.) has very little effect - short of hand coding something, I think what you have here is at least a realistic magnitude vaue.

I'm happy to accept this if you want.

[lebedev.ri]

In D111031#3039005, @RKSimon wrote:

We are quite limited - even adding all xmm0 to the llvm-mca asm capture (~{xmm0} etc.) has very little effect - short of hand coding something, I think what you have here is at least a realistic magnitude vaue.

Right.

I'm happy to accept this if you want.

Hmm, what if we omit the epilogue stores in the load case: https://godbolt.org/z/43ao6qYvK -- does load interleaving cost of 18 seem more/less realistic?
It would be good to also ignore the prologue loads, since we'll cost them twice

And likewise for interleaved store case: https://godbolt.org/z/1EjY3fqPG -- does interleaving store cost of 18 seem more/less realistic?

[lebedev.ri]

In D111031#3039010, @lebedev.ri wrote:

In D111031#3039005, @RKSimon wrote:

We are quite limited - even adding all xmm0 to the llvm-mca asm capture (~{xmm0} etc.) has very little effect - short of hand coding something, I think what you have here is at least a realistic magnitude vaue.

Right.

I'm happy to accept this if you want.

Hmm, what if we omit the epilogue stores in the load case: https://godbolt.org/z/43ao6qYvK -- does load interleaving cost of 18 seem more/less realistic?
It would be good to also ignore the prologue loads, since we'll cost them twice

And likewise for interleaved store case: https://godbolt.org/z/1EjY3fqPG -- does interleaving store cost of 18 seem more/less realistic?

Correction, wrong second link.

After messing around with it, i think i can sorta get rid of memory ops in the store case: https://godbolt.org/z/do6nTcY85
That results in interleaved store cost of 24, which seems to be in the same ballpark as with the memory ops,
and follows the trend of ~doubling the cost with double the VF. Looks better?

Likewise for load: https://godbolt.org/z/z11crMEcj
I guess i'll just update the review.

[lebedev.ri]

@RKSimon hopefully this looks right to you!
After this i think we are only missing {i32,i64}*{stride 4, stride 6}.

[RKSimon]

LGTM

[lebedev.ri]

In D111031#3039570, @RKSimon wrote:

LGTM

Alrighty!
Thank you for the review!

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

static const CostTblEntry AVX2InterleavedLoadTbl[] = {
       {3, MVT::v16i8, 11}, // (load 48i8 and) deinterleave into 3 x 16i8
       {3, MVT::v32i8, 14}, // (load 96i8 and) deinterleave into 3 x 32i8
 
       {3, MVT::v8i32, 17}, // (load 24i32 and) deinterleave into 3 x 8i32
 
       {3, MVT::v2i64, 1},  // (load 6i64 and) deinterleave into 3 x 2i64
       {3, MVT::v4i64, 5},  // (load 12i64 and) deinterleave into 3 x 4i64
       {3, MVT::v8i64, 10},  // (load 24i64 and) deinterleave into 3 x 8i64
+      {3, MVT::v16i64, 20},  // (load 48i64 and) deinterleave into 3 x 16i64
 
       {4, MVT::v2i8, 4},  // (load 8i8 and) deinterleave into 4 x 2i8
       {4, MVT::v4i8, 4},   // (load 16i8 and) deinterleave into 4 x 4i8
       {4, MVT::v8i8, 12},  // (load 32i8 and) deinterleave into 4 x 8i8
       {4, MVT::v16i8, 24}, // (load 64i8 and) deinterleave into 4 x 16i8
       {4, MVT::v32i8, 56}, // (load 128i8 and) deinterleave into 4 x 32i8
 
       {4, MVT::v2i16, 6}, // (load 8i16 and) deinterleave into 4 x 2i16
static const CostTblEntry AVX2InterleavedStoreTbl[] = {
       {3, MVT::v4i8, 4},   // interleave 3 x 4i8 into 12i8 (and store)
       {3, MVT::v8i8, 6},  // interleave 3 x 8i8 into 24i8 (and store)
       {3, MVT::v16i8, 11}, // interleave 3 x 16i8 into 48i8 (and store)
       {3, MVT::v32i8, 13}, // interleave 3 x 32i8 into 96i8 (and store)
 
       {3, MVT::v2i64, 4},   // interleave 3 x 2i64 into 6i64 (and store)
       {3, MVT::v4i64, 6},   // interleave 3 x 4i64 into 12i64 (and store)
       {3, MVT::v8i64, 12},   // interleave 3 x 8i64 into 24i64 (and store)
+      {3, MVT::v16i64, 24},   // interleave 3 x 16i64 into 48i64 (and store)
 
       {4, MVT::v2i8, 4},  // interleave 4 x 2i8 into 8i8 (and store)
       {4, MVT::v4i8, 4},   // interleave 4 x 4i8 into 16i8 (and store)
       {4, MVT::v8i8, 4},  // interleave 4 x 8i8 into 32i8 (and store)
       {4, MVT::v16i8, 8}, // interleave 4 x 16i8 into 64i8 (and store)
       {4, MVT::v32i8, 12}, // interleave 4 x 32i8 into 128i8 (and store)
 
       {4, MVT::v2i16, 2},  // interleave 4 x 2i16 into 8i16 (and store)

llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 24 for VF 4 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 48 for VF 8 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 96 for VF 16 For instruction:   %v0 = load double, double* %in0, align 8
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 16 for VF 8 For instruction:   %v0 = load double, double* %in0, align 8
-; AVX2: LV: Found an estimated cost of 96 for VF 16 For instruction:   %v0 = load double, double* %in0, align 8
+; AVX2: LV: Found an estimated cost of 32 for VF 16 For instruction:   %v0 = load double, double* %in0, align 8
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 6 for VF 4 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 12 for VF 8 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 51 for VF 16 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 120 for VF 32 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 240 for VF 64 For instruction:   %v0 = load double, double* %in0, align 8

llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 39 for VF 4 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 78 for VF 8 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 156 for VF 16 For instruction:   %v0 = load i64, i64* %in0, align 8
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 16 for VF 8 For instruction:   %v0 = load i64, i64* %in0, align 8
-; AVX2: LV: Found an estimated cost of 156 for VF 16 For instruction:   %v0 = load i64, i64* %in0, align 8
+; AVX2: LV: Found an estimated cost of 32 for VF 16 For instruction:   %v0 = load i64, i64* %in0, align 8
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 6 for VF 4 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 12 for VF 8 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 51 for VF 16 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 120 for VF 32 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 240 for VF 64 For instruction:   %v0 = load i64, i64* %in0, align 8

llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 27 for VF 4 For instruction:   store double %v2, double* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 54 for VF 8 For instruction:   store double %v2, double* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 108 for VF 16 For instruction:   store double %v2, double* %out2, align 8
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store double %v2, double* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   store double %v2, double* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction:   store double %v2, double* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 18 for VF 8 For instruction:   store double %v2, double* %out2, align 8
-; AVX2: LV: Found an estimated cost of 108 for VF 16 For instruction:   store double %v2, double* %out2, align 8
+; AVX2: LV: Found an estimated cost of 36 for VF 16 For instruction:   store double %v2, double* %out2, align 8
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 8 for VF 4 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 12 for VF 8 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 24 for VF 16 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 48 for VF 32 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 96 for VF 64 For instruction:   store double %v2, double* %out2, align 8

llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 39 for VF 4 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 78 for VF 8 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 156 for VF 16 For instruction:   store i64 %v2, i64* %out2, align 8
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 18 for VF 8 For instruction:   store i64 %v2, i64* %out2, align 8
-; AVX2: LV: Found an estimated cost of 156 for VF 16 For instruction:   store i64 %v2, i64* %out2, align 8
+; AVX2: LV: Found an estimated cost of 36 for VF 16 For instruction:   store i64 %v2, i64* %out2, align 8
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 8 for VF 4 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 12 for VF 8 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 24 for VF 16 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 48 for VF 32 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 96 for VF 64 For instruction:   store i64 %v2, i64* %out2, align 8