[X86][Costmodel] Load/store i64/f64 Stride=3 VF=4 interleaving costs

[lebedev.ri]

Summary

This one required quite a bit of assembly surgery.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/Tce3osvcz - for intels Block RThroughput: =5.0; for ryzens, Block RThroughput: <=4.0
So pick cost of 5.

For store we have:
https://godbolt.org/z/oc3arEcnE - for intels Block RThroughput: =6.0; for ryzens, Block RThroughput: <=4.0
So pick cost of 6.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

[RKSimon]

LGTM

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

static const CostTblEntry AVX2InterleavedLoadTbl[] = {
       {3, MVT::v32i16, 56},  // (load 96i16 and) deinterleave into 3 x 32i16
 
       {3, MVT::v2i32, 3}, // (load 6i32 and) deinterleave into 3 x 2i32
       {3, MVT::v4i32, 3}, // (load 12i32 and) deinterleave into 3 x 4i32
       {3, MVT::v8i32, 7}, // (load 24i32 and) deinterleave into 3 x 8i32
       {3, MVT::v16i32, 14}, // (load 48i32 and) deinterleave into 3 x 16i32
 
       {3, MVT::v2i64, 1},  // (load 6i64 and) deinterleave into 3 x 2i64
+      {3, MVT::v4i64, 5},  // (load 12i64 and) deinterleave into 3 x 4i64
 
       {4, MVT::v2i8, 4},  // (load 8i8 and) deinterleave into 4 x 2i8
       {4, MVT::v4i8, 4},   // (load 16i8 and) deinterleave into 4 x 4i8
       {4, MVT::v8i8, 12},  // (load 32i8 and) deinterleave into 4 x 8i8
       {4, MVT::v16i8, 24}, // (load 64i8 and) deinterleave into 4 x 16i8
       {4, MVT::v32i8, 56}, // (load 128i8 and) deinterleave into 4 x 32i8
 
       {4, MVT::v2i16, 6}, // (load 8i16 and) deinterleave into 4 x 2i16
static const CostTblEntry AVX2InterleavedStoreTbl[] = {
       {3, MVT::v32i16, 54},   // interleave 3 x 32i16 into 96i16 (and store)
 
       {3, MVT::v2i32, 4},   // interleave 3 x 2i32 into 6i32 (and store)
       {3, MVT::v4i32, 5},   // interleave 3 x 4i32 into 12i32 (and store)
       {3, MVT::v8i32, 11},   // interleave 3 x 8i32 into 24i32 (and store)
       {3, MVT::v16i32, 22},   // interleave 3 x 16i32 into 48i32 (and store)
 
       {3, MVT::v2i64, 4},   // interleave 3 x 2i64 into 6i64 (and store)
+      {3, MVT::v4i64, 6},   // interleave 3 x 4i64 into 12i64 (and store)
 
       {4, MVT::v2i8, 4},  // interleave 4 x 2i8 into 8i8 (and store)
       {4, MVT::v4i8, 4},   // interleave 4 x 4i8 into 16i8 (and store)
       {4, MVT::v8i8, 4},  // interleave 4 x 8i8 into 32i8 (and store)
       {4, MVT::v16i8, 8}, // interleave 4 x 16i8 into 64i8 (and store)
       {4, MVT::v32i8, 12}, // interleave 4 x 32i8 into 128i8 (and store)
 
       {4, MVT::v2i16, 2},  // interleave 4 x 2i16 into 8i16 (and store)

llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 10 for VF 2 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 24 for VF 4 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 48 for VF 8 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 96 for VF 16 For instruction:   %v0 = load double, double* %in0, align 8
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load double, double* %in0, align 8
-; AVX2: LV: Found an estimated cost of 24 for VF 4 For instruction:   %v0 = load double, double* %in0, align 8
+; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 48 for VF 8 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 96 for VF 16 For instruction:   %v0 = load double, double* %in0, align 8
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 6 for VF 4 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 12 for VF 8 For instruction:   %v0 = load double, double* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 51 for VF 16 For instruction:   %v0 = load double, double* %in0, align 8

llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 16 for VF 2 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 39 for VF 4 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 78 for VF 8 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX1: LV: Found an estimated cost of 156 for VF 16 For instruction:   %v0 = load i64, i64* %in0, align 8
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load i64, i64* %in0, align 8
-; AVX2: LV: Found an estimated cost of 39 for VF 4 For instruction:   %v0 = load i64, i64* %in0, align 8
+; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 78 for VF 8 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX2: LV: Found an estimated cost of 156 for VF 16 For instruction:   %v0 = load i64, i64* %in0, align 8
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 6 for VF 4 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 12 for VF 8 For instruction:   %v0 = load i64, i64* %in0, align 8
 ; AVX512: LV: Found an estimated cost of 51 for VF 16 For instruction:   %v0 = load i64, i64* %in0, align 8

llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 1 for VF 1 For instruction:   store double %v2, double* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 11 for VF 2 For instruction:   store double %v2, double* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 27 for VF 4 For instruction:   store double %v2, double* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 54 for VF 8 For instruction:   store double %v2, double* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 108 for VF 16 For instruction:   store double %v2, double* %out2, align 8
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store double %v2, double* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   store double %v2, double* %out2, align 8
-; AVX2: LV: Found an estimated cost of 27 for VF 4 For instruction:   store double %v2, double* %out2, align 8
+; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction:   store double %v2, double* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 54 for VF 8 For instruction:   store double %v2, double* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 108 for VF 16 For instruction:   store double %v2, double* %out2, align 8
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 8 for VF 4 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 12 for VF 8 For instruction:   store double %v2, double* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 24 for VF 16 For instruction:   store double %v2, double* %out2, align 8

llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 17 for VF 2 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 39 for VF 4 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 78 for VF 8 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX1: LV: Found an estimated cost of 156 for VF 16 For instruction:   store i64 %v2, i64* %out2, align 8
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   store i64 %v2, i64* %out2, align 8
-; AVX2: LV: Found an estimated cost of 39 for VF 4 For instruction:   store i64 %v2, i64* %out2, align 8
+; AVX2: LV: Found an estimated cost of 9 for VF 4 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 78 for VF 8 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX2: LV: Found an estimated cost of 156 for VF 16 For instruction:   store i64 %v2, i64* %out2, align 8
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 8 for VF 4 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 12 for VF 8 For instruction:   store i64 %v2, i64* %out2, align 8
 ; AVX512: LV: Found an estimated cost of 24 for VF 16 For instruction:   store i64 %v2, i64* %out2, align 8