[X86][Costmodel] Load/store i32/f32 Stride=2 VF=32 interleaving costs

[lebedev.ri]

Summary

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

Here for store pattern we are starting to have spilling,
so accurate modelling may be problematic,
although if i drop the spilling, the measurements don't change.

For load we have:
https://godbolt.org/z/1oTTnncbx - for intels Block RThroughput: =16.0; for ryzens, Block RThroughput: <=8.0
So pick cost of 16.

For store we have:
https://godbolt.org/z/1oTTnncbx - for intels Block RThroughput: =16.0; for ryzens, Block RThroughput: =8.0
So pick cost of 16.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

[RKSimon]

LGTM

[lebedev.ri]

Thank you for the reviews!

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

static const CostTblEntry AVX2InterleavedLoadTbl[] = {
       {2, MVT::v8i16, 6}, // (load 16i16 and) deinterleave into 2 x 8i16
       {2, MVT::v16i16, 9}, // (load 32i16 and) deinterleave into 2 x 16i16
       {2, MVT::v32i16, 18}, // (load 64i16 and) deinterleave into 2 x 32i16
 
       {2, MVT::v2i32, 2}, // (load 4i32 and) deinterleave into 2 x 2i32
       {2, MVT::v4i32, 2}, // (load 8i32 and) deinterleave into 2 x 4i32
       {2, MVT::v8i32, 4}, // (load 16i32 and) deinterleave into 2 x 8i32
       {2, MVT::v16i32, 8}, // (load 32i32 and) deinterleave into 2 x 16i32
+      {2, MVT::v32i32, 16}, // (load 64i32 and) deinterleave into 2 x 32i32
 
       {2, MVT::v4i64, 6}, // (load 8i64 and) deinterleave into 2 x 4i64
 
       {3, MVT::v2i8, 10},  // (load 6i8 and) deinterleave into 3 x 2i8
       {3, MVT::v4i8, 4},   // (load 12i8 and) deinterleave into 3 x 4i8
       {3, MVT::v8i8, 9},   // (load 24i8 and) deinterleave into 3 x 8i8
       {3, MVT::v16i8, 11}, // (load 48i8 and) deinterleave into 3 x 16i8
       {3, MVT::v32i8, 13}, // (load 96i8 and) deinterleave into 3 x 32i8
static const CostTblEntry AVX2InterleavedStoreTbl[] = {
       {2, MVT::v8i16, 3}, // interleave 2 x 8i16 into 16i16 (and store)
       {2, MVT::v16i16, 4}, // interleave 2 x 16i16 into 32i16 (and store)
       {2, MVT::v32i16, 8}, // interleave 2 x 32i16 into 64i16 (and store)
 
       {2, MVT::v2i32, 1}, // interleave 2 x 2i32 into 4i32 (and store)
       {2, MVT::v4i32, 2}, // interleave 2 x 4i32 into 8i32 (and store)
       {2, MVT::v8i32, 4}, // interleave 2 x 8i32 into 16i32 (and store)
       {2, MVT::v16i32, 8}, // interleave 2 x 16i32 into 32i32 (and store)
+      {2, MVT::v32i32, 16}, // interleave 2 x 32i32 into 64i32 (and store)
 
       {2, MVT::v4i64, 6}, // interleave 2 x 4i64 into 8i64 (and store)
 
       {3, MVT::v2i8, 7},   // interleave 3 x 2i8 into 6i8 (and store)
       {3, MVT::v4i8, 8},   // interleave 3 x 4i8 into 12i8 (and store)
       {3, MVT::v8i8, 11},  // interleave 3 x 8i8 into 24i8 (and store)
       {3, MVT::v16i8, 11}, // interleave 3 x 16i8 into 48i8 (and store)
       {3, MVT::v32i8, 13}, // interleave 3 x 32i8 into 96i8 (and store)

llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll

 ; AVX1: LV: Found an estimated cost of 76 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 152 for VF 32 For instruction:   %v0 = load float, float* %in0, align 4
 ;;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
-; AVX2: LV: Found an estimated cost of 152 for VF 32 For instruction:   %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 24 for VF 32 For instruction:   %v0 = load float, float* %in0, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 3 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 3 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 22 for VF 32 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 92 for VF 64 For instruction:   %v0 = load float, float* %in0, align 4

llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll

 ; AVX1: LV: Found an estimated cost of 92 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 184 for VF 32 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
-; AVX2: LV: Found an estimated cost of 184 for VF 32 For instruction:   %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 24 for VF 32 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 3 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 3 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 22 for VF 32 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 92 for VF 64 For instruction:   %v0 = load i32, i32* %in0, align 4

llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll

 ; AVX1: LV: Found an estimated cost of 76 for VF 16 For instruction:   store float %v1, float* %out1, align 4
 ; AVX1: LV: Found an estimated cost of 152 for VF 32 For instruction:   store float %v1, float* %out1, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v1, float* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 2 for VF 2 For instruction:   store float %v1, float* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   store float %v1, float* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 8 For instruction:   store float %v1, float* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction:   store float %v1, float* %out1, align 4
-; AVX2: LV: Found an estimated cost of 152 for VF 32 For instruction:   store float %v1, float* %out1, align 4
+; AVX2: LV: Found an estimated cost of 24 for VF 32 For instruction:   store float %v1, float* %out1, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v1, float* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 2 for VF 2 For instruction:   store float %v1, float* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 2 for VF 4 For instruction:   store float %v1, float* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 2 for VF 8 For instruction:   store float %v1, float* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 16 For instruction:   store float %v1, float* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 10 for VF 32 For instruction:   store float %v1, float* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 20 for VF 64 For instruction:   store float %v1, float* %out1, align 4

llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll

 ; AVX1: LV: Found an estimated cost of 92 for VF 16 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX1: LV: Found an estimated cost of 184 for VF 32 For instruction:   store i32 %v1, i32* %out1, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 2 for VF 2 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 8 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction:   store i32 %v1, i32* %out1, align 4
-; AVX2: LV: Found an estimated cost of 184 for VF 32 For instruction:   store i32 %v1, i32* %out1, align 4
+; AVX2: LV: Found an estimated cost of 24 for VF 32 For instruction:   store i32 %v1, i32* %out1, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 2 for VF 2 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 2 for VF 4 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 2 for VF 8 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 16 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 10 for VF 32 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX512: LV: Found an estimated cost of 20 for VF 64 For instruction:   store i32 %v1, i32* %out1, align 4