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Differential D109755

[NVPTX] NFC: Remove unused imm type intrinsic arg
ClosedPublic

Authored by c-rhodes on Sep 14 2021, 6:05 AM.

Details

Reviewers
tra
jholewinski
Commits
rG18655140d622: [NVPTX] NFC: Remove unused imm type intrinsic arg
Summary

Identified in D109359.

Diff Detail

Event Timeline

c-rhodes created this revision.Sep 14 2021, 6:05 AM
Herald added a subscriber: hiraditya. · View Herald TranscriptSep 14 2021, 6:05 AM
c-rhodes requested review of this revision.Sep 14 2021, 6:05 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 14 2021, 6:05 AM
Herald added a subscriber: jdoerfert. · View Herald Transcript
Harbormaster completed remote builds in B123829: Diff 372462.Sep 14 2021, 6:46 AM
tra accepted this revision.Sep 14 2021, 8:53 AM
This revision is now accepted and ready to land.Sep 14 2021, 8:53 AM
Closed by commit rG18655140d622: [NVPTX] NFC: Remove unused imm type intrinsic arg (authored by c-rhodes). · Explain WhySep 15 2021, 1:57 AM
This revision was automatically updated to reflect the committed changes.
c-rhodes added a commit: rG18655140d622: [NVPTX] NFC: Remove unused imm type intrinsic arg.

Revision Contents

PathSize
llvm/
lib/
Target/
NVPTX/
25 lines

Diff 372462

llvm/lib/Target/NVPTX/NVPTXIntrinsics.td

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 1,226 Lines • ▼ Show 20 Lines defm p32 : F_ATOMIC_2_imp<Int32Regs, regclass, SpaceStr, TypeStr, OpcStr,
IntOp, IMMType, IMM, Pred>; IntOp, IMMType, IMM, Pred>;
defm p64 : F_ATOMIC_2_imp<Int64Regs, regclass, SpaceStr, TypeStr, OpcStr, defm p64 : F_ATOMIC_2_imp<Int64Regs, regclass, SpaceStr, TypeStr, OpcStr,
IntOp, IMMType, IMM, Pred>; IntOp, IMMType, IMM, Pred>;
} }
// has 2 operands, neg the second one // has 2 operands, neg the second one
multiclass F_ATOMIC_2_NEG_imp<NVPTXRegClass ptrclass, NVPTXRegClass regclass, multiclass F_ATOMIC_2_NEG_imp<NVPTXRegClass ptrclass, NVPTXRegClass regclass,
string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp, string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp,
Operand IMMType, list<Predicate> Pred> { list<Predicate> Pred> {
def reg : NVPTXInst<(outs regclass:$dst), (ins ptrclass:$addr, regclass:$b), def reg : NVPTXInst<(outs regclass:$dst), (ins ptrclass:$addr, regclass:$b),
!strconcat( !strconcat(
"{{ \n\t", "{{ \n\t",
".reg \t.s", TypeStr, " temp; \n\t", ".reg \t.s", TypeStr, " temp; \n\t",
"neg.s", TypeStr, " \ttemp, $b; \n\t", "neg.s", TypeStr, " \ttemp, $b; \n\t",
"atom", SpaceStr, OpcStr, ".u", TypeStr, " \t$dst, [$addr], temp; \n\t", "atom", SpaceStr, OpcStr, ".u", TypeStr, " \t$dst, [$addr], temp; \n\t",
"}}"), "}}"),
[(set regclass:$dst, (IntOp ptrclass:$addr, regclass:$b))]>, [(set regclass:$dst, (IntOp ptrclass:$addr, regclass:$b))]>,
Requires<Pred>; Requires<Pred>;
} }
multiclass F_ATOMIC_2_NEG<NVPTXRegClass regclass, string SpaceStr, multiclass F_ATOMIC_2_NEG<NVPTXRegClass regclass, string SpaceStr,
string TypeStr, string OpcStr, PatFrag IntOp, Operand IMMType, string TypeStr, string OpcStr, PatFrag IntOp, list<Predicate> Pred = []> {
list<Predicate> Pred = []> {
defm p32: F_ATOMIC_2_NEG_imp<Int32Regs, regclass, SpaceStr, TypeStr, OpcStr, defm p32: F_ATOMIC_2_NEG_imp<Int32Regs, regclass, SpaceStr, TypeStr, OpcStr,
IntOp, IMMType, Pred> ; IntOp, Pred> ;
defm p64: F_ATOMIC_2_NEG_imp<Int64Regs, regclass, SpaceStr, TypeStr, OpcStr, defm p64: F_ATOMIC_2_NEG_imp<Int64Regs, regclass, SpaceStr, TypeStr, OpcStr,
IntOp, IMMType, Pred> ; IntOp, Pred> ;
} }
// has 3 operands // has 3 operands
multiclass F_ATOMIC_3_imp<NVPTXRegClass ptrclass, NVPTXRegClass regclass, multiclass F_ATOMIC_3_imp<NVPTXRegClass ptrclass, NVPTXRegClass regclass,
string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp, string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp,
Operand IMMType, list<Predicate> Pred> { Operand IMMType, list<Predicate> Pred> {
def reg : NVPTXInst<(outs regclass:$dst), def reg : NVPTXInst<(outs regclass:$dst),
(ins ptrclass:$addr, regclass:$b, regclass:$c), (ins ptrclass:$addr, regclass:$b, regclass:$c),
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def atomic_load_sub_64_g: ATOMIC_GLOBAL_CHK<(ops node:$a, node:$b), def atomic_load_sub_64_g: ATOMIC_GLOBAL_CHK<(ops node:$a, node:$b),
(atomic_load_sub_64 node:$a, node:$b)>; (atomic_load_sub_64 node:$a, node:$b)>;
def atomic_load_sub_64_s: ATOMIC_SHARED_CHK<(ops node:$a, node:$b), def atomic_load_sub_64_s: ATOMIC_SHARED_CHK<(ops node:$a, node:$b),
(atomic_load_sub_64 node:$a, node:$b)>; (atomic_load_sub_64 node:$a, node:$b)>;
def atomic_load_sub_64_gen: ATOMIC_GENERIC_CHK<(ops node:$a, node:$b), def atomic_load_sub_64_gen: ATOMIC_GENERIC_CHK<(ops node:$a, node:$b),
(atomic_load_sub_64 node:$a, node:$b)>; (atomic_load_sub_64 node:$a, node:$b)>;
defm INT_PTX_ATOM_SUB_G_32 : F_ATOMIC_2_NEG<Int32Regs, ".global", "32", ".add", defm INT_PTX_ATOM_SUB_G_32 : F_ATOMIC_2_NEG<Int32Regs, ".global", "32", ".add",
atomic_load_sub_32_g, i32imm>; atomic_load_sub_32_g>;
defm INT_PTX_ATOM_SUB_G_64 : F_ATOMIC_2_NEG<Int64Regs, ".global", "64", ".add", defm INT_PTX_ATOM_SUB_G_64 : F_ATOMIC_2_NEG<Int64Regs, ".global", "64", ".add",
atomic_load_sub_64_g, i64imm>; atomic_load_sub_64_g>;
defm INT_PTX_ATOM_SUB_GEN_32 : F_ATOMIC_2_NEG<Int32Regs, "", "32", ".add", defm INT_PTX_ATOM_SUB_GEN_32 : F_ATOMIC_2_NEG<Int32Regs, "", "32", ".add",
atomic_load_sub_32_gen, i32imm>; atomic_load_sub_32_gen>;
defm INT_PTX_ATOM_SUB_GEN_32_USE_G : F_ATOMIC_2_NEG<Int32Regs, ".global", "32", defm INT_PTX_ATOM_SUB_GEN_32_USE_G : F_ATOMIC_2_NEG<Int32Regs, ".global", "32",
".add", atomic_load_sub_32_gen, i32imm>; ".add", atomic_load_sub_32_gen>;
defm INT_PTX_ATOM_SUB_S_32 : F_ATOMIC_2_NEG<Int32Regs, ".shared", "32", ".add", defm INT_PTX_ATOM_SUB_S_32 : F_ATOMIC_2_NEG<Int32Regs, ".shared", "32", ".add",
atomic_load_sub_32_s, i32imm>; atomic_load_sub_32_s>;
defm INT_PTX_ATOM_SUB_S_64 : F_ATOMIC_2_NEG<Int64Regs, ".shared", "64", ".add", defm INT_PTX_ATOM_SUB_S_64 : F_ATOMIC_2_NEG<Int64Regs, ".shared", "64", ".add",
atomic_load_sub_64_s, i64imm>; atomic_load_sub_64_s>;
defm INT_PTX_ATOM_SUB_GEN_64 : F_ATOMIC_2_NEG<Int64Regs, "", "64", ".add", defm INT_PTX_ATOM_SUB_GEN_64 : F_ATOMIC_2_NEG<Int64Regs, "", "64", ".add",
atomic_load_sub_64_gen, i64imm>; atomic_load_sub_64_gen>;
defm INT_PTX_ATOM_SUB_GEN_64_USE_G : F_ATOMIC_2_NEG<Int64Regs, ".global", "64", defm INT_PTX_ATOM_SUB_GEN_64_USE_G : F_ATOMIC_2_NEG<Int64Regs, ".global", "64",
".add", atomic_load_sub_64_gen, i64imm>; ".add", atomic_load_sub_64_gen>;
// atom_swap // atom_swap
def atomic_swap_32_g: ATOMIC_GLOBAL_CHK<(ops node:$a, node:$b), def atomic_swap_32_g: ATOMIC_GLOBAL_CHK<(ops node:$a, node:$b),
(atomic_swap_32 node:$a, node:$b)>; (atomic_swap_32 node:$a, node:$b)>;
def atomic_swap_32_s: ATOMIC_SHARED_CHK<(ops node:$a, node:$b), def atomic_swap_32_s: ATOMIC_SHARED_CHK<(ops node:$a, node:$b),
(atomic_swap_32 node:$a, node:$b)>; (atomic_swap_32 node:$a, node:$b)>;
def atomic_swap_32_gen: ATOMIC_GENERIC_CHK<(ops node:$a, node:$b), def atomic_swap_32_gen: ATOMIC_GENERIC_CHK<(ops node:$a, node:$b),
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