[ARC] Add norm/normh instructions with disassembly tests

[marksl]

Summary

Add disassembler support for the NORM and NORMH instructions. These instructions only exist when the ARC processor is configured with the "norm" extension.

[thomasjohns]

Looks good to me

llvm/lib/Target/ARC/ARCInstrInfo.td

 // Call sequencing nodes.
 // These are target-independent nodes, but have target-specific formats.
 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARCCallSeqStart,
                            [SDNPHasChain, SDNPOutGlue]>;
 def callseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_ARCCallSeqEnd,
                            [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
 
 //===----------------------------------------------------------------------===//
+// Instruction predicates
+//===----------------------------------------------------------------------===//
+
+def HasNorm  :       Predicate<"Subtarget->hasNorm()">;
+
+//===----------------------------------------------------------------------===//
 // Instruction Pattern Stuff
 //===----------------------------------------------------------------------===//
 
 def imm32 : ImmLeaf<i32, [{
   return (Imm & 0xFFFFFFFF) == Imm;
 }]>;
 
 // Addressing modes

 // ---------------------------------------------------------------------------
 // General unary instruction definitions.
 defm SEXB : ArcUnaryGEN4Inst<0b000101, "sexb">;
 defm SEXH : ArcUnaryGEN4Inst<0b000110, "sexh">;
 
 // Extension unary instruction definitions.
 defm FLS : ArcUnaryEXT5Inst<0b010011, "fls">;
 
+let Predicates=[HasNorm] in {
+  defm NORM  : ArcUnaryEXT5Inst<0b000001,"norm">;
+  defm NORMH : ArcUnaryEXT5Inst<0b001000,"normh">;
+}
+
 // General Unary Instruction fragments.
 def : Pat<(sext_inreg i32:$a, i8), (SEXB_rr i32:$a)>;
 def : Pat<(sext_inreg i32:$a, i16), (SEXH_rr i32:$a)>;
 
 // Comparison instruction definition
 let isCompare = 1, Defs = [STATUS32] in {
 defm CMP : ArcSpecialDOPInst<0b001100, "cmp", 1>;
 }

llvm/test/MC/Disassembler/ARC/misc.txt

 # CHECK: seteq %fp, %fp, -1
 0xb8 0x23 0xff 0x3f 
 
 # CHECK: fls %r0, %r0
 0x2f 0x28 0x13 0x00
 
 # CHECK: fls.f %r0, %r0
 0x2f 0x28 0x13 0x80
+
+# CHECK: norm %r22, %blink
+0x2f 0x2e 0xc1 0x27
+
+# CHECK: normh %r7, %r18
+0x2f 0x2f 0x88 0x04