[llvm-mca] Fix JSON output for multiple regions

[markoshorro]

Summary

Instead of printing each region individually when using JSON format, this patch creates a JSON object which is updated with the values of each region and prints at the end.
This patch also adds a new test considering 2 nested regions.

[andreadb]

This patch also adds a new test considering 2 nested regions.

Hi,

I only see changes to Views.s. Did you forget to upload the new test?

[markoshorro]

Forgot to update the patch with the new test.

[andreadb]

llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s

53–72

It is unfortunate how "Resources" is now duplicated for every code region.

I understand that we get this point because "Resources" is contributed by a view (so, it is printed once per code region).

Ideally, there should be only one top-level instance.

Do you know if there is an easy way to avoid duplicating "Resources"?
In retrospect, the idea of printing that info from a view only makes sense if there is a single code region.

[andreadb]

llvm/tools/llvm-mca/llvm-mca.cpp

601

remove tab.

670–675

Add braces for this then block.

676

remove tab.

[markoshorro]

"Resources" is now at top-level in the output. I have specialized a bit the InstructionView for printing only once the "Resources" key at top level even when having multiple regions.

I have some doubts about the coding style when having

if (condition) {
     stmt;
     stmt;
} else
      stmtelse;

I have put braces surrounding else stmtelse, but I am not sure if that is correct...

[andreadb]

LGTM

In D105618#2867209, @markoshorro wrote:

"Resources" is now at top-level in the output. I have specialized a bit the InstructionView for printing only once the "Resources" key at top level even when having multiple regions.

I have some doubts about the coding style when having

if (condition) {
     stmt;
     stmt;
} else
      stmtelse;

I have put braces surrounding else stmtelse, but I am not sure if that is correct...

That's fine. Thanks!

llvm/test/tools/llvm-mca/JSON/X86/views-multiple-region.s

+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# Verify that we create proper JSON for the MCA views TimelineView, ResourcePressureview,
+# InstructionInfoView and SummaryView.
+
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json --timeline-max-iterations=1 --timeline --all-stats --all-views < %s | FileCheck %s
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json --timeline-max-iterations=1 --timeline --all-stats --all-views -o %t.json < %s
+# RUN: cat %t.json \
+# RUN:  | %python -c 'import json, sys; json.dump(json.loads(sys.stdin.read()), sys.stdout, sort_keys=True, indent=2)' \
+# RUN:  | FileCheck %s
+
+# LLVM-MCA-BEGIN foo
+add %eax, %eax
+# LLVM-MCA-BEGIN bar
+add %ebx, %ebx
+add %ecx, %ecx
+# LLVM-MCA-END bar
+add %edx, %edx
+# LLVM-MCA-END foo
+
+# CHECK:      {
+# CHECK-NEXT:   "bar": {
+# CHECK-NEXT:     "DispatchStatistics": {
+# CHECK-NEXT:       "GROUP": 0,
+# CHECK-NEXT:       "LQ": 0,
+# CHECK-NEXT:       "RAT": 0,
+# CHECK-NEXT:       "RCU": 0,
+# CHECK-NEXT:       "SCHEDQ": 41,
+# CHECK-NEXT:       "SQ": 0,
+# CHECK-NEXT:       "USH": 0
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "InstructionInfoView": {
+# CHECK-NEXT:       "InstructionList": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 0,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 1,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "Instructions and CPU resources": {
+# CHECK-NEXT:       "Instructions": [
+# CHECK-NEXT:         "addl\t%ebx, %ebx",
+# CHECK-NEXT:         "addl\t%ecx, %ecx"
+# CHECK-NEXT:       ],
+# CHECK-NEXT:       "Resources": {
+# CHECK-NEXT:         "CPUName": "haswell",
+# CHECK-NEXT:         "Resources": [
+# CHECK-NEXT:           "HWDivider",
+# CHECK-NEXT:           "HWFPDivider",
+# CHECK-NEXT:           "HWPort0",
+# CHECK-NEXT:           "HWPort1",
+# CHECK-NEXT:           "HWPort2",
+# CHECK-NEXT:           "HWPort3",
+# CHECK-NEXT:           "HWPort4",
+# CHECK-NEXT:           "HWPort5",
+# CHECK-NEXT:           "HWPort6",
+# CHECK-NEXT:           "HWPort7"
+# CHECK-NEXT:         ]
+# CHECK-NEXT:       }
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "ResourcePressureView": {
+# CHECK-NEXT:       "ResourcePressureInfo": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 0,
+# CHECK-NEXT:           "ResourceIndex": 3,
+# CHECK-NEXT:           "ResourceUsage": 0.5
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 0,
+# CHECK-NEXT:           "ResourceIndex": 8,
+# CHECK-NEXT:           "ResourceUsage": 0.5
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 1,
+# CHECK-NEXT:           "ResourceIndex": 2,
+# CHECK-NEXT:           "ResourceUsage": 0.5
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 1,
+# CHECK-NEXT:           "ResourceIndex": 7,
+# CHECK-NEXT:           "ResourceUsage": 0.5
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 2,
+# CHECK-NEXT:           "ResourceIndex": 2,
+# CHECK-NEXT:           "ResourceUsage": 0.5
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 2,
+# CHECK-NEXT:           "ResourceIndex": 3,
+# CHECK-NEXT:           "ResourceUsage": 0.5
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 2,
+# CHECK-NEXT:           "ResourceIndex": 7,
+# CHECK-NEXT:           "ResourceUsage": 0.5
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 2,
+# CHECK-NEXT:           "ResourceIndex": 8,
+# CHECK-NEXT:           "ResourceUsage": 0.5
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "SummaryView": {
+# CHECK-NEXT:       "BlockRThroughput": 0.5,
+# CHECK-NEXT:       "DispatchWidth": 4,
+# CHECK-NEXT:       "IPC": 1.941747572815534,
+# CHECK-NEXT:       "Instructions": 200,
+# CHECK-NEXT:       "Iterations": 100,
+# CHECK-NEXT:       "TotalCycles": 103,
+# CHECK-NEXT:       "TotaluOps": 200,
+# CHECK-NEXT:       "uOpsPerCycle": 1.941747572815534
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "TimelineView": {
+# CHECK-NEXT:       "TimelineInfo": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     }
+# CHECK-NEXT:   },
+# CHECK-NEXT:   "foo": {
+# CHECK-NEXT:     "DispatchStatistics": {
+# CHECK-NEXT:       "GROUP": 0,
+# CHECK-NEXT:       "LQ": 0,
+# CHECK-NEXT:       "RAT": 0,
+# CHECK-NEXT:       "RCU": 0,
+# CHECK-NEXT:       "SCHEDQ": 0,
+# CHECK-NEXT:       "SQ": 0,
+# CHECK-NEXT:       "USH": 0
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "InstructionInfoView": {
+# CHECK-NEXT:       "InstructionList": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 0,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 1,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 2,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 3,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "Instructions and CPU resources": {
+# CHECK-NEXT:       "Instructions": [
+# CHECK-NEXT:         "addl\t%eax, %eax",
+# CHECK-NEXT:         "addl\t%ebx, %ebx",
+# CHECK-NEXT:         "addl\t%ecx, %ecx",
+# CHECK-NEXT:         "addl\t%edx, %edx"
+# CHECK-NEXT:       ],
+# CHECK-NEXT:       "Resources": {
+# CHECK-NEXT:         "CPUName": "haswell",
+# CHECK-NEXT:         "Resources": [
+# CHECK-NEXT:           "HWDivider",
+# CHECK-NEXT:           "HWFPDivider",
+# CHECK-NEXT:           "HWPort0",
+# CHECK-NEXT:           "HWPort1",
+# CHECK-NEXT:           "HWPort2",
+# CHECK-NEXT:           "HWPort3",
+# CHECK-NEXT:           "HWPort4",
+# CHECK-NEXT:           "HWPort5",
+# CHECK-NEXT:           "HWPort6",
+# CHECK-NEXT:           "HWPort7"
+# CHECK-NEXT:         ]
+# CHECK-NEXT:       }
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "ResourcePressureView": {
+# CHECK-NEXT:       "ResourcePressureInfo": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 0,
+# CHECK-NEXT:           "ResourceIndex": 8,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 1,
+# CHECK-NEXT:           "ResourceIndex": 7,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 2,
+# CHECK-NEXT:           "ResourceIndex": 3,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 3,
+# CHECK-NEXT:           "ResourceIndex": 2,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 4,
+# CHECK-NEXT:           "ResourceIndex": 2,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 4,
+# CHECK-NEXT:           "ResourceIndex": 3,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 4,
+# CHECK-NEXT:           "ResourceIndex": 7,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 4,
+# CHECK-NEXT:           "ResourceIndex": 8,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "SummaryView": {
+# CHECK-NEXT:       "BlockRThroughput": 1,
+# CHECK-NEXT:       "DispatchWidth": 4,
+# CHECK-NEXT:       "IPC": 3.883495145631068,
+# CHECK-NEXT:       "Instructions": 400,
+# CHECK-NEXT:       "Iterations": 100,
+# CHECK-NEXT:       "TotalCycles": 103,
+# CHECK-NEXT:       "TotaluOps": 400,
+# CHECK-NEXT:       "uOpsPerCycle": 3.883495145631068
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "TimelineView": {
+# CHECK-NEXT:       "TimelineInfo": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     }
+# CHECK-NEXT:   }
+# CHECK-NEXT: }

llvm/test/tools/llvm-mca/JSON/X86/views.s

 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
 # Verify that we create proper JSON for the MCA views TimelineView, ResourcePressureview,
 # InstructionInfoView and SummaryView.
 
 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json --timeline-max-iterations=1 --timeline --all-stats --all-views < %s | FileCheck %s
 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json --timeline-max-iterations=1 --timeline --all-stats --all-views -o %t.json < %s
 # RUN: cat %t.json \
 # RUN:  | %python -c 'import json, sys; json.dump(json.loads(sys.stdin.read()), sys.stdout, sort_keys=True, indent=2)' \
 # RUN:  | FileCheck %s
 
 add %eax, %eax
 add %ebx, %ebx
 add %ecx, %ecx
 add %edx, %edx
 
 # CHECK:      {
-# CHECK-NEXT:   "DispatchStatistics": {
-# CHECK-NEXT:     "GROUP": 0,
-# CHECK-NEXT:     "LQ": 0,
-# CHECK-NEXT:     "RAT": 0,
-# CHECK-NEXT:     "RCU": 0,
-# CHECK-NEXT:     "SCHEDQ": 0,
-# CHECK-NEXT:     "SQ": 0,
-# CHECK-NEXT:     "USH": 0
-# CHECK-NEXT:   },
-# CHECK-NEXT:   "InstructionInfoView": {
-# CHECK-NEXT:     "InstructionList": [
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "Instruction": 0,
-# CHECK-NEXT:         "Latency": 1,
-# CHECK-NEXT:         "NumMicroOpcodes": 1,
-# CHECK-NEXT:         "RThroughput": 0.25,
-# CHECK-NEXT:         "hasUnmodeledSideEffects": false,
-# CHECK-NEXT:         "mayLoad": false,
-# CHECK-NEXT:         "mayStore": false
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "Instruction": 1,
-# CHECK-NEXT:         "Latency": 1,
-# CHECK-NEXT:         "NumMicroOpcodes": 1,
-# CHECK-NEXT:         "RThroughput": 0.25,
-# CHECK-NEXT:         "hasUnmodeledSideEffects": false,
-# CHECK-NEXT:         "mayLoad": false,
-# CHECK-NEXT:         "mayStore": false
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "Instruction": 2,
-# CHECK-NEXT:         "Latency": 1,
-# CHECK-NEXT:         "NumMicroOpcodes": 1,
-# CHECK-NEXT:         "RThroughput": 0.25,
-# CHECK-NEXT:         "hasUnmodeledSideEffects": false,
-# CHECK-NEXT:         "mayLoad": false,
-# CHECK-NEXT:         "mayStore": false
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "Instruction": 3,
-# CHECK-NEXT:         "Latency": 1,
-# CHECK-NEXT:         "NumMicroOpcodes": 1,
-# CHECK-NEXT:         "RThroughput": 0.25,
-# CHECK-NEXT:         "hasUnmodeledSideEffects": false,
-# CHECK-NEXT:         "mayLoad": false,
-# CHECK-NEXT:         "mayStore": false
-# CHECK-NEXT:       }
-# CHECK-NEXT:     ]
-# CHECK-NEXT:   },
-# CHECK-NEXT:   "Instructions and CPU resources": {
-# CHECK-NEXT:     "Instructions": [
-# CHECK-NEXT:       "addl\t%eax, %eax",
-# CHECK-NEXT:       "addl\t%ebx, %ebx",
-# CHECK-NEXT:       "addl\t%ecx, %ecx",
-# CHECK-NEXT:       "addl\t%edx, %edx"
-# CHECK-NEXT:     ],
-# CHECK-NEXT:     "Resources": {
-# CHECK-NEXT:       "CPUName": "haswell",
-# CHECK-NEXT:       "Resources": [
-# CHECK-NEXT:         "HWDivider",
-# CHECK-NEXT:         "HWFPDivider",
-# CHECK-NEXT:         "HWPort0",
-# CHECK-NEXT:         "HWPort1",
-# CHECK-NEXT:         "HWPort2",
-# CHECK-NEXT:         "HWPort3",
-# CHECK-NEXT:         "HWPort4",
-# CHECK-NEXT:         "HWPort5",
-# CHECK-NEXT:         "HWPort6",
-# CHECK-NEXT:         "HWPort7"
-# CHECK-NEXT:       ]
-# CHECK-NEXT:     }
-# CHECK-NEXT:   },
-# CHECK-NEXT:   "ResourcePressureView": {
-# CHECK-NEXT:     "ResourcePressureInfo": [
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "InstructionIndex": 0,
-# CHECK-NEXT:         "ResourceIndex": 8,
-# CHECK-NEXT:         "ResourceUsage": 1
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "InstructionIndex": 1,
-# CHECK-NEXT:         "ResourceIndex": 7,
-# CHECK-NEXT:         "ResourceUsage": 1
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "InstructionIndex": 2,
-# CHECK-NEXT:         "ResourceIndex": 3,
-# CHECK-NEXT:         "ResourceUsage": 1
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "InstructionIndex": 3,
-# CHECK-NEXT:         "ResourceIndex": 2,
-# CHECK-NEXT:         "ResourceUsage": 1
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "InstructionIndex": 4,
-# CHECK-NEXT:         "ResourceIndex": 2,
-# CHECK-NEXT:         "ResourceUsage": 1
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "InstructionIndex": 4,
-# CHECK-NEXT:         "ResourceIndex": 3,
-# CHECK-NEXT:         "ResourceUsage": 1
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "InstructionIndex": 4,
-# CHECK-NEXT:         "ResourceIndex": 7,
-# CHECK-NEXT:         "ResourceUsage": 1
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "InstructionIndex": 4,
-# CHECK-NEXT:         "ResourceIndex": 8,
-# CHECK-NEXT:         "ResourceUsage": 1
-# CHECK-NEXT:       }
-# CHECK-NEXT:     ]
-# CHECK-NEXT:   },
-# CHECK-NEXT:   "SummaryView": {
-# CHECK-NEXT:     "BlockRThroughput": 1,
-# CHECK-NEXT:     "DispatchWidth": 4,
-# CHECK-NEXT:     "IPC": 3.883495145631068,
-# CHECK-NEXT:     "Instructions": 400,
-# CHECK-NEXT:     "Iterations": 100,
-# CHECK-NEXT:     "TotalCycles": 103,
-# CHECK-NEXT:     "TotaluOps": 400,
-# CHECK-NEXT:     "uOpsPerCycle": 3.883495145631068
-# CHECK-NEXT:   },
-# CHECK-NEXT:   "TimelineView": {
-# CHECK-NEXT:     "TimelineInfo": [
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "CycleDispatched": 0,
-# CHECK-NEXT:         "CycleExecuted": 2,
-# CHECK-NEXT:         "CycleIssued": 1,
-# CHECK-NEXT:         "CycleReady": 0,
-# CHECK-NEXT:         "CycleRetired": 3
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "CycleDispatched": 0,
-# CHECK-NEXT:         "CycleExecuted": 2,
-# CHECK-NEXT:         "CycleIssued": 1,
-# CHECK-NEXT:         "CycleReady": 0,
-# CHECK-NEXT:         "CycleRetired": 3
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "CycleDispatched": 0,
-# CHECK-NEXT:         "CycleExecuted": 2,
-# CHECK-NEXT:         "CycleIssued": 1,
-# CHECK-NEXT:         "CycleReady": 0,
-# CHECK-NEXT:         "CycleRetired": 3
-# CHECK-NEXT:       },
-# CHECK-NEXT:       {
-# CHECK-NEXT:         "CycleDispatched": 0,
-# CHECK-NEXT:         "CycleExecuted": 2,
-# CHECK-NEXT:         "CycleIssued": 1,
-# CHECK-NEXT:         "CycleReady": 0,
-# CHECK-NEXT:         "CycleRetired": 3
-# CHECK-NEXT:       }
-# CHECK-NEXT:     ]
-# CHECK-NEXT:   }
-# CHECK-NEXT: }
+# CHECK-NEXT:   "main": {
+# CHECK-NEXT:     "DispatchStatistics": {
+# CHECK-NEXT:       "GROUP": 0,
+# CHECK-NEXT:       "LQ": 0,
+# CHECK-NEXT:       "RAT": 0,
+# CHECK-NEXT:       "RCU": 0,
+# CHECK-NEXT:       "SCHEDQ": 0,
+# CHECK-NEXT:       "SQ": 0,
+# CHECK-NEXT:       "USH": 0
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "InstructionInfoView": {
+# CHECK-NEXT:       "InstructionList": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 0,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 1,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 2,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "Instruction": 3,
+# CHECK-NEXT:           "Latency": 1,
+# CHECK-NEXT:           "NumMicroOpcodes": 1,
+# CHECK-NEXT:           "RThroughput": 0.25,
+# CHECK-NEXT:           "hasUnmodeledSideEffects": false,
+# CHECK-NEXT:           "mayLoad": false,
+# CHECK-NEXT:           "mayStore": false
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "Instructions and CPU resources": {
+# CHECK-NEXT:       "Instructions": [
+# CHECK-NEXT:         "addl\t%eax, %eax",
+# CHECK-NEXT:         "addl\t%ebx, %ebx",
+# CHECK-NEXT:         "addl\t%ecx, %ecx",
+# CHECK-NEXT:         "addl\t%edx, %edx"
+# CHECK-NEXT:       ],
+# CHECK-NEXT:       "Resources": {
+# CHECK-NEXT:         "CPUName": "haswell",
+# CHECK-NEXT:         "Resources": [
+# CHECK-NEXT:           "HWDivider",
+# CHECK-NEXT:           "HWFPDivider",
+# CHECK-NEXT:           "HWPort0",
+# CHECK-NEXT:           "HWPort1",
+# CHECK-NEXT:           "HWPort2",
+# CHECK-NEXT:           "HWPort3",
+# CHECK-NEXT:           "HWPort4",
+# CHECK-NEXT:           "HWPort5",
+# CHECK-NEXT:           "HWPort6",
+# CHECK-NEXT:           "HWPort7"
+# CHECK-NEXT:         ]
+# CHECK-NEXT:       }
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "ResourcePressureView": {
+# CHECK-NEXT:       "ResourcePressureInfo": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 0,
+# CHECK-NEXT:           "ResourceIndex": 8,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 1,
+# CHECK-NEXT:           "ResourceIndex": 7,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 2,
+# CHECK-NEXT:           "ResourceIndex": 3,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 3,
+# CHECK-NEXT:           "ResourceIndex": 2,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 4,
+# CHECK-NEXT:           "ResourceIndex": 2,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 4,
+# CHECK-NEXT:           "ResourceIndex": 3,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 4,
+# CHECK-NEXT:           "ResourceIndex": 7,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "InstructionIndex": 4,
+# CHECK-NEXT:           "ResourceIndex": 8,
+# CHECK-NEXT:           "ResourceUsage": 1
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "SummaryView": {
+# CHECK-NEXT:       "BlockRThroughput": 1,
+# CHECK-NEXT:       "DispatchWidth": 4,
+# CHECK-NEXT:       "IPC": 3.883495145631068,
+# CHECK-NEXT:       "Instructions": 400,
+# CHECK-NEXT:       "Iterations": 100,
+# CHECK-NEXT:       "TotalCycles": 103,
+# CHECK-NEXT:       "TotaluOps": 400,
+# CHECK-NEXT:       "uOpsPerCycle": 3.883495145631068
+# CHECK-NEXT:     },
+# CHECK-NEXT:     "TimelineView": {
+# CHECK-NEXT:       "TimelineInfo": [
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         },
+# CHECK-NEXT:         {
+# CHECK-NEXT:           "CycleDispatched": 0,
+# CHECK-NEXT:           "CycleExecuted": 2,
+# CHECK-NEXT:           "CycleIssued": 1,
+# CHECK-NEXT:           "CycleReady": 0,
+# CHECK-NEXT:           "CycleRetired": 3
+# CHECK-NEXT:         }
+# CHECK-NEXT:       ]
+# CHECK-NEXT:     }
+# CHECK-NEXT:   }
+# CHECK-NEXT: }

llvm/tools/llvm-mca/PipelinePrinter.h

PipelinePrinter(Pipeline &pipeline, View::OutputKind OutputKind)
       : P(pipeline), OutputKind(OutputKind) {}
 
   void addView(std::unique_ptr<View> V) {
     P.addEventListener(V.get());
     Views.emplace_back(std::move(V));
   }
 
   void printReport(llvm::raw_ostream &OS) const;
+  json::Object getJSONReportRegion() const;
 };
 } // namespace mca
 } // namespace llvm
 
 #endif // LLVM_TOOLS_LLVM_MCA_PIPELINEPRINTER_H

llvm/tools/llvm-mca/PipelinePrinter.cpp

 //===----------------------------------------------------------------------===//
 
 #include "PipelinePrinter.h"
 #include "Views/View.h"
 
 namespace llvm {
 namespace mca {
 
-void PipelinePrinter::printReport(llvm::raw_ostream &OS) const {
+json::Object PipelinePrinter::getJSONReportRegion() const {
   json::Object JO;
   for (const auto &V : Views) {
-    if ((OutputKind == View::OK_JSON)) {
-      if (V->isSerializable()) {
-        JO.try_emplace(V->getNameAsString().str(), V->toJSON());
-      }
-    } else {
-      V->printView(OS);
-    }
+  return JO;
+}
+
+void PipelinePrinter::printReport(llvm::raw_ostream &OS) const {
+  json::Object JO;
+  for (const auto &V : Views) {
+      V->printView(OS);
   }
-  if (OutputKind == View::OK_JSON)
-    OS << formatv("{0:2}", json::Value(std::move(JO))) << "\n";
 }
 } // namespace mca.
 } // namespace llvm

llvm/tools/llvm-mca/llvm-mca.cpp

int main(int argc, char **argv) {
   std::unique_ptr<MCCodeEmitter> MCE(
       TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx));
   assert(MCE && "Unable to create code emitter!");
 
   std::unique_ptr<MCAsmBackend> MAB(TheTarget->createMCAsmBackend(
       *STI, *MRI, mc::InitMCTargetOptionsFromFlags()));
   assert(MAB && "Unable to create asm backend!");
 
+  json::Object JSONOutput;
   for (const std::unique_ptr<mca::CodeRegion> &Region : Regions) {
     // Skip empty code regions.
     if (Region->empty())
       continue;
 
     // Don't print the header of this region if it is the default region, and
     // it doesn't have an end location.
-    if (Region->startLoc().isValid() || Region->endLoc().isValid()) {
+    if (!PrintJson &&
+        (Region->startLoc().isValid() || Region->endLoc().isValid())) {
       TOF->os() << "\n[" << RegionIdx++ << "] Code Region";
       StringRef Desc = Region->getDescription();
       if (!Desc.empty())
         TOF->os() << " - " << Desc;
       TOF->os() << "\n\n";
     }
 
     // Lower the MCInst sequence into an mca::Instruction sequence.
if (PrintInstructionTables) {
             *STI, *MCII, CE, ShowEncoding, Insts, *IP));
       }
       Printer.addView(
           std::make_unique<mca::ResourcePressureView>(*STI, *IP, Insts));
 
       if (!runPipeline(*P))
         return 1;
 
+      if (PrintJson)
+        JSONOutput.try_emplace(!Region->getDescription().empty()
+                                   ? Region->getDescription().str()
+                                   : "main",
+                               Printer.getJSONReportRegion());
+      else
         Printer.printReport(TOF->os());
       continue;
     }
 
     // Create the CustomBehaviour object for enforcing Target Specific
     // behaviours and dependencies that aren't expressed well enough
     // in the tablegen. CB cannot depend on the list of MCInst or
     // the source code (but it can depend on the list of
     // mca::Instruction or any objects that can be reconstructed
if (PrintTimelineView) {
       Printer.addView(std::make_unique<mca::TimelineView>(
           *STI, *IP, Insts, std::min(TimelineIterations, S.getNumIterations()),
           TimelineMaxCycles));
     }
 
     if (!runPipeline(*P))
       return 1;
 
+    if (PrintJson)
+      JSONOutput.try_emplace(!Region->getDescription().empty()
+                                 ? Region->getDescription().str()
+                                 : "main",
+                             Printer.getJSONReportRegion());
+    else
       Printer.printReport(TOF->os());
 
     // Clear the InstrBuilder internal state in preparation for another round.
     IB.clear();
   }
 
+  if (PrintJson)
+    TOF->os() << formatv("{0:2}", json::Value(std::move(JSONOutput))) << "\n";
+
   TOF->keep();
   return 0;
 }