[MCA] [RegisterFile] Allow for skipping Defs with RegID of 0 rather than asserting.

[holland11]

Summary

This patch will allow developers to remove unwanted instruction Defs (most likely from within a target specific InstrPostProcess) by setting that Def's RegisterID to 0.

I tested it on a few examples and it worked as expected and had no errors.

I have commit access now, so if you (Andrea) want to hold off on committing this, I'll ask Quentin to show me how to commit it myself tomorrow (assuming you don't have any objections).

[andreadb]

LGTM.

Please go ahead and commit it.
Thanks for working on these patches!

llvm/lib/MCA/HardwareUnits/RegisterFile.cpp

 
 void RegisterFile::onInstructionExecuted(Instruction *IS) {
   assert(IS && IS->isExecuted() && "Unexpected internal state found!");
   for (WriteState &WS : IS->getDefs()) {
     if (WS.isEliminated())
       return;
 
     MCPhysReg RegID = WS.getRegisterID();
-    assert(RegID != 0 && "A write of an invalid register?");
+
+    // This allows InstrPostProcess to remove register Defs
+    // by setting their RegisterID to 0.
+    if (!RegID)
+      continue;
+
     assert(WS.getCyclesLeft() != UNKNOWN_CYCLES &&
            "The number of cycles should be known at this point!");
     assert(WS.getCyclesLeft() <= 0 && "Invalid cycles left for this write!");
 
     MCPhysReg RenameAs = RegisterMappings[RegID].second.RenameAs;
     if (RenameAs && RenameAs != RegID)
       RegID = RenameAs;
 
void RegisterFile::freePhysRegs(const RegisterRenamingInfo &Entry,
   RegisterFiles[0].NumUsedPhysRegs -= Cost;
   FreedPhysRegs[0] += Cost;
 }
 
 void RegisterFile::addRegisterWrite(WriteRef Write,
                                     MutableArrayRef<unsigned> UsedPhysRegs) {
   WriteState &WS = *Write.getWriteState();
   MCPhysReg RegID = WS.getRegisterID();
-  assert(RegID && "Adding an invalid register definition?");
+
+  // This allows InstrPostProcess to remove register Defs
+  // by setting their RegisterID to 0.
+  if (!RegID)
+    return;
 
   LLVM_DEBUG({
     dbgs() << "[PRF] addRegisterWrite [ " << Write.getSourceIndex() << ", "
            << MRI.getName(RegID) << "]\n";
   });
 
   // If RenameAs is equal to RegID, then RegID is subject to register renaming
   // and false dependencies on RegID are all eliminated.
void RegisterFile::removeRegisterWrite(
     const WriteState &WS, MutableArrayRef<unsigned> FreedPhysRegs) {
   // Early exit if this write was eliminated. A write eliminated at register
   // renaming stage generates an alias, and it is not added to the PRF.
   if (WS.isEliminated())
     return;
 
   MCPhysReg RegID = WS.getRegisterID();
 
-  assert(RegID != 0 && "Invalidating an already invalid register?");
+  // This allows InstrPostProcess to remove register Defs
+  // by setting their RegisterID to 0.
+  if (!RegID)
+    return;
+
   assert(WS.getCyclesLeft() != UNKNOWN_CYCLES &&
          "Invalidating a write of unknown cycles!");
   assert(WS.getCyclesLeft() <= 0 && "Invalid cycles left for this write!");
 
   bool ShouldFreePhysRegs = !WS.isWriteZero();
   MCPhysReg RenameAs = RegisterMappings[RegID].second.RenameAs;
   if (RenameAs && RenameAs != RegID) {
     RegID = RenameAs;