[lldb-server][MIPS] Read/Write FP registers in FR0 mode

[slthakur]

Summary

Adding support for read/write FP registers in FR0 mode of mips

[slthakur]

Fix a typo.

[clayborg]

lgtm

[tberghammer]

Looks good

source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h

public:
 
         Error
         ReadAllRegisterValues (lldb::DataBufferSP &data_sp) override;
 
         Error
         WriteAllRegisterValues (const lldb::DataBufferSP &data_sp) override;
 
         Error
+        ReadFPR() override;
+
+        Error
+        WriteFPR() override;
+
+        Error
         IsWatchpointHit (uint32_t wp_index, bool &is_hit) override;
 
         Error
         IsWatchpointVacant (uint32_t wp_index, bool &is_vacant) override;
 
         bool
         ClearHardwareWatchpoint (uint32_t wp_index) override;
 
protected:
                                       RegisterValue &value) override;
 
         NativeProcessLinux::OperationUP
         GetWriteRegisterValueOperation(uint32_t offset,
                                        const char* reg_name,
                                        const RegisterValue &value) override;
 
         bool
+        IsFR0();
+
+        bool
         IsFPR(uint32_t reg_index) const;
 
         void*
         GetGPRBuffer() override { return &m_gpr_mips64; }
 
         void*
         GetFPRBuffer() override { return &m_fpr; }
 

source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp

NativeRegisterContextLinux_mips64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
     {
         error.SetErrorStringWithFormat ("NativeRegisterContextLinux_mips64::%s WriteFPR() failed", __FUNCTION__);
         return error;
     }
 
     return error;
 }
 
+Error
+NativeRegisterContextLinux_mips64::ReadFPR()
+{
+    void* buf = GetFPRBuffer();
+    if (!buf)
+        return Error("FPR buffer is NULL");
+
+    Error error = NativeRegisterContextLinux::ReadFPR();
+
+    if (IsFR0())
+    {
+         for (int i = 0; i < 16; i++)
+         {       
+              // copy odd single from top of neighbouring even double
+              uint8_t * src = (uint8_t *)buf + 4 + (i * 16);
+              uint8_t * dst = (uint8_t *)buf + 8 + (i * 16);
+              *(uint32_t *) dst = *(uint32_t *) src;
+         }
+    }
+
+    return error;
+}
+
+Error
+NativeRegisterContextLinux_mips64::WriteFPR()
+{
+    void* buf = GetFPRBuffer();
+    if (!buf)
+        return Error("FPR buffer is NULL");
+
+    if (IsFR0())
+    {
+         for (int i = 0; i < 32; i++)
+         {
+             // copy odd single to top of neighbouring even double
+             uint8_t * src = (uint8_t *)buf + 8 + (i * 16);
+             uint8_t * dst = (uint8_t *)buf + 4 + (i * 16);
+             *(uint32_t *) dst = *(uint32_t *) src;
+         }
+    }
+
+    return NativeRegisterContextLinux::WriteFPR();
+}
+
+bool
+NativeRegisterContextLinux_mips64::IsFR0()
+{
+    const RegisterInfo *const reg_info_p = GetRegisterInfoAtIndex (36); // Status Register is at index 36 of the register array
+
+    RegisterValue reg_value;
+    ReadRegister (reg_info_p, reg_value);
+
+    uint64_t value = reg_value.GetAsUInt64();
+
+    return (!(value & 0x4000000));
+}
+
 bool
 NativeRegisterContextLinux_mips64::IsFPR(uint32_t reg_index) const
 {
     return (m_reg_info.first_fpr <= reg_index && reg_index <= m_reg_info.last_fpr);
 }
 
 Error
 NativeRegisterContextLinux_mips64::IsWatchpointHit (uint32_t wp_index, bool &is_hit)

source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp

 
 //---------------------------------------------------------------------------
 // Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure.
 //---------------------------------------------------------------------------
 #define DECLARE_REGISTER_INFOS_MIPS64_STRUCT
 #include "RegisterInfos_mips64.h"
 #undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT
 
+//---------------------------------------------------------------------------
+// Include RegisterInfos_mips to declare our g_register_infos_mips structure.
+//---------------------------------------------------------------------------
+#define DECLARE_REGISTER_INFOS_MIPS_STRUCT
+#include "RegisterInfos_mips.h"
+#undef DECLARE_REGISTER_INFOS_MIPS_STRUCT
+
 static const RegisterInfo *
 GetRegisterInfoPtr (const ArchSpec &target_arch)
 {
     switch (target_arch.GetMachine())
     {
         case llvm::Triple::mips64:
         case llvm::Triple::mips64el:
+            return g_register_infos_mips64;
         case llvm::Triple::mips:
         case llvm::Triple::mipsel:
-            return g_register_infos_mips64;
+            return g_register_infos_mips;
         default:
             assert(false && "Unhandled target architecture.");
             return nullptr;
     }
 }
 
 static uint32_t
 GetRegisterInfoCount (const ArchSpec &target_arch)
 {
     switch (target_arch.GetMachine())
     {
         case llvm::Triple::mips64:
         case llvm::Triple::mips64el:
+            return static_cast<uint32_t> (sizeof (g_register_infos_mips64) / sizeof (g_register_infos_mips64 [0]));
         case llvm::Triple::mips:
         case llvm::Triple::mipsel:
-            return static_cast<uint32_t> (sizeof (g_register_infos_mips64) / sizeof (g_register_infos_mips64 [0]));
+            return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0]));
         default:
             assert(false && "Unhandled target architecture.");
             return 0;
     }
 }
 
 RegisterContextLinux_mips64::RegisterContextLinux_mips64(const ArchSpec &target_arch) :
     lldb_private::RegisterInfoInterface(target_arch),

source/Plugins/Process/Utility/RegisterInfos_mips.h

#define FPR_OFFSET(regname)  \
      (LLVM_EXTENSION offsetof(FPR_mips, regname))
 
 // Note that the size and offset will be updated by platform-specific classes.
 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)            \
     { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint,  \
       eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL }
 
 #define DEFINE_FPR(member, reg, alt, kind1, kind2, kind3, kind4)           \
+    { #reg, alt, sizeof(((FPR_mips*)NULL)->member) / 2, FPR_OFFSET(member), eEncodingUint,   \
+      eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
+
+#define DEFINE_FPR_INFO(member, reg, alt, kind1, kind2, kind3, kind4)           \
     { #reg, alt, sizeof(((FPR_mips*)NULL)->member), FPR_OFFSET(member), eEncodingUint,   \
       eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
 
 // RegisterKind: GCC, DWARF, Generic, GDB, LLDB
 
 static RegisterInfo
 g_register_infos_mips[] =
 {
g_register_infos_mips[] =
     DEFINE_FPR (fp_reg[24],  f24,   NULL,   gcc_dwarf_f24_mips,  gcc_dwarf_f24_mips,  LLDB_INVALID_REGNUM,    gdb_f24_mips),
     DEFINE_FPR (fp_reg[25],  f25,   NULL,   gcc_dwarf_f25_mips,  gcc_dwarf_f25_mips,  LLDB_INVALID_REGNUM,    gdb_f25_mips),
     DEFINE_FPR (fp_reg[26],  f26,   NULL,   gcc_dwarf_f26_mips,  gcc_dwarf_f26_mips,  LLDB_INVALID_REGNUM,    gdb_f26_mips),
     DEFINE_FPR (fp_reg[27],  f27,   NULL,   gcc_dwarf_f27_mips,  gcc_dwarf_f27_mips,  LLDB_INVALID_REGNUM,    gdb_f27_mips),
     DEFINE_FPR (fp_reg[28],  f28,   NULL,   gcc_dwarf_f28_mips,  gcc_dwarf_f28_mips,  LLDB_INVALID_REGNUM,    gdb_f28_mips),
     DEFINE_FPR (fp_reg[29],  f29,   NULL,   gcc_dwarf_f29_mips,  gcc_dwarf_f29_mips,  LLDB_INVALID_REGNUM,    gdb_f29_mips),
     DEFINE_FPR (fp_reg[30],  f30,   NULL,   gcc_dwarf_f30_mips,  gcc_dwarf_f30_mips,  LLDB_INVALID_REGNUM,    gdb_f30_mips),
     DEFINE_FPR (fp_reg[31],  f31,   NULL,   gcc_dwarf_f31_mips,  gcc_dwarf_f31_mips,  LLDB_INVALID_REGNUM,    gdb_f31_mips),
-    DEFINE_FPR (fcsr,        fcsr,  NULL,   gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM,    gdb_fcsr_mips),
-    DEFINE_FPR (fir,         fir,   NULL,   gcc_dwarf_fir_mips,  gcc_dwarf_fir_mips,  LLDB_INVALID_REGNUM,    gdb_fir_mips)
+    DEFINE_FPR_INFO (fcsr,        fcsr,  NULL,   gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM,    gdb_fcsr_mips),
+    DEFINE_FPR_INFO (fir,         fir,   NULL,   gcc_dwarf_fir_mips,  gcc_dwarf_fir_mips,  LLDB_INVALID_REGNUM,    gdb_fir_mips)
 };
 static_assert((sizeof(g_register_infos_mips) / sizeof(g_register_infos_mips[0])) == k_num_registers_mips,
     "g_register_infos_mips has wrong number of register infos");
 
 #undef GPR_OFFSET
 #undef FPR_OFFSET
 #undef DEFINE_GPR
 #undef DEFINE_FPR
 
 #endif // DECLARE_REGISTER_INFOS_MIPS_STRUCT