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Differential D101742

[Utils] Add prof metadata to matched unnamed values
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Authored by ggeorgakoudis on May 2 2021, 11:50 PM.

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jdoerfert
Commits
rG404fa9a6cf7c: [Utils] Add prof metadata to matched unnamed values

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ggeorgakoudis created this revision.May 2 2021, 11:50 PM
Herald added a subscriber: arichardson. · View Herald TranscriptMay 2 2021, 11:50 PM
ggeorgakoudis requested review of this revision.May 2 2021, 11:50 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 2 2021, 11:50 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
ggeorgakoudis added a reviewer: jdoerfert.May 2 2021, 11:50 PM
ggeorgakoudis added a comment.May 2 2021, 11:53 PM

Does this update need a test?

Harbormaster completed remote builds in B102238: Diff 342318.May 3 2021, 12:29 AM
jdoerfert accepted this revision.May 3 2021, 6:54 AM

Adding a "prof" metadata note to an existing test and making sure it is checked for would be great. I assume you can do that.

This revision is now accepted and ready to land.May 3 2021, 6:54 AM
ggeorgakoudis updated this revision to Diff 342476.May 3 2021, 11:23 AM

Update test

Harbormaster completed remote builds in B102342: Diff 342476.May 3 2021, 1:02 PM
Closed by commit rG404fa9a6cf7c: [Utils] Add prof metadata to matched unnamed values (authored by ggeorgakoudis). · Explain WhyMay 3 2021, 3:15 PM
This revision was automatically updated to reflect the committed changes.
ggeorgakoudis added a commit: rG404fa9a6cf7c: [Utils] Add prof metadata to matched unnamed values.
jdoerfert mentioned this in D129149: [OMPIRBuilder] Add support for simdlen clause.Jul 6 2022, 12:00 PM

Revision Contents

PathSize
llvm/
test/
tools/
UpdateTestChecks/
update_test_checks/
Inputs/
3 lines
79 lines
81 lines
142 lines
utils/
UpdateTestChecks/
1 line

Diff 342566

llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll

Show All 18 Linesentry:
store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23 store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23
br label %for.cond, !dbg !21 br label %for.cond, !dbg !21
for.cond: ; preds = %for.inc, %entry for.cond: ; preds = %for.inc, %entry
%1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23 %1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23
%2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16
%3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23
%cmp = icmp slt i32 %1, %3, !dbg !29 %cmp = icmp slt i32 %1, %3, !dbg !29
br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61
for.cond.cleanup: ; preds = %for.cond for.cond.cleanup: ; preds = %for.cond
%4 = bitcast i32* %i to i8*, !dbg !31 %4 = bitcast i32* %i to i8*, !dbg !31
call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31 call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31
br label %for.end br label %for.end
for.body: ; preds = %for.cond for.body: ; preds = %for.cond
%5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16 %5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16
▲ Show 20 Lines • Show All 130 Lines • ▼ Show 20 Lines
!53 = !DILocation(line: 9, column: 3, scope: !48) !53 = !DILocation(line: 9, column: 3, scope: !48)
!54 = !DILocation(line: 10, column: 5, scope: !48) !54 = !DILocation(line: 10, column: 5, scope: !48)
!55 = !DILocation(line: 10, column: 7, scope: !48) !55 = !DILocation(line: 10, column: 7, scope: !48)
!56 = !DILocation(line: 10, column: 10, scope: !48) !56 = !DILocation(line: 10, column: 10, scope: !48)
!57 = !DILocation(line: 9, column: 27, scope: !48) !57 = !DILocation(line: 9, column: 27, scope: !48)
!58 = distinct !{!58, !52, !59} !58 = distinct !{!58, !52, !59}
!59 = !DILocation(line: 10, column: 12, scope: !43) !59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39) !60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575}

llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected

Show All 19 Lines
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]]
; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]] ; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]]
; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]]
; CHECK: for.cond.cleanup: ; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG31:![0-9]+]] ; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG31]] ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]]
; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body: ; CHECK: for.body:
; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG32:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG32]] ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG32]] ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]]
; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG32]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]]
; CHECK: for.inc: ; CHECK: for.inc:
; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG35]] ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]]
; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG35]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG31]], !llvm.loop [[LOOP36:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]]
; CHECK: for.end: ; CHECK: for.end:
; CHECK-NEXT: ret void, !dbg [[DBG38:![0-9]+]] ; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]]
; ;
entry: entry:
%A.addr = alloca i32*, align 8 %A.addr = alloca i32*, align 8
%i = alloca i32, align 4 %i = alloca i32, align 4
store i32* %A, i32** %A.addr, align 8, !tbaa !16 store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20
%0 = bitcast i32* %i to i8*, !dbg !21 %0 = bitcast i32* %i to i8*, !dbg !21
call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21 call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21
call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22 call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22
store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23 store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23
br label %for.cond, !dbg !21 br label %for.cond, !dbg !21
for.cond: ; preds = %for.inc, %entry for.cond: ; preds = %for.inc, %entry
%1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23 %1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23
%2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16
%3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23
%cmp = icmp slt i32 %1, %3, !dbg !29 %cmp = icmp slt i32 %1, %3, !dbg !29
br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61
for.cond.cleanup: ; preds = %for.cond for.cond.cleanup: ; preds = %for.cond
%4 = bitcast i32* %i to i8*, !dbg !31 %4 = bitcast i32* %i to i8*, !dbg !31
call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31 call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31
br label %for.end br label %for.end
for.body: ; preds = %for.cond for.body: ; preds = %for.cond
%5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16 %5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16
Show All 24 Lines
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define dso_local void @bar(i32* %A) #0 !dbg !39 { define dso_local void @bar(i32* %A) #0 !dbg !39 {
; CHECK-LABEL: @bar( ; CHECK-LABEL: @bar(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 ; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]] ; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]]
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META41:![0-9]+]], metadata !DIExpression()), !dbg [[DBG44:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]]
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG45:![0-9]+]] ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG45]] ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]]
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]]
; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG46]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG45]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG47:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG51:![0-9]+]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG52:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]]
; CHECK: for.cond.cleanup: ; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG53:![0-9]+]] ; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG53]] ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]]
; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body: ; CHECK: for.body:
; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG54:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG54]] ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG54]] ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]]
; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG54]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]]
; CHECK: for.inc: ; CHECK: for.inc:
; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG57]] ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]]
; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG57]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG53]], !llvm.loop [[LOOP58:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]]
; CHECK: for.end: ; CHECK: for.end:
; CHECK-NEXT: ret void, !dbg [[DBG60:![0-9]+]] ; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]]
; ;
entry: entry:
%A.addr = alloca i32*, align 8 %A.addr = alloca i32*, align 8
%i = alloca i32, align 4 %i = alloca i32, align 4
store i32* %A, i32** %A.addr, align 8, !tbaa !16 store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44
%0 = bitcast i32* %i to i8*, !dbg !45 %0 = bitcast i32* %i to i8*, !dbg !45
call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45 call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45
▲ Show 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
!53 = !DILocation(line: 9, column: 3, scope: !48) !53 = !DILocation(line: 9, column: 3, scope: !48)
!54 = !DILocation(line: 10, column: 5, scope: !48) !54 = !DILocation(line: 10, column: 5, scope: !48)
!55 = !DILocation(line: 10, column: 7, scope: !48) !55 = !DILocation(line: 10, column: 7, scope: !48)
!56 = !DILocation(line: 10, column: 10, scope: !48) !56 = !DILocation(line: 10, column: 10, scope: !48)
!57 = !DILocation(line: 9, column: 27, scope: !48) !57 = !DILocation(line: 9, column: 27, scope: !48)
!58 = distinct !{!58, !52, !59} !58 = distinct !{!58, !52, !59}
!59 = !DILocation(line: 10, column: 12, scope: !43) !59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39) !60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575}

llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected

Show All 20 Lines
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]]
; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]] ; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]]
; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]]
; CHECK: for.cond.cleanup: ; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG31:![0-9]+]] ; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG31]] ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]]
; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body: ; CHECK: for.body:
; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG32:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG32]] ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG32]] ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]]
; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG32]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]]
; CHECK: for.inc: ; CHECK: for.inc:
; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG35]] ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]]
; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG35]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG31]], !llvm.loop [[LOOP36:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]]
; CHECK: for.end: ; CHECK: for.end:
; CHECK-NEXT: ret void, !dbg [[DBG38:![0-9]+]] ; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]]
; ;
entry: entry:
%A.addr = alloca i32*, align 8 %A.addr = alloca i32*, align 8
%i = alloca i32, align 4 %i = alloca i32, align 4
store i32* %A, i32** %A.addr, align 8, !tbaa !16 store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20
%0 = bitcast i32* %i to i8*, !dbg !21 %0 = bitcast i32* %i to i8*, !dbg !21
call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21 call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21
call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22 call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22
store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23 store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23
br label %for.cond, !dbg !21 br label %for.cond, !dbg !21
for.cond: ; preds = %for.inc, %entry for.cond: ; preds = %for.inc, %entry
%1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23 %1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23
%2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16
%3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23
%cmp = icmp slt i32 %1, %3, !dbg !29 %cmp = icmp slt i32 %1, %3, !dbg !29
br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61
for.cond.cleanup: ; preds = %for.cond for.cond.cleanup: ; preds = %for.cond
%4 = bitcast i32* %i to i8*, !dbg !31 %4 = bitcast i32* %i to i8*, !dbg !31
call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31 call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31
br label %for.end br label %for.end
for.body: ; preds = %for.cond for.body: ; preds = %for.cond
%5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16 %5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16
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declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2 declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2
; Function Attrs: argmemonly nounwind willreturn ; Function Attrs: argmemonly nounwind willreturn
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2 declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define dso_local void @bar(i32* %A) #0 !dbg !39 { define dso_local void @bar(i32* %A) #0 !dbg !39 {
; CHECK-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG39:![0-9]+]] { ; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG40:![0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 ; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]] ; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]]
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META41:![0-9]+]], metadata !DIExpression()), !dbg [[DBG44:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]]
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG45:![0-9]+]] ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG45]] ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]]
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]]
; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG46]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG45]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG47:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG51:![0-9]+]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG52:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]]
; CHECK: for.cond.cleanup: ; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG53:![0-9]+]] ; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG53]] ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]]
; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body: ; CHECK: for.body:
; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG54:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG54]] ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG54]] ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]]
; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG54]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]]
; CHECK: for.inc: ; CHECK: for.inc:
; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG57]] ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]]
; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG57]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG53]], !llvm.loop [[LOOP58:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]]
; CHECK: for.end: ; CHECK: for.end:
; CHECK-NEXT: ret void, !dbg [[DBG60:![0-9]+]] ; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]]
; ;
entry: entry:
%A.addr = alloca i32*, align 8 %A.addr = alloca i32*, align 8
%i = alloca i32, align 4 %i = alloca i32, align 4
store i32* %A, i32** %A.addr, align 8, !tbaa !16 store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44
%0 = bitcast i32* %i to i8*, !dbg !45 %0 = bitcast i32* %i to i8*, !dbg !45
call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45 call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45
▲ Show 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
!53 = !DILocation(line: 9, column: 3, scope: !48) !53 = !DILocation(line: 9, column: 3, scope: !48)
!54 = !DILocation(line: 10, column: 5, scope: !48) !54 = !DILocation(line: 10, column: 5, scope: !48)
!55 = !DILocation(line: 10, column: 7, scope: !48) !55 = !DILocation(line: 10, column: 7, scope: !48)
!56 = !DILocation(line: 10, column: 10, scope: !48) !56 = !DILocation(line: 10, column: 10, scope: !48)
!57 = !DILocation(line: 9, column: 27, scope: !48) !57 = !DILocation(line: 9, column: 27, scope: !48)
!58 = distinct !{!58, !52, !59} !58 = distinct !{!58, !52, !59}
!59 = !DILocation(line: 10, column: 12, scope: !43) !59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39) !60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575}

llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected

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; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]]
; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]] ; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]]
; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]]
; CHECK: for.cond.cleanup: ; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG31:![0-9]+]] ; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG31]] ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]]
; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body: ; CHECK: for.body:
; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG32:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG32]] ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG32]] ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]]
; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG32]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]]
; CHECK: for.inc: ; CHECK: for.inc:
; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG35]] ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]]
; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG35]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG31]], !llvm.loop [[LOOP36:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]]
; CHECK: for.end: ; CHECK: for.end:
; CHECK-NEXT: ret void, !dbg [[DBG38:![0-9]+]] ; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]]
; ;
entry: entry:
%A.addr = alloca i32*, align 8 %A.addr = alloca i32*, align 8
%i = alloca i32, align 4 %i = alloca i32, align 4
store i32* %A, i32** %A.addr, align 8, !tbaa !16 store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20 call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20
%0 = bitcast i32* %i to i8*, !dbg !21 %0 = bitcast i32* %i to i8*, !dbg !21
call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21 call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !21
call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22 call void @llvm.dbg.declare(metadata i32* %i, metadata !14, metadata !DIExpression()), !dbg !22
store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23 store i32 0, i32* %i, align 4, !dbg !22, !tbaa !23
br label %for.cond, !dbg !21 br label %for.cond, !dbg !21
for.cond: ; preds = %for.inc, %entry for.cond: ; preds = %for.inc, %entry
%1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23 %1 = load i32, i32* %i, align 4, !dbg !25, !tbaa !23
%2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16 %2 = load i32*, i32** %A.addr, align 8, !dbg !27, !tbaa !16
%3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23 %3 = load i32, i32* %2, align 4, !dbg !28, !tbaa !23
%cmp = icmp slt i32 %1, %3, !dbg !29 %cmp = icmp slt i32 %1, %3, !dbg !29
br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30 br i1 %cmp, label %for.body, label %for.cond.cleanup, !dbg !30, !prof !61
for.cond.cleanup: ; preds = %for.cond for.cond.cleanup: ; preds = %for.cond
%4 = bitcast i32* %i to i8*, !dbg !31 %4 = bitcast i32* %i to i8*, !dbg !31
call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31 call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #3, !dbg !31
br label %for.end br label %for.end
for.body: ; preds = %for.cond for.body: ; preds = %for.cond
%5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16 %5 = load i32*, i32** %A.addr, align 8, !dbg !32, !tbaa !16
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declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2 declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2
; Function Attrs: argmemonly nounwind willreturn ; Function Attrs: argmemonly nounwind willreturn
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2 declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define dso_local void @bar(i32* %A) #0 !dbg !39 { define dso_local void @bar(i32* %A) #0 !dbg !39 {
; CHECK-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG39:![0-9]+]] { ; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG40:![0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 ; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]] ; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]]
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META41:![0-9]+]], metadata !DIExpression()), !dbg [[DBG44:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]]
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG45:![0-9]+]] ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG45]] ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]]
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]] ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]]
; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG46]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG45]] ; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG47:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG51:![0-9]+]] ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG52:![0-9]+]] ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]]
; CHECK: for.cond.cleanup: ; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG53:![0-9]+]] ; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]]
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG53]] ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]]
; CHECK-NEXT: br label [[FOR_END:%.*]] ; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body: ; CHECK: for.body:
; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG54:![0-9]+]], !tbaa [[TBAA16]] ; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]]
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG54]] ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG54]] ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]]
; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG54]] ; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]]
; CHECK: for.inc: ; CHECK: for.inc:
; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]] ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]]
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG57]] ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]]
; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG57]], !tbaa [[TBAA23]] ; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]]
; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG53]], !llvm.loop [[LOOP58:![0-9]+]] ; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]]
; CHECK: for.end: ; CHECK: for.end:
; CHECK-NEXT: ret void, !dbg [[DBG60:![0-9]+]] ; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]]
; ;
entry: entry:
%A.addr = alloca i32*, align 8 %A.addr = alloca i32*, align 8
%i = alloca i32, align 4 %i = alloca i32, align 4
store i32* %A, i32** %A.addr, align 8, !tbaa !16 store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44 call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !41, metadata !DIExpression()), !dbg !44
%0 = bitcast i32* %i to i8*, !dbg !45 %0 = bitcast i32* %i to i8*, !dbg !45
call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45 call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #3, !dbg !45
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!53 = !DILocation(line: 9, column: 3, scope: !48) !53 = !DILocation(line: 9, column: 3, scope: !48)
!54 = !DILocation(line: 10, column: 5, scope: !48) !54 = !DILocation(line: 10, column: 5, scope: !48)
!55 = !DILocation(line: 10, column: 7, scope: !48) !55 = !DILocation(line: 10, column: 7, scope: !48)
!56 = !DILocation(line: 10, column: 10, scope: !48) !56 = !DILocation(line: 10, column: 10, scope: !48)
!57 = !DILocation(line: 9, column: 27, scope: !48) !57 = !DILocation(line: 9, column: 27, scope: !48)
!58 = distinct !{!58, !52, !59} !58 = distinct !{!58, !52, !59}
!59 = !DILocation(line: 10, column: 12, scope: !43) !59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39) !60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575}
;. ;.
; CHECK: attributes #[[ATTR0]] = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } ; CHECK: attributes #[[ATTR0]] = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; CHECK: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; CHECK: attributes #[[ATTR3]] = { nounwind } ; CHECK: attributes #[[ATTR3]] = { nounwind }
;. ;.
; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 11.0.0 (git@github.com:llvm/llvm-project.git 1d5da8cd30fce1c0a2c2fa6ba656dbfaa36192c8)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None) ; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 11.0.0 (git@github.com:llvm/llvm-project.git 1d5da8cd30fce1c0a2c2fa6ba656dbfaa36192c8)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "various_ir_values.c", directory: "/data/build/llvm-project") ; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "various_ir_values.c", directory: "/data/build/llvm-project")
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; CHECK: [[TBAA23]] = !{!24, !24, i64 0} ; CHECK: [[TBAA23]] = !{!24, !24, i64 0}
; CHECK: [[META24:![0-9]+]] = !{!"int", !18, i64 0} ; CHECK: [[META24:![0-9]+]] = !{!"int", !18, i64 0}
; CHECK: [[DBG25]] = !DILocation(line: 3, column: 19, scope: !26) ; CHECK: [[DBG25]] = !DILocation(line: 3, column: 19, scope: !26)
; CHECK: [[META26:![0-9]+]] = distinct !DILexicalBlock(scope: !15, file: !1, line: 3, column: 3) ; CHECK: [[META26:![0-9]+]] = distinct !DILexicalBlock(scope: !15, file: !1, line: 3, column: 3)
; CHECK: [[DBG27]] = !DILocation(line: 3, column: 24, scope: !26) ; CHECK: [[DBG27]] = !DILocation(line: 3, column: 24, scope: !26)
; CHECK: [[DBG28]] = !DILocation(line: 3, column: 23, scope: !26) ; CHECK: [[DBG28]] = !DILocation(line: 3, column: 23, scope: !26)
; CHECK: [[DBG29]] = !DILocation(line: 3, column: 21, scope: !26) ; CHECK: [[DBG29]] = !DILocation(line: 3, column: 21, scope: !26)
; CHECK: [[DBG30]] = !DILocation(line: 3, column: 3, scope: !15) ; CHECK: [[DBG30]] = !DILocation(line: 3, column: 3, scope: !15)
; CHECK: [[DBG31]] = !DILocation(line: 3, column: 3, scope: !26) ; CHECK: [[PROF31]] = !{!"branch_weights", i32 1, i32 1048575}
; CHECK: [[DBG32]] = !DILocation(line: 4, column: 5, scope: !26) ; CHECK: [[DBG32]] = !DILocation(line: 3, column: 3, scope: !26)
; CHECK: [[DBG33]] = !DILocation(line: 4, column: 7, scope: !26) ; CHECK: [[DBG33]] = !DILocation(line: 4, column: 5, scope: !26)
; CHECK: [[DBG34]] = !DILocation(line: 4, column: 10, scope: !26) ; CHECK: [[DBG34]] = !DILocation(line: 4, column: 7, scope: !26)
; CHECK: [[DBG35]] = !DILocation(line: 3, column: 27, scope: !26) ; CHECK: [[DBG35]] = !DILocation(line: 4, column: 10, scope: !26)
; CHECK: [[LOOP36]] = distinct !{!36, !30, !37} ; CHECK: [[DBG36]] = !DILocation(line: 3, column: 27, scope: !26)
; CHECK: [[META37:![0-9]+]] = !DILocation(line: 4, column: 12, scope: !15) ; CHECK: [[LOOP37]] = distinct !{!37, !30, !38}
; CHECK: [[DBG38]] = !DILocation(line: 5, column: 1, scope: !7) ; CHECK: [[META38:![0-9]+]] = !DILocation(line: 4, column: 12, scope: !15)
; CHECK: [[DBG39]] = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 7, type: !8, scopeLine: 7, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !40) ; CHECK: [[DBG39]] = !DILocation(line: 5, column: 1, scope: !7)
; CHECK: [[META40:![0-9]+]] = !{!41, !42} ; CHECK: [[DBG40]] = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 7, type: !8, scopeLine: 7, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !41)
; CHECK: [[META41]] = !DILocalVariable(name: "A", arg: 1, scope: !39, file: !1, line: 7, type: !10) ; CHECK: [[META41:![0-9]+]] = !{!42, !43}
; CHECK: [[META42]] = !DILocalVariable(name: "i", scope: !43, file: !1, line: 9, type: !11) ; CHECK: [[META42]] = !DILocalVariable(name: "A", arg: 1, scope: !40, file: !1, line: 7, type: !10)
; CHECK: [[META43:![0-9]+]] = distinct !DILexicalBlock(scope: !39, file: !1, line: 9, column: 3) ; CHECK: [[META43]] = !DILocalVariable(name: "i", scope: !44, file: !1, line: 9, type: !11)
; CHECK: [[DBG44]] = !DILocation(line: 7, column: 15, scope: !39) ; CHECK: [[META44:![0-9]+]] = distinct !DILexicalBlock(scope: !40, file: !1, line: 9, column: 3)
; CHECK: [[DBG45]] = !DILocation(line: 9, column: 8, scope: !43) ; CHECK: [[DBG45]] = !DILocation(line: 7, column: 15, scope: !40)
; CHECK: [[DBG46]] = !DILocation(line: 9, column: 12, scope: !43) ; CHECK: [[DBG46]] = !DILocation(line: 9, column: 8, scope: !44)
; CHECK: [[DBG47]] = !DILocation(line: 9, column: 19, scope: !48) ; CHECK: [[DBG47]] = !DILocation(line: 9, column: 12, scope: !44)
; CHECK: [[META48:![0-9]+]] = distinct !DILexicalBlock(scope: !43, file: !1, line: 9, column: 3) ; CHECK: [[DBG48]] = !DILocation(line: 9, column: 19, scope: !49)
; CHECK: [[DBG49]] = !DILocation(line: 9, column: 24, scope: !48) ; CHECK: [[META49:![0-9]+]] = distinct !DILexicalBlock(scope: !44, file: !1, line: 9, column: 3)
; CHECK: [[DBG50]] = !DILocation(line: 9, column: 23, scope: !48) ; CHECK: [[DBG50]] = !DILocation(line: 9, column: 24, scope: !49)
; CHECK: [[DBG51]] = !DILocation(line: 9, column: 21, scope: !48) ; CHECK: [[DBG51]] = !DILocation(line: 9, column: 23, scope: !49)
; CHECK: [[DBG52]] = !DILocation(line: 9, column: 3, scope: !43) ; CHECK: [[DBG52]] = !DILocation(line: 9, column: 21, scope: !49)
; CHECK: [[DBG53]] = !DILocation(line: 9, column: 3, scope: !48) ; CHECK: [[DBG53]] = !DILocation(line: 9, column: 3, scope: !44)
; CHECK: [[DBG54]] = !DILocation(line: 10, column: 5, scope: !48) ; CHECK: [[DBG54]] = !DILocation(line: 9, column: 3, scope: !49)
; CHECK: [[DBG55]] = !DILocation(line: 10, column: 7, scope: !48) ; CHECK: [[DBG55]] = !DILocation(line: 10, column: 5, scope: !49)
; CHECK: [[DBG56]] = !DILocation(line: 10, column: 10, scope: !48) ; CHECK: [[DBG56]] = !DILocation(line: 10, column: 7, scope: !49)
; CHECK: [[DBG57]] = !DILocation(line: 9, column: 27, scope: !48) ; CHECK: [[DBG57]] = !DILocation(line: 10, column: 10, scope: !49)
; CHECK: [[LOOP58]] = distinct !{!58, !52, !59} ; CHECK: [[DBG58]] = !DILocation(line: 9, column: 27, scope: !49)
; CHECK: [[META59:![0-9]+]] = !DILocation(line: 10, column: 12, scope: !43) ; CHECK: [[LOOP59]] = distinct !{!59, !53, !60}
; CHECK: [[DBG60]] = !DILocation(line: 11, column: 1, scope: !39) ; CHECK: [[META60:![0-9]+]] = !DILocation(line: 10, column: 12, scope: !44)
; CHECK: [[DBG61]] = !DILocation(line: 11, column: 1, scope: !40)
;. ;.

llvm/utils/UpdateTestChecks/common.py

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# (local) ssa values, (debug) metadata, etc. # (local) ssa values, (debug) metadata, etc.
nameless_values = [ nameless_values = [
NamelessValue(r'TMP' , '%' , r'%' , None , None , r'[\w$.-]+?' , None , False) , NamelessValue(r'TMP' , '%' , r'%' , None , None , r'[\w$.-]+?' , None , False) ,
NamelessValue(r'ATTR' , '#' , r'#' , None , None , r'[0-9]+' , None , False) , NamelessValue(r'ATTR' , '#' , r'#' , None , None , r'[0-9]+' , None , False) ,
NamelessValue(r'ATTR' , '#' , None , r'attributes #' , r'[0-9]+' , None , r'{[^}]*}' , False) , NamelessValue(r'ATTR' , '#' , None , r'attributes #' , r'[0-9]+' , None , r'{[^}]*}' , False) ,
NamelessValue(r'GLOB' , '@' , r'@' , None , None , r'[0-9]+' , None , False) , NamelessValue(r'GLOB' , '@' , r'@' , None , None , r'[0-9]+' , None , False) ,
NamelessValue(r'GLOB' , '@' , None , r'@' , r'[a-zA-Z0-9_$"\\.-]+' , None , r'.+' , True) , NamelessValue(r'GLOB' , '@' , None , r'@' , r'[a-zA-Z0-9_$"\\.-]+' , None , r'.+' , True) ,
NamelessValue(r'DBG' , '!' , r'!dbg ' , None , None , r'![0-9]+' , None , False) , NamelessValue(r'DBG' , '!' , r'!dbg ' , None , None , r'![0-9]+' , None , False) ,
NamelessValue(r'PROF' , '!' , r'!prof ' , None , None , r'![0-9]+' , None , False) ,
NamelessValue(r'TBAA' , '!' , r'!tbaa ' , None , None , r'![0-9]+' , None , False) , NamelessValue(r'TBAA' , '!' , r'!tbaa ' , None , None , r'![0-9]+' , None , False) ,
NamelessValue(r'RNG' , '!' , r'!range ' , None , None , r'![0-9]+' , None , False) , NamelessValue(r'RNG' , '!' , r'!range ' , None , None , r'![0-9]+' , None , False) ,
NamelessValue(r'LOOP' , '!' , r'!llvm.loop ' , None , None , r'![0-9]+' , None , False) , NamelessValue(r'LOOP' , '!' , r'!llvm.loop ' , None , None , r'![0-9]+' , None , False) ,
NamelessValue(r'META' , '!' , r'metadata ' , None , None , r'![0-9]+' , None , False) , NamelessValue(r'META' , '!' , r'metadata ' , None , None , r'![0-9]+' , None , False) ,
NamelessValue(r'META' , '!' , None , r'' , r'![0-9]+' , None , r'(?:distinct |)!.*' , False) , NamelessValue(r'META' , '!' , None , r'' , r'![0-9]+' , None , r'(?:distinct |)!.*' , False) ,
] ]
def createOrRegexp(old, new): def createOrRegexp(old, new):
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