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Thanks, @sushmaunnibhavi for the patch!
I think the examples you add are for https://llvm.org/docs/GlobalISel/GenericOpcode.html#vector-specific-operations.
For scalar one you should look at /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir and /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir.
@sushmaunnibhavi, I can't apply your updated patch. I think you should first rebase your branch with LLVM upstream main.
There is a recent tutorial (https://reviews.llvm.org/D100714) on the contribution that also talks about arc uses.
Or if you are updating diff from Phabticator GUI, make sure you follow the steps mentions here -https://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface.
But I think using arc (command line) is a better way.
With the nit fixed, this should be good to go. Thanks!
llvm/docs/GlobalISel/GenericOpcode.rst | ||
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199 | Add the type for %0 as well to make it clear that this is the same type as the result. |
A line break is needed between these two lines