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Differential D100933

[clang] Recognize ppc32 as valid mcpu value
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Authored by LemonBoy on Apr 21 2021, 1:13 AM.

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nemanjai
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Restricted Project
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rG8e336511f18a: [clang] Recognize ppc32 as valid mcpu value
Summary

The ppc32 cpu model was introduced a while ago in a9321059b912155cd81cf0776d54a7d6838ef7ab as an independent copy of the ppc one but was never wired into clang.

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Event Timeline

LemonBoy created this revision.Apr 21 2021, 1:13 AM
Herald added subscribers: shchenz, kbarton, nemanjai. · View Herald TranscriptApr 21 2021, 1:13 AM
LemonBoy requested review of this revision.Apr 21 2021, 1:13 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 21 2021, 1:13 AM
Herald added a subscriber: cfe-commits. · View Herald Transcript
Harbormaster completed remote builds in B99911: Diff 339132.Apr 21 2021, 2:12 AM
nemanjai accepted this revision.Apr 21 2021, 4:45 AM

LGTM.

This revision is now accepted and ready to land.Apr 21 2021, 4:45 AM
Closed by commit rG8e336511f18a: [clang] Recognize ppc32 as valid mcpu value (authored by LemonBoy). · Explain WhyApr 21 2021, 6:11 AM
This revision was automatically updated to reflect the committed changes.
LemonBoy added a commit: rG8e336511f18a: [clang] Recognize ppc32 as valid mcpu value.

Revision Contents

PathSize
clang/
lib/
Basic/
Targets/
22 lines
test/
Misc/
4 lines

Diff 339201

clang/lib/Basic/Targets/PPC.cpp

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ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const { ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
if (ABI == "elfv2") if (ABI == "elfv2")
return llvm::makeArrayRef(GCCAddlRegNames); return llvm::makeArrayRef(GCCAddlRegNames);
else else
return TargetInfo::getGCCAddlRegNames(); return TargetInfo::getGCCAddlRegNames();
} }
static constexpr llvm::StringLiteral ValidCPUNames[] = { static constexpr llvm::StringLiteral ValidCPUNames[] = {
{"generic"}, {"440"}, {"450"}, {"601"}, {"602"}, {"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"}, {"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"}, {"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
{"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"}, {"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"},
{"g5"}, {"a2"}, {"e500"}, {"e500mc"}, {"e5500"}, {"g5"}, {"a2"}, {"e500"}, {"e500mc"}, {"e5500"},
{"power3"}, {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"}, {"power3"}, {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"},
{"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"}, {"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"},
{"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"}, {"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"},
{"pwr8"}, {"power9"}, {"pwr9"}, {"power10"}, {"pwr10"}, {"pwr8"}, {"power9"}, {"pwr9"}, {"power10"}, {"pwr10"},
{"powerpc"}, {"ppc"}, {"powerpc64"}, {"ppc64"}, {"powerpc64le"}, {"powerpc"}, {"ppc"}, {"ppc32"}, {"powerpc64"}, {"ppc64"},
{"ppc64le"}, {"future"}}; {"powerpc64le"}, {"ppc64le"}, {"future"}};
bool PPCTargetInfo::isValidCPUName(StringRef Name) const { bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames); return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);
} }
void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const { void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames)); Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
} }
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clang/test/Misc/target-invalid-cpu-note.c

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// SPARCV9: note: valid target CPU values are: v9, ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4 // SPARCV9: note: valid target CPU values are: v9, ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4
// RUN: not %clang_cc1 -triple powerpc--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix PPC // RUN: not %clang_cc1 -triple powerpc--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix PPC
// PPC: error: unknown target CPU 'not-a-cpu' // PPC: error: unknown target CPU 'not-a-cpu'
// PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603, // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
// PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750, // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
// PPC-SAME: 8548, 970, g5, a2, e500, e500mc, e5500, power3, pwr3, power4, // PPC-SAME: 8548, 970, g5, a2, e500, e500mc, e5500, power3, pwr3, power4,
// PPC-SAME: pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, // PPC-SAME: pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x,
// PPC-SAME: power7, pwr7, power8, pwr8, power9, pwr9, power10, pwr10, powerpc, ppc, powerpc64, // PPC-SAME: power7, pwr7, power8, pwr8, power9, pwr9, power10, pwr10, powerpc, ppc, ppc32,
// PPC-SAME: ppc64, powerpc64le, ppc64le, future // PPC-SAME: powerpc64, ppc64, powerpc64le, ppc64le, future
// RUN: not %clang_cc1 -triple mips--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix MIPS // RUN: not %clang_cc1 -triple mips--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix MIPS
// MIPS: error: unknown target CPU 'not-a-cpu' // MIPS: error: unknown target CPU 'not-a-cpu'
// MIPS: note: valid target CPU values are: mips1, mips2, mips3, mips4, mips5, // MIPS: note: valid target CPU values are: mips1, mips2, mips3, mips4, mips5,
// MIPS-SAME: mips32, mips32r2, mips32r3, mips32r5, mips32r6, mips64, mips64r2, // MIPS-SAME: mips32, mips32r2, mips32r3, mips32r5, mips32r6, mips64, mips64r2,
// MIPS-SAME: mips64r3, mips64r5, mips64r6, octeon, octeon+, p5600 // MIPS-SAME: mips64r3, mips64r5, mips64r6, octeon, octeon+, p5600
// RUN: not %clang_cc1 -triple lanai--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix LANAI // RUN: not %clang_cc1 -triple lanai--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix LANAI
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