There is an in-progress proposal for the following pseudo-instructions
in the assembler, to complement the existing sext.w rv64i instruction:
The .b and .h variants are available with rv32i and rv64i, and zext.w is
only available with rv64i.
These are implemented primarily as pseudo-instructions, as these instructions
expand to multiple real instructions. In the case of zext.b, this expands to a
single rv32/64i instruction, so it is implemented with an InstAlias (like
sext.w is on rv64i).
The proposal is available here: https://github.com/riscv/riscv-asm-manual/pull/61