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[DAGCombiner] Use known bits to fold extract_vector_elt with const index
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Authored by foad on Fri, Sep 11, 2:44 AM.

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foad created this revision.Fri, Sep 11, 2:44 AM
Herald added a project: Restricted Project. · View Herald TranscriptFri, Sep 11, 2:44 AM
foad requested review of this revision.Fri, Sep 11, 2:44 AM
foad added a comment.Fri, Sep 11, 2:48 AM

This isn't ready to commit yet:

  1. there are a few code quality regressions in the test cases
  2. it provokes a crash on test/CodeGen/AMDGPU/global-extload-i16.ll which I haven't been able to fix yet
foad added a comment.Fri, Sep 11, 6:03 AM
  1. it provokes a crash on test/CodeGen/AMDGPU/global-extload-i16.ll which I haven't been able to fix yet

https://bugs.llvm.org/show_bug.cgi?id=47492

foad updated this revision to Diff 292428.Thu, Sep 17, 2:11 AM

Rebase.

This isn't ready to commit yet:

  1. there are a few code quality regressions in the test cases
  2. it provokes a crash on test/CodeGen/AMDGPU/global-extload-i16.ll which I haven't been able to fix yet

Update:

  1. See inline comments on the regressions.
  2. The crash is fixed. See D87757.
llvm/test/CodeGen/Mips/cconv/vector.ll
4206–4248

There are some regressions in this file but also some improvements. I haven't worked out what's going on yet.

llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll
218–232

Regression here and in other cases that are now using muls instead of umull/umlal.

llvm/test/CodeGen/X86/vector-fshl-128.ll
188–190

Regression. Quite a few tests are now using pxor+punpckhdq instead of pshufd. I wonder if some kind of combine could spot this case and turn it back into pshufd.

llvm/test/CodeGen/X86/vector-trunc-math.ll
2712

Regression. Perhaps we need better known bits analysis.

foad added inline comments.Fri, Sep 18, 9:05 AM
llvm/test/CodeGen/X86/vector-trunc-math.ll
2712

D87912 is my attempt at fixing this.

@foad please can you rebase?

foad updated this revision to Diff 294545.Sun, Sep 27, 3:36 AM

Rebase after D88225.