This patch adds an implementation of PerformVSELECTCombine in the ARM DAG Combiner that transforms vselect(not(cond), lhs, rhs) into vselect(cond, rhs, lhs).
- Isn't this supposed to be done in the (Target-Independent) DAGCombiner instead?
- Yes, and I tried to do it with D77201, which caused issues with the X86 (AVX512) target (= it broke unit tests, which I unfortunately only noticed when it was upstream and I had to revert the change). The DAGCombiner doesn't optimize this for our cases as it doesn't allow truncation of the operands, so we have to do it here.
- Why do it for MVE Integer Ops only?
- It's the only target that was changed by this patch. I get the same result (tests all pass) by removing the if around the setTargetDAGCombine, so let's be cautious and just enable it for this scenario at first.
- I believe all others cases are already handled by the DAGCombiner, it's just this case that needs special handling.