[x86][seses] No lfences in bb w/ 1 load and 0 stores

[zbrid]

Summary

Add a flag to the x86 Speculative Execution Side Effect Suppression Pass
that allows users to turn off adding LFENCEs in basic blocks with a
single load and no stores.

This is a part of a set of flags that can be used to experiment with
optimizing this mitigation for Load Value Injection.

One pager on Load Value Injection:
https://software.intel.com/security-software-guidance/software-guidance/load-value-injection

Deep dive on Load Value Injection:
https://software.intel.com/security-software-guidance/insights/deep-dive-load-value-injection

Results of performance testing

I ran the BoringSSL benchmarks which run many cryptographic operations
and reports the number of operations per second completed in a given
time.

Modified Mitigation vs Baseline
Geometric mean
0.073 (This can be read as the geomean ops/s of the mitigated program
was 7.3% of the ops/s of the unmitigated program. Similar below.)
Minimum
0.041
Quartile 1
0.060
Median
0.064
Quartile 3
0.081
Maximum
0.232

Fully Mitigated vs Baseline
Geometric mean
0.071
Minimum
0.041
Quartile 1
0.060
Median
0.063
Quartile 3
0.077
Maximum
0.230

[george.burgess.iv]

Thanks!

Please wait for a stamp from another reviewer here, too.

llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp

59

nit: 80cols please

100–101

nit: please remove this blank line

104

clang-format this patch please (the & should be near the MI)

llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression-omit-lfence-in-bb-with-one-load-no-stores.ll

26

same "please consider using -NEXT if you want to match adjacent lines" comment as D75941

[zbrid]

• Update tests to use CHECK-NEXT
• ClangFormat/nits

[zbrid]

Updated based on comments. Sorry about all the nits/unClangFormatted stuff. I'll do better with that next time. Thanks for the review!

[xbolva00]

llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression-omit-lfence-in-bb-with-one-load-no-stores.ll

26

Or use update_llc_checks.py regenerate test checks

llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp

OmitBranchLFENCEs("x86-seses-omit-branch-lfences",
                       cl::desc("Omit all lfences before branch instructions."),
                       cl::init(false), cl::Hidden);
 
 static cl::opt<bool>
     OmitLFENCEInBasicBlocksWithoutLoads("x86-seses-omit-lfence-in-bb-without-loads",
                       cl::desc("Omit LFENCE in basic blocks without any loads even if there are stores."),
                       cl::init(false), cl::Hidden);
 
+static cl::opt<bool> OmitLFENCEInBasicBlocksWithOneLoadAndNoStores(
+    "x86-seses-omit-lfence-in-bb-with-one-load-no-stores",
+    cl::desc("Don't LFENCE in basic blocks with one load and no stores."),
+    cl::init(false), cl::Hidden);
+
 static bool hasConstantAddressingMode(const MachineInstr &MI);
 
 namespace {
 
 class X86SpeculativeExecutionSideEffectSuppressionPass
     : public MachineFunctionPass {
 public:
   X86SpeculativeExecutionSideEffectSuppressionPass() : MachineFunctionPass(ID) {}
if (!EnableSpeculativeExecutionSideEffectSuppression)
     return false;
 
   LLVM_DEBUG(dbgs() << "********** " << getPassName() << " : " << MF.getName()
                     << " **********\n");
   bool Modified = false;
   const X86Subtarget &Subtarget = MF.getSubtarget<X86Subtarget>();
   const X86InstrInfo *TII = Subtarget.getInstrInfo();
   for (MachineBasicBlock &MBB : MF) {
-    if (OmitLFENCEInBasicBlocksWithoutLoads) {
+    // Let's do a pass over the basic block to see if we can skip LFENCEing it
+    // based on the number of loads and stores.
+    if (OmitLFENCEInBasicBlocksWithoutLoads ||
+        OmitLFENCEInBasicBlocksWithOneLoadAndNoStores) {
+      int LoadCount = 0;
+      int StoreCount = 0;
 
-      bool FoundLoad = false;
       for (const MachineInstr &MI : MBB) {
         if (MI.mayLoad()) {
-          FoundLoad = true;
-          break;
+          LoadCount++;
+        }
+        if (MI.mayStore()) {
+          StoreCount++;
         }
       }
-      if (!FoundLoad) {
+
+      if (OmitLFENCEInBasicBlocksWithoutLoads && LoadCount == 0) {
+        continue;
+      }
+
+      if (OmitLFENCEInBasicBlocksWithOneLoadAndNoStores && StoreCount == 0 &&
+          LoadCount <= 1) {
         continue;
       }
     }
 
     MachineInstr *FirstTerminator = nullptr;
 
     for (auto &MI : MBB) {
       // We want to put an LFENCE before any instruction that

llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression-omit-lfence-in-bb-with-one-load-no-stores.ll

+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable -x86-seses-omit-lfence-in-bb-with-one-load-no-stores %s -o - | FileCheck %s --check-prefix=CHECK-FLAGGED
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable %s -o - | FileCheck %s --check-prefix=CHECK-FULL
+
+define dso_local void @_Z3fooPi(i32* %p) #0 {
+entry:
+  %p.addr = alloca i32*, align 8
+  %a = alloca i32, align 4
+  store i32* %p, i32** %p.addr, align 8
+  %0 = load i32*, i32** %p.addr, align 8
+  %1 = load i32, i32* %0, align 4
+  %cmp = icmp eq i32 %1, 0
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  %2 = load i32*, i32** %p.addr, align 8
+  br label %if.end
+
+if.end:                                           ; preds = %if.then, %entry
+  ret void
+}
+
+attributes #0 = { noinline nounwind optnone uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
+
+; CHECK-FLAGGED: .globl _Z3fooPi                # -- Begin function _Z3fooPi
+; CHECK-FLAGGED-NEXT: .p2align 4, 0x90
+; CHECK-FLAGGED-NEXT: .type _Z3fooPi,@function
+; CHECK-FLAGGED-NEXT:_Z3fooPi:                               # @_Z3fooPi
+; CHECK-FLAGGED-NEXT:.L_Z3fooPi$local:
+; CHECK-FLAGGED-NEXT: .cfi_startproc
+; CHECK-FLAGGED-NEXT:# %bb.0:                                # %entry
+; CHECK-FLAGGED-NEXT: lfence
+; CHECK-FLAGGED-NEXT: pushq %rbp
+; CHECK-FLAGGED-NEXT: .cfi_def_cfa_offset 16
+; CHECK-FLAGGED-NEXT: .cfi_offset %rbp, -16
+; CHECK-FLAGGED-NEXT: movq %rsp, %rbp
+; CHECK-FLAGGED-NEXT: .cfi_def_cfa_register %rbp
+; CHECK-FLAGGED-NEXT: lfence
+; CHECK-FLAGGED-NEXT: movq %rdi, -8(%rbp)
+; CHECK-FLAGGED-NEXT: lfence
+; CHECK-FLAGGED-NEXT: movq -8(%rbp), %rax
+; CHECK-FLAGGED-NEXT: lfence
+; CHECK-FLAGGED-NEXT: cmpl $0, (%rax)
+; CHECK-FLAGGED-NEXT: lfence
+; CHECK-FLAGGED-NEXT: jne .LBB0_2
+; CHECK-FLAGGED-NEXT:# %bb.1:                                # %if.then
+; CHECK-FLAGGED-NEXT:.LBB0_2:                                # %if.end
+; CHECK-FLAGGED-NEXT: popq %rbp
+; CHECK-FLAGGED-NEXT: .cfi_def_cfa %rsp, 8
+; CHECK-FLAGGED-NEXT: retq
+
+; CHECK-FULL: .globl _Z3fooPi                # -- Begin function _Z3fooPi
+; CHECK-FULL-NEXT: .p2align 4, 0x90
+; CHECK-FULL-NEXT: .type _Z3fooPi,@function
+; CHECK-FULL-NEXT:_Z3fooPi:                               # @_Z3fooPi
+; CHECK-FULL-NEXT:.L_Z3fooPi$local:
+; CHECK-FULL-NEXT: .cfi_startproc
+; CHECK-FULL-NEXT:# %bb.0:                                # %entry
+; CHECK-FULL-NEXT: lfence
+; CHECK-FULL-NEXT: pushq %rbp
+; CHECK-FULL-NEXT: .cfi_def_cfa_offset 16
+; CHECK-FULL-NEXT: .cfi_offset %rbp, -16
+; CHECK-FULL-NEXT: movq %rsp, %rbp
+; CHECK-FULL-NEXT: .cfi_def_cfa_register %rbp
+; CHECK-FULL-NEXT: lfence
+; CHECK-FULL-NEXT: movq %rdi, -8(%rbp)
+; CHECK-FULL-NEXT: lfence
+; CHECK-FULL-NEXT: movq -8(%rbp), %rax
+; CHECK-FULL-NEXT: lfence
+; CHECK-FULL-NEXT: cmpl $0, (%rax)
+; CHECK-FULL-NEXT: lfence
+; CHECK-FULL-NEXT: jne .LBB0_2
+; CHECK-FULL-NEXT:# %bb.1:                                # %if.then
+; CHECK-FULL-NEXT:.LBB0_2:                                # %if.end
+; CHECK-FULL-NEXT: lfence
+; CHECK-FULL-NEXT: popq %rbp
+; CHECK-FULL-NEXT: .cfi_def_cfa %rsp, 8
+; CHECK-FULL-NEXT: retq