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[mlir][sparse] add option for 32-bit indices in scatter/gather
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Authored by aartbik on Jun 3 2021, 10:01 AM.

Details

Summary

Controlled by a compiler option, if 32-bit indices can be handled
with zero/sign-extention alike (viz. no worries on non-negative
indices), scatter/gather operations can use the more efficient
32-bit SIMD version.

Diff Detail

Event Timeline

aartbik created this revision.Jun 3 2021, 10:01 AM
aartbik requested review of this revision.Jun 3 2021, 10:01 AM
bixia accepted this revision.Jun 4 2021, 1:53 PM
This revision is now accepted and ready to land.Jun 4 2021, 1:53 PM
rriddle added inline comments.Jun 4 2021, 1:56 PM
mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
48

Why are these options not defined using the tablegen description?

https://mlir.llvm.org/docs/PassManagement/#options

aartbik added inline comments.Jun 4 2021, 2:15 PM
mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
48

Thanks! The simple answer is that I did not know/remember that was supported ;-)

Will change it right away!

aartbik updated this revision to Diff 349988.Jun 4 2021, 4:20 PM

addressed River's feedback