[AVR] Optimize 16-bit comparison with constant

[benshi001]

for the C code like

int a;
if (a == 2333)

The generated AVR assembly is optimized from

ldi     r18, 29
ldi     r19, 9
cp      r24, r18
cpc     r25, r19

to

ldi     r18, 9
cpi     r24, 29
cpc     r25, r18

llvm/lib/Target/AVR/AVRISelLowering.h

public:
   bool shouldSplitFunctionArgumentsAsLittleEndian(const DataLayout &DL)
     const override {
     return false;
   }
 
 private:
   SDValue getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &AVRcc,
                     SelectionDAG &DAG, SDLoc dl) const;
+  SDValue getAVRCmp(SDValue LHS, SDValue RHS, SelectionDAG &DAG,
+                    SDLoc dl) const;
   SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerDivRem(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;

llvm/lib/Target/AVR/AVRISelLowering.cpp

case ISD::SETLT:
     return AVRCC::COND_LT;
   case ISD::SETUGE:
     return AVRCC::COND_SH;
   case ISD::SETULT:
     return AVRCC::COND_LO;
   }
 }
 
+/// Returns appropriate CP/CPI/CPC nodes code for the given 8/16-bit operands.
+SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS,
+                                     SelectionDAG &DAG, SDLoc DL) const {
+  assert((LHS.getSimpleValueType() == RHS.getSimpleValueType()) &&
+         "LHS and RHS have different types");
+  assert(((LHS.getSimpleValueType() == MVT::i16) ||
+          (LHS.getSimpleValueType() == MVT::i8)) && "invalid comparison type");
+
+  SDValue Cmp;
+
+  if (LHS.getSimpleValueType() == MVT::i16 && dyn_cast<ConstantSDNode>(RHS)) {
+    // Generate a CPI/CPC pair if RHS is a 16-bit constant.
+    SDValue LHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHS,
+                                DAG.getIntPtrConstant(0, DL));
+    SDValue LHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHS,
+                                DAG.getIntPtrConstant(1, DL));
+    SDValue RHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, RHS,
+                                DAG.getIntPtrConstant(0, DL));
+    SDValue RHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, RHS,
+                                DAG.getIntPtrConstant(1, DL));
+    Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHSlo, RHSlo);
+    Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHShi, RHShi, Cmp);
+  } else {
+    // Generate ordinary 16-bit comparison.
+    Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHS, RHS);
+  }
+
+  return Cmp;
+}
+
 /// Returns appropriate AVR CMP/CMPC nodes and corresponding condition code for
 /// the given operands.
 SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
                                      SDValue &AVRcc, SelectionDAG &DAG,
                                      SDLoc DL) const {
   SDValue Cmp;
   EVT VT = LHS.getValueType();
   bool UseTest = false;
SDValue RHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS,
                                 DAG.getIntPtrConstant(1, DL));
 
     if (UseTest) {
       // When using tst we only care about the highest part.
       SDValue Top = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHShi,
                                 DAG.getIntPtrConstant(1, DL));
       Cmp = DAG.getNode(AVRISD::TST, DL, MVT::Glue, Top);
     } else {
-      Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHSlo, RHSlo);
+      Cmp = getAVRCmp(LHSlo, RHSlo, DAG, DL);
       Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHShi, RHShi, Cmp);
     }
   } else if (VT == MVT::i64) {
     SDValue LHS_0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, LHS,
                                 DAG.getIntPtrConstant(0, DL));
     SDValue LHS_1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, LHS,
                                 DAG.getIntPtrConstant(1, DL));
 
SDValue RHS3 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_1,
                                DAG.getIntPtrConstant(1, DL));
 
     if (UseTest) {
       // When using tst we only care about the highest part.
       SDValue Top = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHS3,
                                 DAG.getIntPtrConstant(1, DL));
       Cmp = DAG.getNode(AVRISD::TST, DL, MVT::Glue, Top);
     } else {
-      Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHS0, RHS0);
+      Cmp = getAVRCmp(LHS0, RHS0, DAG, DL);
       Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS1, RHS1, Cmp);
       Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp);
       Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS3, RHS3, Cmp);
     }
   } else if (VT == MVT::i8 || VT == MVT::i16) {
     if (UseTest) {
       // When using tst we only care about the highest part.
       Cmp = DAG.getNode(AVRISD::TST, DL, MVT::Glue,
                         (VT == MVT::i8)
                             ? LHS
                             : DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8,
                                           LHS, DAG.getIntPtrConstant(1, DL)));
     } else {
-      Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHS, RHS);
+      Cmp = getAVRCmp(LHS, RHS, DAG, DL);
     }
   } else {
     llvm_unreachable("Invalid comparison size");
   }
 
   // When using a test instruction AVRcc is already set.
   if (!UseTest) {
     AVRcc = DAG.getConstant(intCCToAVRCC(CC), DL, MVT::i8);

llvm/test/CodeGen/AVR/cmp.ll

if.then:
   br label %if.end
 if.else:
   tail call void @f4(i16 %b)
   br label %if.end
 if.end:
   ret void
 }
 
+define void @cmpimm16(i16 %a) {
+; CHECK-LABEL: cmpimm16:
+; CHECK: cpi
+; CHECK-NEXT: cpc
+  %cmp = icmp eq i16 %a, 4567
+  br i1 %cmp, label %if.then, label %if.else
+if.then:
+  tail call void @f3(i16 %a)
+  br label %if.end
+if.else:
+  tail call void @f4(i16 %a)
+  br label %if.end
+if.end:
+  ret void
+}
+
 declare void @f5(i32)
 declare void @f6(i32)
 define void @cmp32(i32 %a, i32 %b) {
 ; CHECK-LABEL: cmp32:
 ; CHECK: cp
 ; CHECK-NEXT: cpc
 ; CHECK-NEXT: cpc
 ; CHECK-NEXT: cpc
   %cmp = icmp eq i32 %a, %b
   br i1 %cmp, label %if.then, label %if.else
 if.then:
   tail call void @f5(i32 %a)
   br label %if.end
 if.else:
   tail call void @f6(i32 %b)
   br label %if.end
 if.end:
   ret void
 }
 
+define void @cmpimm32(i32 %a) {
+; CHECK-LABEL: cmpimm32:
+; CHECK: cpi
+; CHECK-NEXT: cpc
+; CHECK-NEXT: cpc
+; CHECK-NEXT: cpc
+  %cmp = icmp eq i32 %a, 6789343
+  br i1 %cmp, label %if.then, label %if.else
+if.then:
+  tail call void @f5(i32 %a)
+  br label %if.end
+if.else:
+  tail call void @f6(i32 %a)
+  br label %if.end
+if.end:
+  ret void
+}
+
 declare void @f7(i64)
 declare void @f8(i64)
 define void @cmp64(i64 %a, i64 %b) {
 ; CHECK-LABEL: cmp64:
 ; CHECK: cp
 ; CHECK-NEXT: cpc
 ; CHECK-NEXT: cpc
 ; CHECK-NEXT: cpc
 ; CHECK-NEXT: cpc
 ; CHECK-NEXT: cpc
 ; CHECK-NEXT: cpc
 ; CHECK-NEXT: cpc
   %cmp = icmp eq i64 %a, %b
   br i1 %cmp, label %if.then, label %if.else
 if.then:
   tail call void @f7(i64 %a)
   br label %if.end
 if.else:
   tail call void @f8(i64 %b)
   br label %if.end
 if.end:
   ret void
 }
 
+define void @cmpimm64(i64 %a) {
+; CHECK-LABEL: cmpimm64:
+; CHECK: cpi
+; CHECK-NEXT: cpc
+; CHECK-NEXT: cpc
+; CHECK-NEXT: cpc
+; CHECK-NEXT: cpc
+; CHECK-NEXT: cpc
+; CHECK-NEXT: cpc
+; CHECK-NEXT: cpc
+  %cmp = icmp eq i64 %a, 234566452
+  br i1 %cmp, label %if.then, label %if.else
+if.then:
+  tail call void @f7(i64 %a)
+  br label %if.end
+if.else:
+  tail call void @f8(i64 %a)
+  br label %if.end
+if.end:
+  ret void
+}
+
 declare void @f9()
 declare void @f10()
 
 define void @tst8(i8 %a) {
 ; CHECK-LABEL: tst8:
 ; CHECK: tst r24
 ; CHECK-NEXT: brmi
   %cmp = icmp sgt i8 %a, -1