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ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.
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Authored by pcc on Apr 21 2015, 12:20 PM.

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Summary

This makes it more likely that we can use the 16-bit push and pop instructions
on Thumb-2, saving around 4 bytes per function.

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rL LLVM

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pcc updated this revision to Diff 24154.Apr 21 2015, 12:20 PM
pcc retitled this revision from to ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets..
pcc updated this object.
pcc edited the test plan for this revision. (Show Details)
pcc added a reviewer: t.p.northover.
pcc added a subscriber: Unknown Object (MLST).

Small comment, otherwise, looks good to me.

cheers,
--renato

test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
11 ↗(On Diff #24154)

This change looks unrelated, do you know why it happens?

pcc added inline comments.Apr 23 2015, 12:27 PM
test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
11 ↗(On Diff #24154)

I am not sure exactly. It looks like in this case (and a few others elsewhere) the code is computing a frame pointer in r7 by taking the address of the spilled r7 value. (I don't entirely understand why we compute the frame pointer address this way.) If I look at the rest of the uses of r7, they seem fine, accounting for the change in offset.

rengolin accepted this revision.Apr 23 2015, 12:33 PM
rengolin added a reviewer: rengolin.

LGTM, Thanks!

test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
11 ↗(On Diff #24154)

Right, makes sense. Not seeing the whole assembly output made me worry. :)

This revision is now accepted and ready to land.Apr 23 2015, 12:33 PM
This revision was automatically updated to reflect the committed changes.