Add a way to enable/disable the ARM load/store optimization pass

[rs]

Summary

This patch adds an option to enable/disable the ARM load/store optimization pass which I find useful when debugging with llc.

[rengolin]

Looks good to me. Just please, avoid using unnecessary curly brackets and add the comment to the boolean value before commit. Thanks!

lib/Target/ARM/ARMTargetMachine.cpp

359

When this went in, the "true" value made a lot of sense, now, I'm failing to remember what was that all about. Can you add a comment like: (/* prealloc /* true)?

[rs]

Hi Renato,

Thanks for the code review.

I've attached another patch with your suggested changes. I don't have commit access yet, so could you commit this one?
I'll go through the process today to get commit rights.

Thanks,
Ranjeet

[echristo]

LGTM as well.

[rengolin]

Committed in r233303.

lib/Target/ARM/ARMTargetMachine.cpp

DisableA15SDOptimization("disable-a15-sd-optimization", cl::Hidden,
                    cl::init(false));
 
 static cl::opt<bool>
 EnableAtomicTidy("arm-atomic-cfg-tidy", cl::Hidden,
                  cl::desc("Run SimplifyCFG after expanding atomic operations"
                           " to make use of cmpxchg flow-based information"),
                  cl::init(true));
 
+static cl::opt<bool>
+EnableARMLoadStoreOpt("arm-load-store-opt", cl::Hidden,
+                      cl::desc("Enable ARM load/store optimization pass"),
+                      cl::init(true));
+
 extern "C" void LLVMInitializeARMTarget() {
   // Register the target.
   RegisterTargetMachine<ARMLETargetMachine> X(TheARMLETarget);
   RegisterTargetMachine<ARMBETargetMachine> Y(TheARMBETarget);
   RegisterTargetMachine<ThumbLETargetMachine> A(TheThumbLETarget);
   RegisterTargetMachine<ThumbBETargetMachine> B(TheThumbBETarget);
 }
 
bool ARMPassConfig::addInstSelector() {
 
   if (Triple(TM->getTargetTriple()).isOSBinFormatELF() &&
       TM->Options.EnableFastISel)
     addPass(createARMGlobalBaseRegPass());
   return false;
 }
 
 void ARMPassConfig::addPreRegAlloc() {
-  if (getOptLevel() != CodeGenOpt::None)
-    addPass(createARMLoadStoreOptimizationPass(true));
-  if (getOptLevel() != CodeGenOpt::None)
+  if (getOptLevel() != CodeGenOpt::None) {
     addPass(createMLxExpansionPass());
-  if (getOptLevel() != CodeGenOpt::None && !DisableA15SDOptimization) {
+
+    if (EnableARMLoadStoreOpt)
+      addPass(createARMLoadStoreOptimizationPass(/* pre-register alloc */ true));
+
+    if (!DisableA15SDOptimization)
       addPass(createA15SDOptimizerPass());
   }
 }
 
 void ARMPassConfig::addPreSched2() {
   if (getOptLevel() != CodeGenOpt::None) {
+    if (EnableARMLoadStoreOpt)
       addPass(createARMLoadStoreOptimizationPass());
+
     addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
   }
 
   // Expand some pseudo instructions into multiple instructions to allow
   // proper scheduling.
   addPass(createARMExpandPseudoPass());
 
   if (getOptLevel() != CodeGenOpt::None) {
     // in v8, IfConversion depends on Thumb instruction widths
     if (getARMSubtarget().restrictIT())
       addPass(createThumb2SizeReductionPass());
     if (!getARMSubtarget().isThumb1Only())
       addPass(&IfConverterID);
-   }
   addPass(createThumb2ITBlockPass());
 }
 
 void ARMPassConfig::addPreEmitPass() {
   addPass(createThumb2SizeReductionPass());
 
   // Constant island pass work on unbundled instructions.
   if (getARMSubtarget().isThumb2())
     addPass(&UnpackMachineBundlesID);
 
   addPass(createARMOptimizeBarriersPass());
   addPass(createARMConstantIslandPass());
 }