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rs (Ranjeet Singh)
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Sep 23 2014, 3:21 AM (251 w, 6 d)

Recent Activity

Jan 28 2019

rs created D57326: VERSION_GREATER_EQUAL not supported in llvm's minimum required cmake version.
Jan 28 2019, 6:56 AM

Jan 4 2019

rs updated subscribers of D55115: [IR] Don't assume all functions are 4 byte aligned.

@chandlerc I've reverted the patch r350402 sorry for causing the performance issue. I'll investigate the datalayout idea a bit more, @miyuki original solution to the function pointer aligment issue did something like that https://reviews.llvm.org/D44781

Jan 4 2019, 8:48 AM

Dec 10 2018

rs created D55521: Cleanup test case by removing unused attribute.
Dec 10 2018, 9:52 AM

Dec 6 2018

rs updated the diff for D55115: [IR] Don't assume all functions are 4 byte aligned.

This was approved previously https://reviews.llvm.org/D55115 but when committed it caused failures on the sanitizer buildbots when building
llvm with clang (containing this patch). This is now fixed because I've added a check to see if getting the parent module returns null if it does then set the alignment to 0.

Dec 6 2018, 6:53 AM

Dec 3 2018

rs added a comment to D55115: [IR] Don't assume all functions are 4 byte aligned.

Updated to use getPointerAlignment and removed test file that was reliant on compiler using assumptions about function alignment.

Dec 3 2018, 5:38 AM
rs updated the diff for D55115: [IR] Don't assume all functions are 4 byte aligned.
Dec 3 2018, 5:36 AM

Nov 30 2018

rs created D55115: [IR] Don't assume all functions are 4 byte aligned.
Nov 30 2018, 3:38 AM

Apr 26 2017

rs added a comment to D31807: Fix signed multiplication with overflow fallback..

Looks fine, I think it's ready to land. Do you have commit access ? If not do you want me to commit on your behalf ?

Apr 26 2017, 6:39 AM

Mar 31 2017

rs updated the diff for D31078: [libunwind] Clean up macro usage..
Mar 31 2017, 8:37 AM

Mar 17 2017

rs created D31078: [libunwind] Clean up macro usage..
Mar 17 2017, 7:11 AM

Mar 6 2017

rs created D30645: [ARM] Fix arm_get_fpscr intrinsic selection in ISel.
Mar 6 2017, 4:48 AM

Mar 3 2017

rs added a comment to D30542: [ARM] fpscr read/write intrinsics not aware of each other..

Thanks for reviewing James.

Mar 3 2017, 3:16 AM
rs updated the diff for D30542: [ARM] fpscr read/write intrinsics not aware of each other..
Mar 3 2017, 3:14 AM

Mar 2 2017

rs updated the summary of D30542: [ARM] fpscr read/write intrinsics not aware of each other..
Mar 2 2017, 10:23 AM
rs created D30542: [ARM] fpscr read/write intrinsics not aware of each other..
Mar 2 2017, 10:16 AM

Mar 1 2017

rs added a comment to D30459: [libcxxabi] Clean up macro usage.

ok thanks.

Mar 1 2017, 3:53 AM
rs updated the diff for D30459: [libcxxabi] Clean up macro usage.

Thanks for reviewing. Before I commit could you tell me if I need to update any build systems e.g. buildbots ?

Mar 1 2017, 3:24 AM

Feb 28 2017

rs created D30459: [libcxxabi] Clean up macro usage.
Feb 28 2017, 7:02 AM

Feb 27 2017

rs added a comment to D30343: [libcxxabi] Fix condition typo in rL296136.

This works for me, but the idiomatic macro usage in libc++, and (hopefully) libc++abi should always use !defined(FOO) as opposed to !FOO. I'll clean this up in the next week if nobody else wants to.

Feb 27 2017, 5:17 AM

Feb 24 2017

rs added a comment to D30343: [libcxxabi] Fix condition typo in rL296136.

Going for post-commit.

Feb 24 2017, 10:31 AM
rs added a comment to D30339: [libcxxabi] Disable calls to fprintf when building for baremetal targets in release mode.

Ah sorry for the mistake. Fix is here https://reviews.llvm.org/D30343

Feb 24 2017, 9:57 AM
rs created D30343: [libcxxabi] Fix condition typo in rL296136.
Feb 24 2017, 9:56 AM
rs updated the summary of D30340: [libunwind] Disable calls to fprintf when building for baremetal targets in release mode.
Feb 24 2017, 8:12 AM
rs updated the summary of D30339: [libcxxabi] Disable calls to fprintf when building for baremetal targets in release mode.
Feb 24 2017, 8:12 AM
rs retitled D30339: [libcxxabi] Disable calls to fprintf when building for baremetal targets in release mode from Disable calls to fprintf when building for baremetal targets in release mode to [libcxxabi] Disable calls to fprintf when building for baremetal targets in release mode.
Feb 24 2017, 8:11 AM
rs created D30340: [libunwind] Disable calls to fprintf when building for baremetal targets in release mode.
Feb 24 2017, 8:11 AM
rs created D30339: [libcxxabi] Disable calls to fprintf when building for baremetal targets in release mode.
Feb 24 2017, 8:08 AM

Nov 17 2016

rs added a comment to D26191: [ARM] Patch to improve memcpy inlined assembly sequence..

It's fine as a pass. I mean, it would be nice to include as part of some existing pass, but I'm not sure where it would fit in.

Nov 17 2016, 7:54 AM

Nov 16 2016

rs added a comment to D26191: [ARM] Patch to improve memcpy inlined assembly sequence..

Thanks for your review comments Eli.

Nov 16 2016, 11:41 AM
rs added a comment to D26191: [ARM] Patch to improve memcpy inlined assembly sequence..

Thanks for the review Tim, I really appreciate it.

Nov 16 2016, 9:34 AM

Nov 15 2016

rs added a reviewer for D26191: [ARM] Patch to improve memcpy inlined assembly sequence.: john.brawn.
Nov 15 2016, 9:34 AM

Nov 14 2016

rs added a comment to D26191: [ARM] Patch to improve memcpy inlined assembly sequence..

Ping.

Nov 14 2016, 6:53 AM

Nov 1 2016

rs retitled D26191: [ARM] Patch to improve memcpy inlined assembly sequence. from [ARM] Patch to improve memcpy lined assembly sequence. to [ARM] Patch to improve memcpy inlined assembly sequence..
Nov 1 2016, 7:12 AM
rs retitled D26191: [ARM] Patch to improve memcpy inlined assembly sequence. from to [ARM] Patch to improve memcpy lined assembly sequence..
Nov 1 2016, 7:11 AM

Aug 18 2016

rs added a reviewer for D23662: [libclang] Control whether crash recovery is enabled/disabled using function argument.: akyrtzi.
Aug 18 2016, 7:28 AM
rs updated subscribers of D23662: [libclang] Control whether crash recovery is enabled/disabled using function argument..
Aug 18 2016, 7:26 AM
rs updated D23662: [libclang] Control whether crash recovery is enabled/disabled using function argument..
Aug 18 2016, 7:22 AM
rs updated D23662: [libclang] Control whether crash recovery is enabled/disabled using function argument..
Aug 18 2016, 7:20 AM
rs updated D23662: [libclang] Control whether crash recovery is enabled/disabled using function argument..
Aug 18 2016, 7:19 AM
rs updated D23662: [libclang] Control whether crash recovery is enabled/disabled using function argument..
Aug 18 2016, 7:19 AM
rs retitled D23662: [libclang] Control whether crash recovery is enabled/disabled using function argument. from to [libclang] Control whether crash recovery is enabled/disabled using function argument..
Aug 18 2016, 7:18 AM

Jul 22 2016

rs added a comment to D16135: Macro Debug Info support in Clang.

Hi Amjad,

Jul 22 2016, 10:16 AM

Jun 16 2016

rs updated the diff for D21408: [ARM] MRRC2 shouldn't allow predicates.

I'm surprised you didn't pick this problem before commit. Our buildbots seem happy, so this was definitely a downstream test.

Jun 16 2016, 8:26 AM

Jun 15 2016

rs retitled D21408: [ARM] MRRC2 shouldn't allow predicates from to [ARM] MRRC2 shouldn't allow predicates.
Jun 15 2016, 2:09 PM

Jun 13 2016

rs updated the diff for D21179: Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types.

Hi Renato,

Jun 13 2016, 4:36 AM
rs added inline comments to D21179: Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types.
Jun 13 2016, 4:34 AM

Jun 10 2016

rs added a comment to D21178: Add mrrc/mrrc2 co-processor intrinsics.

Thanks for reviewing Renato, will make your suggested changes before committing. Can you also review the clang part of the patch at some point http://reviews.llvm.org/D21179 ?

Jun 10 2016, 8:50 AM
rs added inline comments to D21178: Add mrrc/mrrc2 co-processor intrinsics.
Jun 10 2016, 3:36 AM

Jun 9 2016

rs added inline comments to D21178: Add mrrc/mrrc2 co-processor intrinsics.
Jun 9 2016, 9:22 AM
rs added a comment to D21178: Add mrrc/mrrc2 co-processor intrinsics.

Thanks for the review Renato. I replied back to your comments below.

Jun 9 2016, 6:30 AM
rs added a comment to D21179: Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types.

LLVM part of the patch is here http://reviews.llvm.org/D21178

Jun 9 2016, 5:09 AM
rs added reviewers for D21178: Add mrrc/mrrc2 co-processor intrinsics: rengolin, t.p.northover.
Jun 9 2016, 5:08 AM
rs retitled D21179: Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types from to Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics to accept a single uint64 type instead of 2 uint32 types.
Jun 9 2016, 5:07 AM
rs retitled D21178: Add mrrc/mrrc2 co-processor intrinsics from to Add mrrc/mrrc2 co-processor intrinsics.
Jun 9 2016, 5:00 AM

May 24 2016

rs added a comment to D20563: Add load/store co-processor intrinsics.

Tim thanks for reviewing this patch. I've uploaded a new one with your suggested change. If I don't respond to any further comments after today it'll be because I'm on holiday and won't be back till next week.

May 24 2016, 2:06 PM
rs updated the diff for D20563: Add load/store co-processor intrinsics.
May 24 2016, 2:00 PM
rs added a comment to D20563: Add load/store co-processor intrinsics.

LLVM part of the patch is here http://reviews.llvm.org/D20564

May 24 2016, 3:57 AM
rs updated the diff for D20564: Add load/store co-processor intrinsics.
May 24 2016, 3:53 AM
rs retitled D20564: Add load/store co-processor intrinsics from to Add load/store co-processor intrinsics.
May 24 2016, 3:49 AM
rs retitled D20563: Add load/store co-processor intrinsics from to Add load/store co-processor intrinsics.
May 24 2016, 3:46 AM

May 18 2016

rs added a comment to D20325: Add ARM cdp intrinsics.

http://reviews.llvm.org/D20394 which adds a test for the intrinsic in llvm

May 18 2016, 3:58 PM
rs added a comment to D20325: Add ARM cdp intrinsics.

Hi Renato,

May 18 2016, 3:56 PM
rs retitled D20394: Fix cdp intrinsic from to Fix cdp intrinsic.
May 18 2016, 3:54 PM
rs updated the diff for D20393: Add cdp intrinsic tests.
May 18 2016, 3:47 PM
rs retitled D20393: Add cdp intrinsic tests from to Add cdp intrinsic tests.
May 18 2016, 3:43 PM
rs added a comment to D20325: Add ARM cdp intrinsics.

It's been our stance for a long time to require docs to approve changes, however small. I don't want to relax that which I think is a good constraint, not for such a seemly irrelevant issue.
I also doubt this will be the only addition in the new ACLE, so why not release the document, and then submit all changes then?
Or, maybe I am mistaken, and this is really that important... is it?

May 18 2016, 2:23 AM

May 17 2016

rs updated subscribers of D20325: Add ARM cdp intrinsics.
May 17 2016, 6:06 AM
rs updated D20325: Add ARM cdp intrinsics.
May 17 2016, 6:02 AM
rs retitled D20325: Add ARM cdp intrinsics from to Add ARM cdp intrinsics.
May 17 2016, 6:01 AM

Jun 29 2015

rs updated the diff for D10542: Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places.

Hi Michael,

Jun 29 2015, 7:21 AM

Jun 25 2015

rs updated the diff for D10542: Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places.

Hi Michael,

Jun 25 2015, 8:00 AM

Jun 24 2015

rs added a comment to D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP.

Thanks for the review.

Jun 24 2015, 4:40 PM

Jun 23 2015

rs added a comment to D10542: Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places.

Hm. I've read the patch more carefully, and I'm actually somewhat confused now.

Each target has two enumerations:

  1. SubtargetFeatureFlag - this is used, I think, only by the AsmParser, and has elements that look like Feature_HasAVX512. This one still lives in a regular bitfield, not a bitset, so the elements of the enum are of them form "1 << C". If I'm not mistaken, ComputeAvailableFeatures() returns a set of these values.
  2. A nameless enum used everywhere else, which has elements that look like X86::FeatureAVX512. I've changed this enum in my original patch, and now these are ordinal values (1, 2, 3... etc.), instead of powers of 2.

    Now, it looks like what you did was to change everything that used bitfields containing SubtargetFeatureFlag to use a FeatureBitset instead. But the values themselves are still powers of 2, so you are still bound by the limits of the underlying type.

    Is that right? If it is, then what is the goal of this patch?
Jun 23 2015, 8:39 AM
rs updated the diff for D10542: Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places.

Hi Michael,

Jun 23 2015, 4:40 AM
rs added inline comments to D10645: [ARM]: Extend -mfpu options for half-precision and vfpv3xd.
Jun 23 2015, 4:20 AM
rs added a comment to D10645: [ARM]: Extend -mfpu options for half-precision and vfpv3xd.

Hi Javed,

Jun 23 2015, 4:19 AM

Jun 22 2015

rs added a comment to D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP.

Why are you testing for _ARM_FP if the core of what you're doing is adding +/- strings to -target-features? Why not test the target-features directly?

Jun 22 2015, 10:03 AM
rs added a comment to D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP.

I don't think this will ensure the old code fails.

Jun 22 2015, 6:57 AM
rs added inline comments to D10542: Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places.
Jun 22 2015, 5:01 AM
rs added a comment to D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP.

can someone have another look at this?

Jun 22 2015, 3:47 AM
rs added a comment to D10542: Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places.

Thanks for the review Michael.

Jun 22 2015, 3:46 AM

Jun 18 2015

rs added reviewers for D10542: Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places: rengolin, john.brawn, jmolloy, mkuper.
Jun 18 2015, 1:17 PM
rs retitled D10542: Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places from to Replace uint64_t representation of Features with FeatureBitset (std::bitset) in a few more places.
Jun 18 2015, 9:49 AM

Jun 17 2015

rs added a comment to D10507: [ARM] Don't hard code metadata arguments.

Thanks for the review.

Jun 17 2015, 12:57 PM
rs retitled D10507: [ARM] Don't hard code metadata arguments from to [ARM] Don't hard code metadata arguments.
Jun 17 2015, 10:24 AM

Jun 15 2015

rs added a comment to D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP.

Can you explain in more detail how I can check for this internal bug using CHECK-DAG?

I'm assuming this is the target features, that normally come in the format:

+foo,-bar,+baz

or

-target-feature +foo -target-feature -bar -target-feature +baz

Either case, if you use:

CHECK-DAG: +foo
CHECK-DAG: -bar
CHECK-DAG: +baz

They could come in any order and it would still match.

Jun 15 2015, 8:06 AM
rs added a comment to D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP.

The order that the features are specified on the cc1 command line won't mean that the features will be stored in the Features vector in the same order. This is because the features on the command line are parsed and stored into a StringMap then they're taken out again which can jumble up the order because StringMap's don't maintain order, below is the code which takes the features out of the StringMap in lib/Basic/Targets.cpp:

Jun 15 2015, 7:21 AM
rs updated the diff for D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP.

Changed 'HW_FP_remove =...' to 'HW_FP_remove |=...'

Jun 15 2015, 3:22 AM

Jun 11 2015

rs added a comment to D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP.

TargetInfo::CreateTargetInfo takes the features from the command line and puts them into a StringMap and pulls them out again which can jumble the order of the features. So if I did write a test there's no guarantee that handleTargetFeatures will see them in the same order that I specified them on the command line. If you have any suggestions on how I can write a test for this then please let me know.

Jun 11 2015, 10:25 AM
rs retitled D10395: [ARM] Keep track of previous changes to the bit pattern stored HW_FP from to [ARM] Keep track of previous changes to the bit pattern stored HW_FP.
Jun 11 2015, 8:58 AM

Jun 8 2015

rs added a comment to D10320: Patch to make AArch64 AsmParser be case insensitive about accepting vector register names.

Hi James,

Jun 8 2015, 2:40 PM
rs retitled D10320: Patch to make AArch64 AsmParser be case insensitive about accepting vector register names from to Patch to make AArch64 AsmParser be case insensitive about accepting vector register names.
Jun 8 2015, 1:36 PM

Jun 3 2015

rs added a comment to D10211: some StmtExprs do not have side-effects.

LGTM, but someone else should approve as well

Jun 3 2015, 5:32 AM
rs added a comment to D10210: add ConstEvaluatedExprVisitor.

LGTM, but someone else should approve as well

Jun 3 2015, 5:31 AM
rs added a comment to D10211: some StmtExprs do not have side-effects.

Just one small comment.

Jun 3 2015, 4:19 AM

May 28 2015

rs retitled D10087: Change expected compiler output in arm-cortex-cpus.c from to Change expected compiler output in arm-cortex-cpus.c.
May 28 2015, 6:23 AM

Apr 29 2015

rs added inline comments to D9298: [ARM] Teach the ARM Load Store Optimizer to collapse ldr/str's to ldrd/strd's.
Apr 29 2015, 8:34 AM
rs added a comment to D9298: [ARM] Teach the ARM Load Store Optimizer to collapse ldr/str's to ldrd/strd's.

Hi John and Renato,

Apr 29 2015, 8:32 AM

Apr 27 2015

rs retitled D9298: [ARM] Teach the ARM Load Store Optimizer to collapse ldr/str's to ldrd/strd's from to [ARM] Teach the ARM Load Store Optimizer to collapse ldr/str's to ldrd/strd's.
Apr 27 2015, 10:00 AM

Mar 26 2015

rs updated the diff for D8630: Add a way to enable/disable the ARM load/store optimization pass.

Hi Renato,

Mar 26 2015, 6:10 AM