[Fixed Point] Use FixedPointBuilder to codegen fixed-point IR.

[ebevhan]

Summary

This changes the methods in CGExprScalar to use
FixedPointBuilder to generate IR for fixed-point
conversions and operations.

Since FixedPointBuilder emits padded operations slightly
differently than the original code, some tests change.

clang/lib/CodeGen/CGExprScalar.cpp

 #include "clang/AST/StmtVisitor.h"
 #include "clang/Basic/CodeGenOptions.h"
 #include "clang/Basic/TargetInfo.h"
 #include "llvm/ADT/APFixedPoint.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/IR/CFG.h"
 #include "llvm/IR/Constants.h"
 #include "llvm/IR/DataLayout.h"
+#include "llvm/IR/FixedPointBuilder.h"
 #include "llvm/IR/Function.h"
 #include "llvm/IR/GetElementPtrTypeIterator.h"
 #include "llvm/IR/GlobalVariable.h"
 #include "llvm/IR/Intrinsics.h"
 #include "llvm/IR/IntrinsicsPowerPC.h"
 #include "llvm/IR/MatrixBuilder.h"
 #include "llvm/IR/Module.h"
 #include <cstdarg>
public:
   EmitScalarConversion(Value *Src, QualType SrcTy, QualType DstTy,
                        SourceLocation Loc,
                        ScalarConversionOpts Opts = ScalarConversionOpts());
 
   /// Convert between either a fixed point and other fixed point or fixed point
   /// and an integer.
   Value *EmitFixedPointConversion(Value *Src, QualType SrcTy, QualType DstTy,
                                   SourceLocation Loc);
-  Value *EmitFixedPointConversion(Value *Src,
-                                  llvm::FixedPointSemantics &SrcFixedSema,
-                                  llvm::FixedPointSemantics &DstFixedSema,
-                                  SourceLocation Loc,
-                                  bool DstIsInteger = false);
 
   /// Emit a conversion from the specified complex type to the specified
   /// destination type, where the destination type is an LLVM scalar type.
   Value *EmitComplexToScalarConversion(CodeGenFunction::ComplexPairTy Src,
                                        QualType SrcTy, QualType DstTy,
                                        SourceLocation Loc);
 
   /// EmitNullValue - Emit a value that corresponds to null for the given type.
Value *ScalarExprEmitter::EmitScalarConversion(Value *Src, QualType SrcType,
   return Res;
 }
 
 Value *ScalarExprEmitter::EmitFixedPointConversion(Value *Src, QualType SrcTy,
                                                    QualType DstTy,
                                                    SourceLocation Loc) {
   auto SrcFPSema = CGF.getContext().getFixedPointSemantics(SrcTy);
   auto DstFPSema = CGF.getContext().getFixedPointSemantics(DstTy);
-  return EmitFixedPointConversion(Src, SrcFPSema, DstFPSema, Loc,
-                                  DstTy->isIntegerType());
-}
-
-Value *ScalarExprEmitter::EmitFixedPointConversion(
-    Value *Src, llvm::FixedPointSemantics &SrcFPSema,
-    llvm::FixedPointSemantics &DstFPSema,
-    SourceLocation Loc, bool DstIsInteger) {
-  using llvm::APFixedPoint;
-  using llvm::APInt;
-  using llvm::ConstantInt;
-  using llvm::Value;
-
-  unsigned SrcWidth = SrcFPSema.getWidth();
-  unsigned DstWidth = DstFPSema.getWidth();
-  unsigned SrcScale = SrcFPSema.getScale();
-  unsigned DstScale = DstFPSema.getScale();
-  bool SrcIsSigned = SrcFPSema.isSigned();
-  bool DstIsSigned = DstFPSema.isSigned();
-
-  llvm::Type *DstIntTy = Builder.getIntNTy(DstWidth);
-
-  Value *Result = Src;
-  unsigned ResultWidth = SrcWidth;
-
-  // Downscale.
-  if (DstScale < SrcScale) {
-    // When converting to integers, we round towards zero. For negative numbers,
-    // right shifting rounds towards negative infinity. In this case, we can
-    // just round up before shifting.
-    if (DstIsInteger && SrcIsSigned) {
-      Value *Zero = llvm::Constant::getNullValue(Result->getType());
-      Value *IsNegative = Builder.CreateICmpSLT(Result, Zero);
-      Value *LowBits = ConstantInt::get(
-          CGF.getLLVMContext(), APInt::getLowBitsSet(ResultWidth, SrcScale));
-      Value *Rounded = Builder.CreateAdd(Result, LowBits);
-      Result = Builder.CreateSelect(IsNegative, Rounded, Result);
-    }
-
-    Result = SrcIsSigned
-                 ? Builder.CreateAShr(Result, SrcScale - DstScale, "downscale")
-                 : Builder.CreateLShr(Result, SrcScale - DstScale, "downscale");
-  }
-
-  if (!DstFPSema.isSaturated()) {
-    // Resize.
-    Result = Builder.CreateIntCast(Result, DstIntTy, SrcIsSigned, "resize");
-
-    // Upscale.
-    if (DstScale > SrcScale)
-      Result = Builder.CreateShl(Result, DstScale - SrcScale, "upscale");
-  } else {
-    // Adjust the number of fractional bits.
-    if (DstScale > SrcScale) {
-      // Compare to DstWidth to prevent resizing twice.
-      ResultWidth = std::max(SrcWidth + DstScale - SrcScale, DstWidth);
-      llvm::Type *UpscaledTy = Builder.getIntNTy(ResultWidth);
-      Result = Builder.CreateIntCast(Result, UpscaledTy, SrcIsSigned, "resize");
-      Result = Builder.CreateShl(Result, DstScale - SrcScale, "upscale");
-    }
-
-    // Handle saturation.
-    bool LessIntBits = DstFPSema.getIntegralBits() < SrcFPSema.getIntegralBits();
-    if (LessIntBits) {
-      Value *Max = ConstantInt::get(
-          CGF.getLLVMContext(),
-          APFixedPoint::getMax(DstFPSema).getValue().extOrTrunc(ResultWidth));
-      Value *TooHigh = SrcIsSigned ? Builder.CreateICmpSGT(Result, Max)
-                                   : Builder.CreateICmpUGT(Result, Max);
-      Result = Builder.CreateSelect(TooHigh, Max, Result, "satmax");
-    }
-    // Cannot overflow min to dest type if src is unsigned since all fixed
-    // point types can cover the unsigned min of 0.
-    if (SrcIsSigned && (LessIntBits || !DstIsSigned)) {
-      Value *Min = ConstantInt::get(
-          CGF.getLLVMContext(),
-          APFixedPoint::getMin(DstFPSema).getValue().extOrTrunc(ResultWidth));
-      Value *TooLow = Builder.CreateICmpSLT(Result, Min);
-      Result = Builder.CreateSelect(TooLow, Min, Result, "satmin");
-    }
-
-    // Resize the integer part to get the final destination size.
-    if (ResultWidth != DstWidth)
-      Result = Builder.CreateIntCast(Result, DstIntTy, SrcIsSigned, "resize");
-  }
+  llvm::FixedPointBuilder<CGBuilderTy> FPBuilder(Builder);
+  llvm::Value *Result;
+  if (DstTy->isIntegerType())
+    Result = FPBuilder.CreateFixedToInteger(Src, SrcFPSema,
+                                            DstFPSema.getWidth(),
+                                            DstFPSema.isSigned());
+  else if (SrcTy->isIntegerType())
+    Result =  FPBuilder.CreateIntegerToFixed(Src, SrcFPSema.isSigned(),
+                                             DstFPSema);
+  else
+    Result = FPBuilder.CreateFixedToFixed(Src, SrcFPSema, DstFPSema);
   return Result;
 }
 
 /// Emit a conversion from the specified complex type to the specified
 /// destination type, where the destination type is an LLVM scalar type.
 Value *ScalarExprEmitter::EmitComplexToScalarConversion(
     CodeGenFunction::ComplexPairTy Src, QualType SrcTy, QualType DstTy,
     SourceLocation Loc) {
// Fixed-point types.
     // since -1 is guaranteed to be representable.
     if (type->isSignedFixedPointType()) {
       Info.Opcode = isInc ? BO_Sub : BO_Add;
       Info.RHS = Builder.CreateNeg(Info.RHS);
     }
     // Now, convert from our invented integer literal to the type of the unary
     // op. This will upscale and saturate if necessary. This value can become
     // undef in some cases.
-    auto SrcSema =
-        llvm::FixedPointSemantics::GetIntegerSemantics(
-            value->getType()->getScalarSizeInBits(), /*IsSigned=*/true);
+    llvm::FixedPointBuilder<CGBuilderTy> FPBuilder(Builder);
     auto DstSema = CGF.getContext().getFixedPointSemantics(Info.Ty);
-    Info.RHS = EmitFixedPointConversion(Info.RHS, SrcSema, DstSema,
-                                        E->getExprLoc());
+    Info.RHS = FPBuilder.CreateIntegerToFixed(Info.RHS, true, DstSema);
     value = EmitFixedPointBinOp(Info);
 
   // Objective-C pointer types.
   } else {
     const ObjCObjectPointerType *OPT = type->castAs<ObjCObjectPointerType>();
     value = CGF.EmitCastToVoidPtr(value);
 
     CharUnits size = CGF.getContext().getTypeSizeInChars(OPT->getObjectType());
Value *ScalarExprEmitter::EmitFixedPointBinOp(const BinOpInfo &op) {
   Value *LHS = op.LHS;
   Value *RHS = op.RHS;
 
   auto LHSFixedSema = Ctx.getFixedPointSemantics(LHSTy);
   auto RHSFixedSema = Ctx.getFixedPointSemantics(RHSTy);
   auto ResultFixedSema = Ctx.getFixedPointSemantics(ResultTy);
   auto CommonFixedSema = LHSFixedSema.getCommonSemantics(RHSFixedSema);
 
-  // Convert the operands to the full precision type.
-  Value *FullLHS = EmitFixedPointConversion(LHS, LHSFixedSema, CommonFixedSema,
-                                            op.E->getExprLoc());
-  Value *FullRHS = EmitFixedPointConversion(RHS, RHSFixedSema, CommonFixedSema,
-                                            op.E->getExprLoc());
-
   // Perform the actual operation.
   Value *Result;
+  llvm::FixedPointBuilder<CGBuilderTy> FPBuilder(Builder);
   switch (op.Opcode) {
   case BO_AddAssign:
-  case BO_Add: {
-    if (CommonFixedSema.isSaturated()) {
-      llvm::Intrinsic::ID IID = CommonFixedSema.isSigned()
-                                    ? llvm::Intrinsic::sadd_sat
-                                    : llvm::Intrinsic::uadd_sat;
-      Result = Builder.CreateBinaryIntrinsic(IID, FullLHS, FullRHS);
-    } else {
-      Result = Builder.CreateAdd(FullLHS, FullRHS);
-    }
+  case BO_Add:
+    Result = FPBuilder.CreateAdd(LHS, LHSFixedSema, RHS, RHSFixedSema);
     break;
-  }
   case BO_SubAssign:
-  case BO_Sub: {
-    if (CommonFixedSema.isSaturated()) {
-      llvm::Intrinsic::ID IID = CommonFixedSema.isSigned()
-                                    ? llvm::Intrinsic::ssub_sat
-                                    : llvm::Intrinsic::usub_sat;
-      Result = Builder.CreateBinaryIntrinsic(IID, FullLHS, FullRHS);
-    } else {
-      Result = Builder.CreateSub(FullLHS, FullRHS);
-    }
+  case BO_Sub:
+    Result = FPBuilder.CreateSub(LHS, LHSFixedSema, RHS, RHSFixedSema);
     break;
-  }
   case BO_MulAssign:
-  case BO_Mul: {
-    llvm::Intrinsic::ID IID;
-    if (CommonFixedSema.isSaturated())
-      IID = CommonFixedSema.isSigned() ? llvm::Intrinsic::smul_fix_sat
-                                       : llvm::Intrinsic::umul_fix_sat;
-    else
-      IID = CommonFixedSema.isSigned() ? llvm::Intrinsic::smul_fix
-                                       : llvm::Intrinsic::umul_fix;
-    Result = Builder.CreateIntrinsic(IID, {FullLHS->getType()},
-        {FullLHS, FullRHS, Builder.getInt32(CommonFixedSema.getScale())});
+  case BO_Mul:
+    Result = FPBuilder.CreateMul(LHS, LHSFixedSema, RHS, RHSFixedSema);
     break;
-  }
   case BO_DivAssign:
-  case BO_Div: {
-    llvm::Intrinsic::ID IID;
-    if (CommonFixedSema.isSaturated())
-      IID = CommonFixedSema.isSigned() ? llvm::Intrinsic::sdiv_fix_sat
-                                       : llvm::Intrinsic::udiv_fix_sat;
-    else
-      IID = CommonFixedSema.isSigned() ? llvm::Intrinsic::sdiv_fix
-                                       : llvm::Intrinsic::udiv_fix;
-    Result = Builder.CreateIntrinsic(IID, {FullLHS->getType()},
-        {FullLHS, FullRHS, Builder.getInt32(CommonFixedSema.getScale())});
-    break;    
-  }
+  case BO_Div:
+    Result = FPBuilder.CreateDiv(LHS, LHSFixedSema, RHS, RHSFixedSema);
+    break;
   case BO_LT:
-    return CommonFixedSema.isSigned() ? Builder.CreateICmpSLT(FullLHS, FullRHS)
-                                      : Builder.CreateICmpULT(FullLHS, FullRHS);
+    return FPBuilder.CreateLT(LHS, LHSFixedSema, RHS, RHSFixedSema);
   case BO_GT:
-    return CommonFixedSema.isSigned() ? Builder.CreateICmpSGT(FullLHS, FullRHS)
-                                      : Builder.CreateICmpUGT(FullLHS, FullRHS);
+    return FPBuilder.CreateGT(LHS, LHSFixedSema, RHS, RHSFixedSema);
   case BO_LE:
-    return CommonFixedSema.isSigned() ? Builder.CreateICmpSLE(FullLHS, FullRHS)
-                                      : Builder.CreateICmpULE(FullLHS, FullRHS);
+    return FPBuilder.CreateLE(LHS, LHSFixedSema, RHS, RHSFixedSema);
   case BO_GE:
-    return CommonFixedSema.isSigned() ? Builder.CreateICmpSGE(FullLHS, FullRHS)
-                                      : Builder.CreateICmpUGE(FullLHS, FullRHS);
+    return FPBuilder.CreateGE(LHS, LHSFixedSema, RHS, RHSFixedSema);
   case BO_EQ:
     // For equality operations, we assume any padding bits on unsigned types are
     // zero'd out. They could be overwritten through non-saturating operations
     // that cause overflow, but this leads to undefined behavior.
-    return Builder.CreateICmpEQ(FullLHS, FullRHS);
+    return FPBuilder.CreateEQ(LHS, LHSFixedSema, RHS, RHSFixedSema);
   case BO_NE:
-    return Builder.CreateICmpNE(FullLHS, FullRHS);
+    return FPBuilder.CreateNE(LHS, LHSFixedSema, RHS, RHSFixedSema);
   case BO_Shl:
   case BO_Shr:
   case BO_Cmp:
   case BO_LAnd:
   case BO_LOr:
   case BO_ShlAssign:
   case BO_ShrAssign:
     llvm_unreachable("Found unimplemented fixed point binary operation");
   case BO_PtrMemD:
   case BO_PtrMemI:
   case BO_Rem:
   case BO_Xor:
   case BO_And:
   case BO_Or:
   case BO_Assign:
   case BO_RemAssign:
   case BO_AndAssign:
   case BO_XorAssign:
   case BO_OrAssign:
   case BO_Comma:
     llvm_unreachable("Found unsupported binary operation for fixed point types.");
   }
 
   // Convert to the result type.
-  return EmitFixedPointConversion(Result, CommonFixedSema, ResultFixedSema,
-                                  op.E->getExprLoc());
+  return FPBuilder.CreateFixedToFixed(Result, CommonFixedSema, ResultFixedSema);
 }
 
 Value *ScalarExprEmitter::EmitSub(const BinOpInfo &op) {
   // The LHS is always a pointer if either side is.
   if (!op.LHS->getType()->isPointerTy()) {
     if (op.Ty->isSignedIntegerOrEnumerationType()) {
       switch (CGF.getLangOpts().getSignedOverflowBehavior()) {
       case LangOptions::SOB_Defined:

clang/test/Frontend/fixed_point_add.c

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @usa_sat, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_usasusausas(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[TMP1]] to i15
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i15 @llvm.uadd.sat.i15(i15 [[RESIZE]], i15 [[RESIZE1]])
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i15 [[TMP2]] to i16
-// UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @usa_sat, align 2
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
+// UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @usa_sat, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void sat_usasusausas() {
   usa_sat = usa + usa_sat;
 }
 
 // SIGNED-LABEL: @sat_uasuausas(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
 // SIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]])
 // SIGNED-NEXT:    store i32 [[TMP2]], i32* @ua_sat, align 4
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_uasuausas(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i31
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i31
-// UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i31 [[RESIZE1]], 8
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i31 @llvm.uadd.sat.i31(i31 [[RESIZE]], i31 [[UPSCALE]])
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i31 [[TMP2]] to i32
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
+// UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]])
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i32 [[TMP2]] to i31
+// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32
 // UNSIGNED-NEXT:    store i32 [[RESIZE2]], i32* @ua_sat, align 4
 // UNSIGNED-NEXT:    ret void
 //
 void sat_uasuausas() {
   ua_sat = ua + usa_sat;
 }
 
 // CHECK-LABEL: @sat_sassasi(

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @uf_sat, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_ufsufsufs(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[TMP1]] to i15
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i15 @llvm.uadd.sat.i15(i15 [[RESIZE]], i15 [[RESIZE1]])
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i15 [[TMP2]] to i16
-// UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @uf_sat, align 2
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
+// UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @uf_sat, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void sat_ufsufsufs() {
   uf_sat = uf_sat + uf_sat;
 }
 
 // SIGNED-LABEL: @sat_usasusasi(
 // SIGNED-NEXT:  entry:

clang/test/Frontend/fixed_point_div.c

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.udiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8)
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @udiv_usausausa(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa, align 2
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.udiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)
 // UNSIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void udiv_usausausa() {
   usa = usa / usa;
 }
 
 // SIGNED-LABEL: @udiv_uausaua(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, i32* @ua, align 4
 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32
 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
 // SIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.udiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 16)
 // SIGNED-NEXT:    store i32 [[TMP2]], i32* @ua, align 4
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @udiv_uausaua(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i32, i32* @ua, align 4
 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32
 // UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.udiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15)
 // UNSIGNED-NEXT:    store i32 [[TMP2]], i32* @ua, align 4
 // UNSIGNED-NEXT:    ret void
 //
 void udiv_uausaua() {
   ua = usa / ua;
 }
 
 // SIGNED-LABEL: @udiv_usausausf(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i8, i8* @usf, align 1
 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16
 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.udiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 8)
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @udiv_usausausf(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i8, i8* @usf, align 1
 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.udiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7)
 // UNSIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void udiv_usausausf() {
   usa = usa / usf;
 }
 
 // SIGNED-LABEL: @udiv_usausauf(

 //
 // UNSIGNED-LABEL: @udiv_usausauf(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @uf, align 2
 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24
 // UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8
 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i24 @llvm.udiv.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i24 @llvm.sdiv.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15)
 // UNSIGNED-NEXT:    [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8
 // UNSIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @usa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void udiv_usausauf() {
   usa = usa / uf;
 }

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.udiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8)
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @usa_sat, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_usasusausas(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[TMP1]] to i15
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i15 @llvm.udiv.fix.sat.i15(i15 [[RESIZE]], i15 [[RESIZE1]], i32 7)
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i15 [[TMP2]] to i16
-// UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @usa_sat, align 2
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
+// UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @usa_sat, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void sat_usasusausas() {
   usa_sat = usa / usa_sat;
 }
 
 // SIGNED-LABEL: @sat_uasuausas(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
 // SIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.udiv.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 16)
 // SIGNED-NEXT:    store i32 [[TMP2]], i32* @ua_sat, align 4
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_uasuausas(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i31
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i31
-// UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i31 [[RESIZE1]], 8
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i31 @llvm.udiv.fix.sat.i31(i31 [[RESIZE]], i31 [[UPSCALE]], i32 15)
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i31 [[TMP2]] to i32
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
+// UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 15)
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i32 [[TMP2]] to i31
+// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32
 // UNSIGNED-NEXT:    store i32 [[RESIZE2]], i32* @ua_sat, align 4
 // UNSIGNED-NEXT:    ret void
 //
 void sat_uasuausas() {
   ua_sat = ua / usa_sat;
 }
 
 // CHECK-LABEL: @sat_sassasi(

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.udiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 16)
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @uf_sat, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_ufsufsufs(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[TMP1]] to i15
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i15 @llvm.udiv.fix.sat.i15(i15 [[RESIZE]], i15 [[RESIZE1]], i32 15)
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i15 [[TMP2]] to i16
-// UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @uf_sat, align 2
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 15)
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
+// UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @uf_sat, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void sat_ufsufsufs() {
   uf_sat = uf_sat / uf_sat;
 }
 
 // SIGNED-LABEL: @sat_usasusasi(
 // SIGNED-NEXT:  entry:

clang/test/Frontend/fixed_point_mul.c

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8)
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @umul_usausausa(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa, align 2
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)
 // UNSIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void umul_usausausa() {
   usa = usa * usa;
 }
 
 // SIGNED-LABEL: @umul_uausaua(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, i32* @ua, align 4
 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32
 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
 // SIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.umul.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 16)
 // SIGNED-NEXT:    store i32 [[TMP2]], i32* @ua, align 4
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @umul_uausaua(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i32, i32* @ua, align 4
 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32
 // UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.umul.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15)
 // UNSIGNED-NEXT:    store i32 [[TMP2]], i32* @ua, align 4
 // UNSIGNED-NEXT:    ret void
 //
 void umul_uausaua() {
   ua = usa * ua;
 }
 
 // SIGNED-LABEL: @umul_usausausf(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i8, i8* @usf, align 1
 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16
 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 8)
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @umul_usausausf(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i8, i8* @usf, align 1
 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7)
 // UNSIGNED-NEXT:    store i16 [[TMP2]], i16* @usa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void umul_usausausf() {
   usa = usa * usf;
 }
 
 // SIGNED-LABEL: @umul_usausauf(

 //
 // UNSIGNED-LABEL: @umul_usausauf(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @uf, align 2
 // UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24
 // UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8
 // UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i24 @llvm.umul.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i24 @llvm.smul.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15)
 // UNSIGNED-NEXT:    [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8
 // UNSIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @usa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void umul_usausauf() {
   usa = usa * uf;
 }

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.umul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8)
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @usa_sat, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_usasusausas(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[TMP1]] to i15
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i15 @llvm.umul.fix.sat.i15(i15 [[RESIZE]], i15 [[RESIZE1]], i32 7)
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i15 [[TMP2]] to i16
-// UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @usa_sat, align 2
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.smul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
+// UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @usa_sat, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void sat_usasusausas() {
   usa_sat = usa * usa_sat;
 }
 
 // SIGNED-LABEL: @sat_uasuausas(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
 // SIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.umul.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 16)
 // SIGNED-NEXT:    store i32 [[TMP2]], i32* @ua_sat, align 4
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_uasuausas(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i31
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i31
-// UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i31 [[RESIZE1]], 8
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i31 @llvm.umul.fix.sat.i31(i31 [[RESIZE]], i31 [[UPSCALE]], i32 15)
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i31 [[TMP2]] to i32
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
+// UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.smul.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 15)
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i32 [[TMP2]] to i31
+// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32
 // UNSIGNED-NEXT:    store i32 [[RESIZE2]], i32* @ua_sat, align 4
 // UNSIGNED-NEXT:    ret void
 //
 void sat_uasuausas() {
   ua_sat = ua * usa_sat;
 }
 
 // CHECK-LABEL: @sat_sassasi(

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.umul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 16)
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @uf_sat, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_ufsufsufs(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[TMP1]] to i15
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i15 @llvm.umul.fix.sat.i15(i15 [[RESIZE]], i15 [[RESIZE1]], i32 15)
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i15 [[TMP2]] to i16
-// UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @uf_sat, align 2
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.smul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 15)
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
+// UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @uf_sat, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void sat_ufsufsufs() {
   uf_sat = uf_sat * uf_sat;
 }
 
 // SIGNED-LABEL: @sat_usasusasi(
 // SIGNED-NEXT:  entry:

clang/test/Frontend/fixed_point_sub.c

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @usa_sat, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_usasusausas(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @usa, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[TMP1]] to i15
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i15 @llvm.usub.sat.i15(i15 [[RESIZE]], i15 [[RESIZE1]])
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i15 [[TMP2]] to i16
-// UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @usa_sat, align 2
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]]
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
+// UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @usa_sat, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void sat_usasusausas() {
   usa_sat = usa - usa_sat;
 }
 
 // SIGNED-LABEL: @sat_uasuausas(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
 // SIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
 // SIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]])
 // SIGNED-NEXT:    store i32 [[TMP2]], i32* @ua_sat, align 4
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_uasuausas(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @ua, align 4
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i31
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i31
-// UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i31 [[RESIZE1]], 8
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i31 @llvm.usub.sat.i31(i31 [[RESIZE]], i31 [[UPSCALE]])
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i31 [[TMP2]] to i32
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
+// UNSIGNED-NEXT:    [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]])
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP3]], i32 0, i32 [[TMP2]]
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i32 [[SATMIN]] to i31
+// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32
 // UNSIGNED-NEXT:    store i32 [[RESIZE2]], i32* @ua_sat, align 4
 // UNSIGNED-NEXT:    ret void
 //
 void sat_uasuausas() {
   ua_sat = ua - usa_sat;
 }
 
 // CHECK-LABEL: @sat_sassasi(

 // SIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
 // SIGNED-NEXT:    store i16 [[TMP2]], i16* @uf_sat, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @sat_ufsufsufs(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2
 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = trunc i16 [[TMP1]] to i15
-// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i15 @llvm.usub.sat.i15(i15 [[RESIZE]], i15 [[RESIZE1]])
-// UNSIGNED-NEXT:    [[RESIZE2:%.*]] = zext i15 [[TMP2]] to i16
-// UNSIGNED-NEXT:    store i16 [[RESIZE2]], i16* @uf_sat, align 2
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
+// UNSIGNED-NEXT:    [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]]
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
+// UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @uf_sat, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void sat_ufsufsufs() {
   uf_sat = uf_sat - uf_sat;
 }
 
 // SIGNED-LABEL: @sat_usasusasi(
 // SIGNED-NEXT:  entry:

clang/test/Frontend/fixed_point_unary.c

 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @sua, align 4
 // SIGNED-NEXT:    [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 65536)
 // SIGNED-NEXT:    store i32 [[TMP1]], i32* @sua, align 4
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @inc_sua(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @sua, align 4
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i31
-// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i31 @llvm.uadd.sat.i31(i31 [[RESIZE]], i31 32768)
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i31 [[TMP1]] to i32
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 32768)
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[TMP1]] to i31
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32
 // UNSIGNED-NEXT:    store i32 [[RESIZE1]], i32* @sua, align 4
 // UNSIGNED-NEXT:    ret void
 //
 void inc_sua() {
   sua++;
 }
 
 // SIGNED-LABEL: @inc_susa(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 256)
 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @susa, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @inc_susa(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i15 @llvm.uadd.sat.i15(i15 [[RESIZE]], i15 128)
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[TMP1]] to i16
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 128)
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @susa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void inc_susa() {
   susa++;
 }
 
 // SIGNED-LABEL: @inc_suf(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 -1)
 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @suf, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @inc_suf(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i15 @llvm.uadd.sat.i15(i15 [[RESIZE]], i15 -1)
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[TMP1]] to i16
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 32767)
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @suf, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void inc_suf() {
   suf++;
 }
 
 

 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @sua, align 4
 // SIGNED-NEXT:    [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[TMP0]], i32 65536)
 // SIGNED-NEXT:    store i32 [[TMP1]], i32* @sua, align 4
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @dec_sua(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, i32* @sua, align 4
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i31
-// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i31 @llvm.usub.sat.i31(i31 [[RESIZE]], i31 32768)
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i31 [[TMP1]] to i32
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 32768)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[TMP1]]
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i31
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32
 // UNSIGNED-NEXT:    store i32 [[RESIZE1]], i32* @sua, align 4
 // UNSIGNED-NEXT:    ret void
 //
 void dec_sua() {
   sua--;
 }
 
 // SIGNED-LABEL: @dec_susa(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 256)
 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @susa, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @dec_susa(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i15 @llvm.usub.sat.i15(i15 [[RESIZE]], i15 128)
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[TMP1]] to i16
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 128)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @susa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void dec_susa() {
   susa--;
 }
 
 // SIGNED-LABEL: @dec_suf(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 -1)
 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @suf, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @dec_suf(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i15 @llvm.usub.sat.i15(i15 [[RESIZE]], i15 -1)
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[TMP1]] to i16
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 32767)
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @suf, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void dec_suf() {
   suf--;
 }
 
 

 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])
 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @susa, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @neg_susa(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @susa, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i15 @llvm.usub.sat.i15(i15 0, i15 [[RESIZE]])
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[TMP1]] to i16
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @susa, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void neg_susa() {
   susa = -susa;
 }
 
 // SIGNED-LABEL: @neg_suf(
 // SIGNED-NEXT:  entry:
 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
 // SIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])
 // SIGNED-NEXT:    store i16 [[TMP1]], i16* @suf, align 2
 // SIGNED-NEXT:    ret void
 //
 // UNSIGNED-LABEL: @neg_suf(
 // UNSIGNED-NEXT:  entry:
 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, i16* @suf, align 2
-// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[TMP0]] to i15
-// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i15 @llvm.usub.sat.i15(i15 0, i15 [[RESIZE]])
-// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[TMP1]] to i16
+// UNSIGNED-NEXT:    [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
+// UNSIGNED-NEXT:    [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
+// UNSIGNED-NEXT:    [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
+// UNSIGNED-NEXT:    [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
+// UNSIGNED-NEXT:    [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
 // UNSIGNED-NEXT:    store i16 [[RESIZE1]], i16* @suf, align 2
 // UNSIGNED-NEXT:    ret void
 //
 void neg_suf() {
   suf = -suf;
 }