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Differential D85918

[AMDGPU] Inhibit SDWA if target instruction has FI
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Authored by rampitec on Aug 13 2020, 11:17 AM.

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Reviewers
arsenm
Commits
rG0462aef5f359: [AMDGPU] Inhibit SDWA if target instruction has FI

Diff Detail

Event Timeline

rampitec created this revision.Aug 13 2020, 11:17 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 13 2020, 11:17 AM
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rampitec requested review of this revision.Aug 13 2020, 11:17 AM
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arsenm accepted this revision.Aug 13 2020, 11:26 AM
arsenm added inline comments.
llvm/test/CodeGen/AMDGPU/sdwa-stack.mir
17

Should add a use of some kind in case this ever decides to delete dead instructions

This revision is now accepted and ready to land.Aug 13 2020, 11:26 AM
rampitec updated this revision to Diff 285442.Aug 13 2020, 11:35 AM
rampitec marked an inline comment as done.

Added uses in test.

Closed by commit rG0462aef5f359: [AMDGPU] Inhibit SDWA if target instruction has FI (authored by rampitec). · Explain WhyAug 13 2020, 11:38 AM
This revision was automatically updated to reflect the committed changes.
rampitec added a commit: rG0462aef5f359: [AMDGPU] Inhibit SDWA if target instruction has FI.

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
10 lines
test/
CodeGen/
AMDGPU/
32 lines

Diff 285444

llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp

Show First 20 Lines • Show All 986 Lines • ▼ Show 20 Linesbool SIPeepholeSDWA::isConvertibleToSDWA(MachineInstr &MI,
// Check if target supports this SDWA opcode // Check if target supports this SDWA opcode
if (TII->pseudoToMCOpcode(Opc) == -1) if (TII->pseudoToMCOpcode(Opc) == -1)
return false; return false;
// FIXME: has SDWA but require handling of implicit VCC use // FIXME: has SDWA but require handling of implicit VCC use
if (Opc == AMDGPU::V_CNDMASK_B32_e32) if (Opc == AMDGPU::V_CNDMASK_B32_e32)
return false; return false;
if (MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0)) {
if (!Src0->isReg() && !Src0->isImm())
return false;
}
if (MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1)) {
if (!Src1->isReg() && !Src1->isImm())
return false;
}
return true; return true;
} }
bool SIPeepholeSDWA::convertToSDWA(MachineInstr &MI, bool SIPeepholeSDWA::convertToSDWA(MachineInstr &MI,
const SDWAOperandsVector &SDWAOperands) { const SDWAOperandsVector &SDWAOperands) {
LLVM_DEBUG(dbgs() << "Convert instruction:" << MI); LLVM_DEBUG(dbgs() << "Convert instruction:" << MI);
▲ Show 20 Lines • Show All 271 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/sdwa-stack.mir

  • This file was added.
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=si-peephole-sdwa -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
# Do not fold stack objects into SDWA.
---
# GCN-LABEL: name: sdwa_stack_object_src0
# GCN: V_ADD_U32_e64 %stack.0, killed %1
name: sdwa_stack_object_src0
stack:
- { id: 0, type: default, offset: 0, size: 32, alignment: 4, stack-id: default }
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = V_AND_B32_e32 255, %0, implicit $exec
%2:vgpr_32 = V_ADD_U32_e64 %stack.0, killed %1, 0, implicit $exec
S_ENDPGM 0, implicit %2
arsenmUnsubmitted
Done
ReplyInline Actions

Should add a use of some kind in case this ever decides to delete dead instructions

arsenm: Should add a use of some kind in case this ever decides to delete dead instructions
...
---
name: sdwa_stack_object_src1
# GCN-LABEL: name: sdwa_stack_object_src1
# GCN: V_ADD_U32_e64 killed %1, %stack.0
stack:
- { id: 0, type: default, offset: 0, size: 32, alignment: 4, stack-id: default }
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = V_AND_B32_e32 255, %0, implicit $exec
%2:vgpr_32 = V_ADD_U32_e64 killed %1, %stack.0, 0, implicit $exec
S_ENDPGM 0, implicit %2
...