AMDGPU: Fix inlining logic for denormals

[arsenm]

Summary

This was backwards from intended and missing a test. We perhaps should
just ignored the FP mode here, since it shouldn't be legal to mix code
with different default modes in the absence of strictfp.

[rampitec]

LGTM

[arsenm]

156afb2253eabf0e2d446dafd08e754d7b9f513a

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

uint32_t fpDenormModeDPValue() const {
     if (FP64FP16OutputDenormals)
       return FP_DENORM_FLUSH_IN;
     return FP_DENORM_FLUSH_IN_FLUSH_OUT;
   }
 
   /// Returns true if a flag is compatible if it's enabled in the callee, but
   /// disabled in the caller.
   static bool oneWayCompatible(bool CallerMode, bool CalleeMode) {
-    return CallerMode == CalleeMode || (CallerMode && !CalleeMode);
+    return CallerMode == CalleeMode || (!CallerMode && CalleeMode);
   }
 
   // FIXME: Inlining should be OK for dx10-clamp, since the caller's mode should
   // be able to override.
   bool isInlineCompatible(SIModeRegisterDefaults CalleeMode) const {
     if (DX10Clamp != CalleeMode.DX10Clamp)
       return false;
     if (IEEE != CalleeMode.IEEE)

llvm/test/Transforms/Inline/AMDGPU/inline-denormal-fp-math.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -inline < %s | FileCheck %s
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes='cgscc(inline)' < %s | FileCheck %s
+
+define i32 @func_default() #0 {
+; CHECK-LABEL: @func_default(
+; CHECK-NEXT:    ret i32 0
+;
+  ret i32 0
+}
+
+define i32 @func_denormal_fp_math_ieee_ieee() #1 {
+; CHECK-LABEL: @func_denormal_fp_math_ieee_ieee(
+; CHECK-NEXT:    ret i32 0
+;
+  ret i32 0
+}
+
+define i32 @func_denormal_fp_math_flush_flush() #2 {
+; CHECK-LABEL: @func_denormal_fp_math_flush_flush(
+; CHECK-NEXT:    ret i32 0
+;
+  ret i32 0
+}
+
+define i32 @call_func_ieee_ieee_from_flush_flush() #2 {
+; CHECK-LABEL: @call_func_ieee_ieee_from_flush_flush(
+; CHECK-NEXT:    ret i32 0
+;
+  %call = call i32 @func_denormal_fp_math_ieee_ieee()
+  ret i32 %call
+}
+
+define i32 @call_func_flush_flush_from_ieee_ieee() #1 {
+; CHECK-LABEL: @call_func_flush_flush_from_ieee_ieee(
+; CHECK-NEXT:    [[CALL:%.*]] = call i32 @func_denormal_fp_math_flush_flush()
+; CHECK-NEXT:    ret i32 [[CALL]]
+;
+  %call = call i32 @func_denormal_fp_math_flush_flush()
+  ret i32 %call
+}
+
+define i32 @func_denormal_fp_math_flush_ieee() #3 {
+; CHECK-LABEL: @func_denormal_fp_math_flush_ieee(
+; CHECK-NEXT:    ret i32 0
+;
+  ret i32 0
+}
+
+define i32 @func_denormal_fp_math_ieee_flush() #4 {
+; CHECK-LABEL: @func_denormal_fp_math_ieee_flush(
+; CHECK-NEXT:    ret i32 0
+;
+  ret i32 0
+}
+
+define i32 @call_func_flush_ieee_from_ieee_ieee() #1 {
+; CHECK-LABEL: @call_func_flush_ieee_from_ieee_ieee(
+; CHECK-NEXT:    [[CALL:%.*]] = call i32 @func_denormal_fp_math_flush_ieee()
+; CHECK-NEXT:    ret i32 [[CALL]]
+;
+  %call = call i32 @func_denormal_fp_math_flush_ieee()
+  ret i32 %call
+}
+
+define i32 @call_func_ieee_flush_from_ieee_ieee() #1 {
+; CHECK-LABEL: @call_func_ieee_flush_from_ieee_ieee(
+; CHECK-NEXT:    [[CALL:%.*]] = call i32 @func_denormal_fp_math_ieee_flush()
+; CHECK-NEXT:    ret i32 [[CALL]]
+;
+  %call = call i32 @func_denormal_fp_math_ieee_flush()
+  ret i32 %call
+}
+
+attributes #0 = { nounwind }
+attributes #1 = { nounwind "denormal-fp-math"="ieee,ieee" }
+attributes #2 = { nounwind "denormal-fp-math"="preserve-sign,preserve-sign" }
+attributes #3 = { nounwind "denormal-fp-math"="preserve-sign,ieee" }
+attributes #4 = { nounwind "denormal-fp-math"="ieee,preserve-sign" }