Page MenuHomePhabricator

[BPF] disable ReduceLoadWidth during SelectionDag phase
ClosedPublic

Authored by yonghong-song on Feb 4 2020, 2:34 PM.

Details

Summary

The compiler may transform the following code
(e.g., the test case in this commit)

ctx = ctx + reloc_offset
... (*(u32 *)ctx) & 0x8000 ...

to

ctx = ctx + reloc_offset
... (*(u8 *)(ctx + 1)) & 0x80 ...

where reloc_offset will be replaced with a constant during
AsmPrinter phase.

The above transformed code will be rejected the kernel verifier
as it does not allow

*(type *)((ctx + non_zero_offset1) + non_zero_offset2)

style access pattern.

It is hard at SelectionDag phase to identify whether a load
is related to context or not. Sometime, interprocedure analysis
may be needed. So let us simply prevent such optimization
from happening.

Diff Detail

Event Timeline

yonghong-song created this revision.Feb 4 2020, 2:34 PM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 4 2020, 2:34 PM
anakryiko accepted this revision.Feb 4 2020, 3:04 PM

looks simple enough, thanks for fixing it fast!

This revision is now accepted and ready to land.Feb 4 2020, 3:04 PM
This revision was automatically updated to reflect the committed changes.