[ModuloSchedule] Do target loop analysis before peeling.

[ThomasRaoux]

Summary

Simple change to call target hook analyzeLoopForPipelining before
changing the loop. After peeling analyzing the loop may be more
complicated for target that don't have a loop instruction. This doesn't
affect Hexagone and PPC as they have hardware loop instructions.

[jmolloy]

LGTM, thanks!

llvm/include/llvm/CodeGen/ModuloSchedule.h

346

No need for =nullptr, the default constructor does this.

[ThomasRaoux]

Committed with 03da6e8c00de2320e6b9dacba8f7850faceae319

llvm/include/llvm/CodeGen/ModuloSchedule.h

private:
   /// the loop exiting block as any other kernel clone.
   MachineBasicBlock *CreateLCSSAExitingBlock();
   /// Helper to get the stage of an instruction in the schedule.
   unsigned getStage(MachineInstr *MI) {
     if (CanonicalMIs.count(MI))
       MI = CanonicalMIs[MI];
     return Schedule.getStage(MI);
   }
+  /// Target loop info before kernel peeling.
+  std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> Info = nullptr;
 };
 
 /// Expander that simply annotates each scheduled instruction with a post-instr
 /// symbol that can be consumed by the ModuloScheduleTest pass.
 ///
 /// The post-instr symbol is a way of annotating an instruction that can be
 /// roundtripped in MIR. The syntax is:
 ///   MYINST %0, post-instr-symbol <mcsymbol Stage-1_Cycle-5>

llvm/lib/CodeGen/ModuloSchedule.cpp

for (auto &Sub : Subs)
                                     *MRI.getTargetRegisterInfo());
   }
   if (LIS)
     LIS->RemoveMachineInstrFromMaps(*MI);
   MI->eraseFromParent();
 }
 
 void PeelingModuloScheduleExpander::fixupBranches() {
-  std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> Info =
-      TII->analyzeLoopForPipelining(BB);
-  assert(Info);
-
   // Work outwards from the kernel.
   bool KernelDisposed = false;
   int TC = Schedule.getNumStages() - 1;
   for (auto PI = Prologs.rbegin(), EI = Epilogs.rbegin(); PI != Prologs.rend();
        ++PI, ++EI, --TC) {
     MachineBasicBlock *Prolog = *PI;
     MachineBasicBlock *Fallthrough = *Prolog->succ_begin();
     MachineBasicBlock *Epilog = *EI;
void PeelingModuloScheduleExpander::rewriteKernel() {
   KernelRewriter KR(*Schedule.getLoop(), Schedule);
   KR.rewrite();
 }
 
 void PeelingModuloScheduleExpander::expand() {
   BB = Schedule.getLoop()->getTopBlock();
   Preheader = Schedule.getLoop()->getLoopPreheader();
   LLVM_DEBUG(Schedule.dump());
+  Info = TII->analyzeLoopForPipelining(BB);
+  assert(Info);
 
   rewriteKernel();
   peelPrologAndEpilogs();
   fixupBranches();
 }
 
 void PeelingModuloScheduleExpander::validateAgainstModuloScheduleExpander() {
   BB = Schedule.getLoop()->getTopBlock();