This is a follow-up with https://reviews.llvm.org/D68098.
We added straight-forward patten matching for two SVE intrinsics: frecps and frsqrts. We also added patterns for fsub and fmul - these SDNodes directly correspond to machine instructions.
One minor change I'd like to request is to do with the naming convention we have for these...
int_aarch64_sve_frecps_x and int_aarch64_sve_frsqrts_x would be the preferred names. Adding f to the start will match the instruction name, and the _x suffix is to indicate an unpredicated intrinsic.