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Differential D68432

[X86] Add DAG combine to form saturating VTRUNCUS/VTRUNCS from VTRUNC
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Authored by craig.topper on Oct 3 2019, 3:47 PM.

Details

Reviewers
RKSimon
spatel
Commits
rG074fa390d25d: [X86] Add DAG combine to form saturating VTRUNCUS/VTRUNCS from VTRUNC
rL373765: [X86] Add DAG combine to form saturating VTRUNCUS/VTRUNCS from VTRUNC
Summary

We already do this for ISD::TRUNCATE, but we can do the same for X86ISD::VTRUNC

Diff Detail

Event Timeline

craig.topper created this revision.Oct 3 2019, 3:47 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 3 2019, 3:47 PM
Herald added a subscriber: hiraditya. · View Herald Transcript
craig.topper added a parent revision: D68428: [X86] Add custom type legalization for v16i64->v16i8 truncate and v8i64->v8i8 truncate when v8i64 isn't legal.Oct 3 2019, 3:49 PM
RKSimon accepted this revision.Oct 4 2019, 8:55 AM

LGTM

This revision is now accepted and ready to land.Oct 4 2019, 8:55 AM
Closed by commit rL373765: [X86] Add DAG combine to form saturating VTRUNCUS/VTRUNCS from VTRUNC (authored by ctopper). · Explain WhyOct 4 2019, 10:51 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

Diff 223114

llvm/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 41,159 Lines • ▼ Show 20 Linesstatic SDValue combineTruncate(SDNode *N, SelectionDAG &DAG,
// Try to truncate extended sign/zero bits with PACKSS/PACKUS. // Try to truncate extended sign/zero bits with PACKSS/PACKUS.
if (SDValue V = combineVectorSignBitsTruncation(N, DL, DAG, Subtarget)) if (SDValue V = combineVectorSignBitsTruncation(N, DL, DAG, Subtarget))
return V; return V;
return combineVectorTruncation(N, DAG, Subtarget); return combineVectorTruncation(N, DAG, Subtarget);
} }
static SDValue combineVTRUNC(SDNode *N, SelectionDAG &DAG) {
EVT VT = N->getValueType(0);
SDValue In = N->getOperand(0);
SDLoc DL(N);
if (auto SSatVal = detectSSatPattern(In, VT))
return DAG.getNode(X86ISD::VTRUNCS, DL, VT, SSatVal);
if (auto USatVal = detectUSatPattern(In, VT, DAG, DL))
return DAG.getNode(X86ISD::VTRUNCUS, DL, VT, USatVal);
return SDValue();
}
/// Returns the negated value if the node \p N flips sign of FP value. /// Returns the negated value if the node \p N flips sign of FP value.
/// ///
/// FP-negation node may have different forms: FNEG(x), FXOR (x, 0x80000000) /// FP-negation node may have different forms: FNEG(x), FXOR (x, 0x80000000)
/// or FSUB(0, x) /// or FSUB(0, x)
/// AVX512F does not have FXOR, so FNEG is lowered as /// AVX512F does not have FXOR, so FNEG is lowered as
/// (bitcast (xor (bitcast x), (bitcast ConstantFP(0x80000000)))). /// (bitcast (xor (bitcast x), (bitcast ConstantFP(0x80000000)))).
/// In this case we go though all bitcasts. /// In this case we go though all bitcasts.
/// This also recognizes splat of a negated value and returns the splat of that /// This also recognizes splat of a negated value and returns the splat of that
▲ Show 20 Lines • Show All 3,342 Lines • ▼ Show 20 LinesSDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
case ISD::STORE: return combineStore(N, DAG, DCI, Subtarget); case ISD::STORE: return combineStore(N, DAG, DCI, Subtarget);
case ISD::MSTORE: return combineMaskedStore(N, DAG, DCI, Subtarget); case ISD::MSTORE: return combineMaskedStore(N, DAG, DCI, Subtarget);
case ISD::SINT_TO_FP: return combineSIntToFP(N, DAG, DCI, Subtarget); case ISD::SINT_TO_FP: return combineSIntToFP(N, DAG, DCI, Subtarget);
case ISD::UINT_TO_FP: return combineUIntToFP(N, DAG, Subtarget); case ISD::UINT_TO_FP: return combineUIntToFP(N, DAG, Subtarget);
case ISD::FADD: case ISD::FADD:
case ISD::FSUB: return combineFaddFsub(N, DAG, Subtarget); case ISD::FSUB: return combineFaddFsub(N, DAG, Subtarget);
case ISD::FNEG: return combineFneg(N, DAG, Subtarget); case ISD::FNEG: return combineFneg(N, DAG, Subtarget);
case ISD::TRUNCATE: return combineTruncate(N, DAG, Subtarget); case ISD::TRUNCATE: return combineTruncate(N, DAG, Subtarget);
case X86ISD::VTRUNC: return combineVTRUNC(N, DAG);
case X86ISD::ANDNP: return combineAndnp(N, DAG, DCI, Subtarget); case X86ISD::ANDNP: return combineAndnp(N, DAG, DCI, Subtarget);
case X86ISD::FAND: return combineFAnd(N, DAG, Subtarget); case X86ISD::FAND: return combineFAnd(N, DAG, Subtarget);
case X86ISD::FANDN: return combineFAndn(N, DAG, Subtarget); case X86ISD::FANDN: return combineFAndn(N, DAG, Subtarget);
case X86ISD::FXOR: case X86ISD::FXOR:
case X86ISD::FOR: return combineFOr(N, DAG, Subtarget); case X86ISD::FOR: return combineFOr(N, DAG, Subtarget);
case X86ISD::FMIN: case X86ISD::FMIN:
case X86ISD::FMAX: return combineFMinFMax(N, DAG); case X86ISD::FMAX: return combineFMinFMax(N, DAG);
case ISD::FMINNUM: case ISD::FMINNUM:
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llvm/test/CodeGen/X86/avx512-trunc.ll

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; KNL-NEXT: vpbroadcastd {{.*#+}} ymm1 = [255,255,255,255,255,255,255,255] ; KNL-NEXT: vpbroadcastd {{.*#+}} ymm1 = [255,255,255,255,255,255,255,255]
; KNL-NEXT: vpminud %ymm1, %ymm0, %ymm0 ; KNL-NEXT: vpminud %ymm1, %ymm0, %ymm0
; KNL-NEXT: vpmovdb %zmm0, %xmm0 ; KNL-NEXT: vpmovdb %zmm0, %xmm0
; KNL-NEXT: vzeroupper ; KNL-NEXT: vzeroupper
; KNL-NEXT: retq ; KNL-NEXT: retq
; ;
; SKX-LABEL: usat_trunc_db_256: ; SKX-LABEL: usat_trunc_db_256:
; SKX: ## %bb.0: ; SKX: ## %bb.0:
; SKX-NEXT: vpminud {{.*}}(%rip){1to8}, %ymm0, %ymm0 ; SKX-NEXT: vpmovusdb %ymm0, %xmm0
; SKX-NEXT: vpmovdb %ymm0, %xmm0
; SKX-NEXT: vzeroupper ; SKX-NEXT: vzeroupper
; SKX-NEXT: retq ; SKX-NEXT: retq
%tmp1 = icmp ult <8 x i32> %x, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255> %tmp1 = icmp ult <8 x i32> %x, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%tmp2 = select <8 x i1> %tmp1, <8 x i32> %x, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255> %tmp2 = select <8 x i1> %tmp1, <8 x i32> %x, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%tmp3 = trunc <8 x i32> %tmp2 to <8 x i8> %tmp3 = trunc <8 x i32> %tmp2 to <8 x i8>
%tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
ret <16 x i8> %tmp4 ret <16 x i8> %tmp4
} }
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llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 1,426 Lines • ▼ Show 20 Lines
; AVX2-NEXT: vpextrb $7, %xmm0, 7(%rdi) ; AVX2-NEXT: vpextrb $7, %xmm0, 7(%rdi)
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512F-LABEL: truncstore_v8i64_v8i8: ; AVX512F-LABEL: truncstore_v8i64_v8i8:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
; AVX512F-NEXT: vptestmd %zmm1, %zmm1, %k0 ; AVX512F-NEXT: vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT: vpminsq {{.*}}(%rip){1to8}, %zmm0, %zmm0 ; AVX512F-NEXT: vpmovsqb %zmm0, %xmm0
; AVX512F-NEXT: vpmaxsq {{.*}}(%rip){1to8}, %zmm0, %zmm0
; AVX512F-NEXT: vpmovqb %zmm0, %xmm0
; AVX512F-NEXT: kmovw %k0, %eax ; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: testb $1, %al ; AVX512F-NEXT: testb $1, %al
; AVX512F-NEXT: jne .LBB2_1 ; AVX512F-NEXT: jne .LBB2_1
; AVX512F-NEXT: # %bb.2: # %else ; AVX512F-NEXT: # %bb.2: # %else
; AVX512F-NEXT: testb $2, %al ; AVX512F-NEXT: testb $2, %al
; AVX512F-NEXT: jne .LBB2_3 ; AVX512F-NEXT: jne .LBB2_3
; AVX512F-NEXT: .LBB2_4: # %else2 ; AVX512F-NEXT: .LBB2_4: # %else2
; AVX512F-NEXT: testb $4, %al ; AVX512F-NEXT: testb $4, %al
▲ Show 20 Lines • Show All 6,196 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/masked_store_trunc_usat.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 1,209 Lines • ▼ Show 20 Lines
; AVX2-NEXT: vpextrb $7, %xmm0, 7(%rdi) ; AVX2-NEXT: vpextrb $7, %xmm0, 7(%rdi)
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512F-LABEL: truncstore_v8i64_v8i8: ; AVX512F-LABEL: truncstore_v8i64_v8i8:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1
; AVX512F-NEXT: vptestmd %zmm1, %zmm1, %k0 ; AVX512F-NEXT: vptestmd %zmm1, %zmm1, %k0
; AVX512F-NEXT: vpminuq {{.*}}(%rip){1to8}, %zmm0, %zmm0 ; AVX512F-NEXT: vpmovusqb %zmm0, %xmm0
; AVX512F-NEXT: vpmovqb %zmm0, %xmm0
; AVX512F-NEXT: kmovw %k0, %eax ; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: testb $1, %al ; AVX512F-NEXT: testb $1, %al
; AVX512F-NEXT: jne .LBB2_1 ; AVX512F-NEXT: jne .LBB2_1
; AVX512F-NEXT: # %bb.2: # %else ; AVX512F-NEXT: # %bb.2: # %else
; AVX512F-NEXT: testb $2, %al ; AVX512F-NEXT: testb $2, %al
; AVX512F-NEXT: jne .LBB2_3 ; AVX512F-NEXT: jne .LBB2_3
; AVX512F-NEXT: .LBB2_4: # %else2 ; AVX512F-NEXT: .LBB2_4: # %else2
; AVX512F-NEXT: testb $4, %al ; AVX512F-NEXT: testb $4, %al
▲ Show 20 Lines • Show All 6,181 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/vector-trunc-packus.ll

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; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 ; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] ; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3] ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: trunc_packus_v8i64_v8i8: ; AVX512-LABEL: trunc_packus_v8i64_v8i8:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpminsq {{.*}}(%rip){1to8}, %zmm0, %zmm0
; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0 ; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
; AVX512-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512-NEXT: vpmovusqb %zmm0, %xmm0
; AVX512-NEXT: vzeroupper ; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq ; AVX512-NEXT: retq
%1 = icmp slt <8 x i64> %a0, <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255> %1 = icmp slt <8 x i64> %a0, <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255>
%2 = select <8 x i1> %1, <8 x i64> %a0, <8 x i64> <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255> %2 = select <8 x i1> %1, <8 x i64> %a0, <8 x i64> <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255>
%3 = icmp sgt <8 x i64> %2, zeroinitializer %3 = icmp sgt <8 x i64> %2, zeroinitializer
%4 = select <8 x i1> %3, <8 x i64> %2, <8 x i64> zeroinitializer %4 = select <8 x i1> %3, <8 x i64> %2, <8 x i64> zeroinitializer
%5 = trunc <8 x i64> %4 to <8 x i8> %5 = trunc <8 x i64> %4 to <8 x i8>
ret <8 x i8> %5 ret <8 x i8> %5
▲ Show 20 Lines • Show All 1,072 Lines • ▼ Show 20 Lines
; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 ; AVX512F-NEXT: vpmovqd %zmm1, %ymm1
; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_packus_v16i64_v16i8: ; AVX512VL-LABEL: trunc_packus_v16i64_v16i8:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [255,255,255,255,255,255,255,255]
; AVX512VL-NEXT: vpminsq %zmm2, %zmm1, %zmm1
; AVX512VL-NEXT: vpminsq %zmm2, %zmm0, %zmm0
; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512VL-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0
; AVX512VL-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1 ; AVX512VL-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1
; AVX512VL-NEXT: vpmovqb %zmm1, %xmm1 ; AVX512VL-NEXT: vpmovusqb %zmm1, %xmm1
; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512VL-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0
; AVX512VL-NEXT: vpmovusqb %zmm0, %xmm0
; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_packus_v16i64_v16i8: ; AVX512BW-LABEL: trunc_packus_v16i64_v16i8:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [255,255,255,255,255,255,255,255] ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [255,255,255,255,255,255,255,255]
; AVX512BW-NEXT: vpminsq %zmm2, %zmm0, %zmm0 ; AVX512BW-NEXT: vpminsq %zmm2, %zmm0, %zmm0
; AVX512BW-NEXT: vpminsq %zmm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vpminsq %zmm2, %zmm1, %zmm1
; AVX512BW-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX512BW-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512BW-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1
; AVX512BW-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0 ; AVX512BW-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 ; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 ; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1
; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512BWVL-LABEL: trunc_packus_v16i64_v16i8: ; AVX512BWVL-LABEL: trunc_packus_v16i64_v16i8:
; AVX512BWVL: # %bb.0: ; AVX512BWVL: # %bb.0:
; AVX512BWVL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [255,255,255,255,255,255,255,255]
; AVX512BWVL-NEXT: vpminsq %zmm2, %zmm1, %zmm1
; AVX512BWVL-NEXT: vpminsq %zmm2, %zmm0, %zmm0
; AVX512BWVL-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX512BWVL-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512BWVL-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0
; AVX512BWVL-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1 ; AVX512BWVL-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1
; AVX512BWVL-NEXT: vpmovqb %zmm1, %xmm1 ; AVX512BWVL-NEXT: vpmovusqb %zmm1, %xmm1
; AVX512BWVL-NEXT: vpmovqb %zmm0, %xmm0 ; AVX512BWVL-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0
; AVX512BWVL-NEXT: vpmovusqb %zmm0, %xmm0
; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: vzeroupper
; AVX512BWVL-NEXT: retq ; AVX512BWVL-NEXT: retq
%1 = icmp slt <16 x i64> %a0, <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255> %1 = icmp slt <16 x i64> %a0, <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255>
%2 = select <16 x i1> %1, <16 x i64> %a0, <16 x i64> <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255> %2 = select <16 x i1> %1, <16 x i64> %a0, <16 x i64> <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255>
%3 = icmp sgt <16 x i64> %2, zeroinitializer %3 = icmp sgt <16 x i64> %2, zeroinitializer
%4 = select <16 x i1> %3, <16 x i64> %2, <16 x i64> zeroinitializer %4 = select <16 x i1> %3, <16 x i64> %2, <16 x i64> zeroinitializer
%5 = trunc <16 x i64> %4 to <16 x i8> %5 = trunc <16 x i64> %4 to <16 x i8>
Show All 30 Lines
; AVX512F-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX512F-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512F-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_packus_v8i32_v8i8: ; AVX512VL-LABEL: trunc_packus_v8i32_v8i8:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpminsd {{.*}}(%rip){1to8}, %ymm0, %ymm0
; AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX512VL-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX512VL-NEXT: vpmovdb %ymm0, %xmm0 ; AVX512VL-NEXT: vpmovusdb %ymm0, %xmm0
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_packus_v8i32_v8i8: ; AVX512BW-LABEL: trunc_packus_v8i32_v8i8:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [255,255,255,255,255,255,255,255] ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [255,255,255,255,255,255,255,255]
; AVX512BW-NEXT: vpminsd %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: vpminsd %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512BW-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512BWVL-LABEL: trunc_packus_v8i32_v8i8: ; AVX512BWVL-LABEL: trunc_packus_v8i32_v8i8:
; AVX512BWVL: # %bb.0: ; AVX512BWVL: # %bb.0:
; AVX512BWVL-NEXT: vpminsd {{.*}}(%rip){1to8}, %ymm0, %ymm0
; AVX512BWVL-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX512BWVL-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512BWVL-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX512BWVL-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX512BWVL-NEXT: vpmovdb %ymm0, %xmm0 ; AVX512BWVL-NEXT: vpmovusdb %ymm0, %xmm0
; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: vzeroupper
; AVX512BWVL-NEXT: retq ; AVX512BWVL-NEXT: retq
%1 = icmp slt <8 x i32> %a0, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255> %1 = icmp slt <8 x i32> %a0, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%2 = select <8 x i1> %1, <8 x i32> %a0, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255> %2 = select <8 x i1> %1, <8 x i32> %a0, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%3 = icmp sgt <8 x i32> %2, zeroinitializer %3 = icmp sgt <8 x i32> %2, zeroinitializer
%4 = select <8 x i1> %3, <8 x i32> %2, <8 x i32> zeroinitializer %4 = select <8 x i1> %3, <8 x i32> %2, <8 x i32> zeroinitializer
%5 = trunc <8 x i32> %4 to <8 x i8> %5 = trunc <8 x i32> %4 to <8 x i8>
ret <8 x i8> %5 ret <8 x i8> %5
▲ Show 20 Lines • Show All 232 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/vector-trunc-ssat.ll

Show First 20 Lines • Show All 1,561 Lines • ▼ Show 20 Lines
; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 ; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] ; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3] ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: trunc_ssat_v8i64_v8i8: ; AVX512-LABEL: trunc_ssat_v8i64_v8i8:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpminsq {{.*}}(%rip){1to8}, %zmm0, %zmm0 ; AVX512-NEXT: vpmovsqb %zmm0, %xmm0
; AVX512-NEXT: vpmaxsq {{.*}}(%rip){1to8}, %zmm0, %zmm0
; AVX512-NEXT: vpmovqb %zmm0, %xmm0
; AVX512-NEXT: vzeroupper ; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq ; AVX512-NEXT: retq
%1 = icmp slt <8 x i64> %a0, <i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127> %1 = icmp slt <8 x i64> %a0, <i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127>
%2 = select <8 x i1> %1, <8 x i64> %a0, <8 x i64> <i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127> %2 = select <8 x i1> %1, <8 x i64> %a0, <8 x i64> <i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127>
%3 = icmp sgt <8 x i64> %2, <i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128> %3 = icmp sgt <8 x i64> %2, <i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128>
%4 = select <8 x i1> %3, <8 x i64> %2, <8 x i64> <i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128> %4 = select <8 x i1> %3, <8 x i64> %2, <8 x i64> <i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128>
%5 = trunc <8 x i64> %4 to <8 x i8> %5 = trunc <8 x i64> %4 to <8 x i8>
ret <8 x i8> %5 ret <8 x i8> %5
▲ Show 20 Lines • Show All 1,150 Lines • ▼ Show 20 Lines
; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 ; AVX512F-NEXT: vpmovqd %zmm1, %ymm1
; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_ssat_v16i64_v16i8: ; AVX512VL-LABEL: trunc_ssat_v16i64_v16i8:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [127,127,127,127,127,127,127,127] ; AVX512VL-NEXT: vpmovsqb %zmm1, %xmm1
; AVX512VL-NEXT: vpminsq %zmm2, %zmm1, %zmm1 ; AVX512VL-NEXT: vpmovsqb %zmm0, %xmm0
; AVX512VL-NEXT: vpminsq %zmm2, %zmm0, %zmm0
; AVX512VL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488]
; AVX512VL-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0
; AVX512VL-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1
; AVX512VL-NEXT: vpmovqb %zmm1, %xmm1
; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0
; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_ssat_v16i64_v16i8: ; AVX512BW-LABEL: trunc_ssat_v16i64_v16i8:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [127,127,127,127,127,127,127,127] ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [127,127,127,127,127,127,127,127]
; AVX512BW-NEXT: vpminsq %zmm2, %zmm0, %zmm0 ; AVX512BW-NEXT: vpminsq %zmm2, %zmm0, %zmm0
; AVX512BW-NEXT: vpminsq %zmm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vpminsq %zmm2, %zmm1, %zmm1
; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488] ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488]
; AVX512BW-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1
; AVX512BW-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0 ; AVX512BW-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 ; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 ; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1
; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512BWVL-LABEL: trunc_ssat_v16i64_v16i8: ; AVX512BWVL-LABEL: trunc_ssat_v16i64_v16i8:
; AVX512BWVL: # %bb.0: ; AVX512BWVL: # %bb.0:
; AVX512BWVL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [127,127,127,127,127,127,127,127] ; AVX512BWVL-NEXT: vpmovsqb %zmm1, %xmm1
; AVX512BWVL-NEXT: vpminsq %zmm2, %zmm1, %zmm1 ; AVX512BWVL-NEXT: vpmovsqb %zmm0, %xmm0
; AVX512BWVL-NEXT: vpminsq %zmm2, %zmm0, %zmm0
; AVX512BWVL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488,18446744073709551488]
; AVX512BWVL-NEXT: vpmaxsq %zmm2, %zmm0, %zmm0
; AVX512BWVL-NEXT: vpmaxsq %zmm2, %zmm1, %zmm1
; AVX512BWVL-NEXT: vpmovqb %zmm1, %xmm1
; AVX512BWVL-NEXT: vpmovqb %zmm0, %xmm0
; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: vzeroupper
; AVX512BWVL-NEXT: retq ; AVX512BWVL-NEXT: retq
%1 = icmp slt <16 x i64> %a0, <i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127> %1 = icmp slt <16 x i64> %a0, <i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127>
%2 = select <16 x i1> %1, <16 x i64> %a0, <16 x i64> <i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127> %2 = select <16 x i1> %1, <16 x i64> %a0, <16 x i64> <i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127, i64 127>
%3 = icmp sgt <16 x i64> %2, <i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128> %3 = icmp sgt <16 x i64> %2, <i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128>
%4 = select <16 x i1> %3, <16 x i64> %2, <16 x i64> <i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128> %4 = select <16 x i1> %3, <16 x i64> %2, <16 x i64> <i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128, i64 -128>
%5 = trunc <16 x i64> %4 to <16 x i8> %5 = trunc <16 x i64> %4 to <16 x i8>
Show All 30 Lines
; AVX512F-NEXT: vpbroadcastd {{.*#+}} ymm1 = [4294967168,4294967168,4294967168,4294967168,4294967168,4294967168,4294967168,4294967168] ; AVX512F-NEXT: vpbroadcastd {{.*#+}} ymm1 = [4294967168,4294967168,4294967168,4294967168,4294967168,4294967168,4294967168,4294967168]
; AVX512F-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_ssat_v8i32_v8i8: ; AVX512VL-LABEL: trunc_ssat_v8i32_v8i8:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpminsd {{.*}}(%rip){1to8}, %ymm0, %ymm0 ; AVX512VL-NEXT: vpmovsdb %ymm0, %xmm0
; AVX512VL-NEXT: vpmaxsd {{.*}}(%rip){1to8}, %ymm0, %ymm0
; AVX512VL-NEXT: vpmovdb %ymm0, %xmm0
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_ssat_v8i32_v8i8: ; AVX512BW-LABEL: trunc_ssat_v8i32_v8i8:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [127,127,127,127,127,127,127,127] ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [127,127,127,127,127,127,127,127]
; AVX512BW-NEXT: vpminsd %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: vpminsd %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [4294967168,4294967168,4294967168,4294967168,4294967168,4294967168,4294967168,4294967168] ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [4294967168,4294967168,4294967168,4294967168,4294967168,4294967168,4294967168,4294967168]
; AVX512BW-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512BWVL-LABEL: trunc_ssat_v8i32_v8i8: ; AVX512BWVL-LABEL: trunc_ssat_v8i32_v8i8:
; AVX512BWVL: # %bb.0: ; AVX512BWVL: # %bb.0:
; AVX512BWVL-NEXT: vpminsd {{.*}}(%rip){1to8}, %ymm0, %ymm0 ; AVX512BWVL-NEXT: vpmovsdb %ymm0, %xmm0
; AVX512BWVL-NEXT: vpmaxsd {{.*}}(%rip){1to8}, %ymm0, %ymm0
; AVX512BWVL-NEXT: vpmovdb %ymm0, %xmm0
; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: vzeroupper
; AVX512BWVL-NEXT: retq ; AVX512BWVL-NEXT: retq
%1 = icmp slt <8 x i32> %a0, <i32 127, i32 127, i32 127, i32 127, i32 127, i32 127, i32 127, i32 127> %1 = icmp slt <8 x i32> %a0, <i32 127, i32 127, i32 127, i32 127, i32 127, i32 127, i32 127, i32 127>
%2 = select <8 x i1> %1, <8 x i32> %a0, <8 x i32> <i32 127, i32 127, i32 127, i32 127, i32 127, i32 127, i32 127, i32 127> %2 = select <8 x i1> %1, <8 x i32> %a0, <8 x i32> <i32 127, i32 127, i32 127, i32 127, i32 127, i32 127, i32 127, i32 127>
%3 = icmp sgt <8 x i32> %2, <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128> %3 = icmp sgt <8 x i32> %2, <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128>
%4 = select <8 x i1> %3, <8 x i32> %2, <8 x i32> <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128> %4 = select <8 x i1> %3, <8 x i32> %2, <8 x i32> <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128>
%5 = trunc <8 x i32> %4 to <8 x i8> %5 = trunc <8 x i32> %4 to <8 x i8>
ret <8 x i8> %5 ret <8 x i8> %5
▲ Show 20 Lines • Show All 219 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/vector-trunc-usat.ll

Show First 20 Lines • Show All 1,169 Lines • ▼ Show 20 Lines
; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 ; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] ; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3] ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512-LABEL: trunc_usat_v8i64_v8i8: ; AVX512-LABEL: trunc_usat_v8i64_v8i8:
; AVX512: # %bb.0: ; AVX512: # %bb.0:
; AVX512-NEXT: vpminuq {{.*}}(%rip){1to8}, %zmm0, %zmm0 ; AVX512-NEXT: vpmovusqb %zmm0, %xmm0
; AVX512-NEXT: vpmovqb %zmm0, %xmm0
; AVX512-NEXT: vzeroupper ; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq ; AVX512-NEXT: retq
%1 = icmp ult <8 x i64> %a0, <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255> %1 = icmp ult <8 x i64> %a0, <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255>
%2 = select <8 x i1> %1, <8 x i64> %a0, <8 x i64> <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255> %2 = select <8 x i1> %1, <8 x i64> %a0, <8 x i64> <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255>
%3 = trunc <8 x i64> %2 to <8 x i8> %3 = trunc <8 x i64> %2 to <8 x i8>
ret <8 x i8> %3 ret <8 x i8> %3
} }
▲ Show 20 Lines • Show All 664 Lines • ▼ Show 20 Lines
; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 ; AVX512F-NEXT: vpmovqd %zmm1, %ymm1
; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_usat_v16i64_v16i8: ; AVX512VL-LABEL: trunc_usat_v16i64_v16i8:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [255,255,255,255,255,255,255,255] ; AVX512VL-NEXT: vpmovusqb %zmm1, %xmm1
; AVX512VL-NEXT: vpminuq %zmm2, %zmm0, %zmm0 ; AVX512VL-NEXT: vpmovusqb %zmm0, %xmm0
; AVX512VL-NEXT: vpminuq %zmm2, %zmm1, %zmm1
; AVX512VL-NEXT: vpmovqb %zmm1, %xmm1
; AVX512VL-NEXT: vpmovqb %zmm0, %xmm0
; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_usat_v16i64_v16i8: ; AVX512BW-LABEL: trunc_usat_v16i64_v16i8:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [255,255,255,255,255,255,255,255] ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm2 = [255,255,255,255,255,255,255,255]
; AVX512BW-NEXT: vpminuq %zmm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vpminuq %zmm2, %zmm1, %zmm1
; AVX512BW-NEXT: vpminuq %zmm2, %zmm0, %zmm0 ; AVX512BW-NEXT: vpminuq %zmm2, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 ; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 ; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1
; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512BWVL-LABEL: trunc_usat_v16i64_v16i8: ; AVX512BWVL-LABEL: trunc_usat_v16i64_v16i8:
; AVX512BWVL: # %bb.0: ; AVX512BWVL: # %bb.0:
; AVX512BWVL-NEXT: vpbroadcastq {{.*#+}} zmm2 = [255,255,255,255,255,255,255,255] ; AVX512BWVL-NEXT: vpmovusqb %zmm1, %xmm1
; AVX512BWVL-NEXT: vpminuq %zmm2, %zmm0, %zmm0 ; AVX512BWVL-NEXT: vpmovusqb %zmm0, %xmm0
; AVX512BWVL-NEXT: vpminuq %zmm2, %zmm1, %zmm1
; AVX512BWVL-NEXT: vpmovqb %zmm1, %xmm1
; AVX512BWVL-NEXT: vpmovqb %zmm0, %xmm0
; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: vzeroupper
; AVX512BWVL-NEXT: retq ; AVX512BWVL-NEXT: retq
%1 = icmp ult <16 x i64> %a0, <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255> %1 = icmp ult <16 x i64> %a0, <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255>
%2 = select <16 x i1> %1, <16 x i64> %a0, <16 x i64> <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255> %2 = select <16 x i1> %1, <16 x i64> %a0, <16 x i64> <i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255, i64 255>
%3 = trunc <16 x i64> %2 to <16 x i8> %3 = trunc <16 x i64> %2 to <16 x i8>
ret <16 x i8> %3 ret <16 x i8> %3
} }
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; AVX512F-NEXT: vpbroadcastd {{.*#+}} ymm1 = [255,255,255,255,255,255,255,255] ; AVX512F-NEXT: vpbroadcastd {{.*#+}} ymm1 = [255,255,255,255,255,255,255,255]
; AVX512F-NEXT: vpminud %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: vpminud %ymm1, %ymm0, %ymm0
; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_usat_v8i32_v8i8: ; AVX512VL-LABEL: trunc_usat_v8i32_v8i8:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpminud {{.*}}(%rip){1to8}, %ymm0, %ymm0 ; AVX512VL-NEXT: vpmovusdb %ymm0, %xmm0
; AVX512VL-NEXT: vpmovdb %ymm0, %xmm0
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_usat_v8i32_v8i8: ; AVX512BW-LABEL: trunc_usat_v8i32_v8i8:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [255,255,255,255,255,255,255,255] ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm1 = [255,255,255,255,255,255,255,255]
; AVX512BW-NEXT: vpminud %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: vpminud %ymm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512BWVL-LABEL: trunc_usat_v8i32_v8i8: ; AVX512BWVL-LABEL: trunc_usat_v8i32_v8i8:
; AVX512BWVL: # %bb.0: ; AVX512BWVL: # %bb.0:
; AVX512BWVL-NEXT: vpminud {{.*}}(%rip){1to8}, %ymm0, %ymm0 ; AVX512BWVL-NEXT: vpmovusdb %ymm0, %xmm0
; AVX512BWVL-NEXT: vpmovdb %ymm0, %xmm0
; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: vzeroupper
; AVX512BWVL-NEXT: retq ; AVX512BWVL-NEXT: retq
%1 = icmp ult <8 x i32> %a0, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255> %1 = icmp ult <8 x i32> %a0, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%2 = select <8 x i1> %1, <8 x i32> %a0, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255> %2 = select <8 x i1> %1, <8 x i32> %a0, <8 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%3 = trunc <8 x i32> %2 to <8 x i8> %3 = trunc <8 x i32> %2 to <8 x i8>
ret <8 x i8> %3 ret <8 x i8> %3
} }
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