[llvm-exegesis][NFC] Refactor X86 tests fixtures into a base class.

[gchatelet]

Thx for working on this!

llvm/trunk/unittests/tools/llvm-exegesis/X86/RegisterAliasingTest.cpp

 //===-- RegisterAliasingTest.cpp --------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 
 #include "RegisterAliasing.h"
 
 #include <cassert>
 #include <memory>
 
+#include "TestBase.h"
 #include "X86InstrInfo.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/TargetSelect.h"
 #include "gmock/gmock.h"
 #include "gtest/gtest.h"
 
 namespace llvm {
 namespace exegesis {
 namespace {
 
-class RegisterAliasingTest : public ::testing::Test {
-protected:
-  RegisterAliasingTest() {
-    const std::string TT = "x86_64-unknown-linux";
-    std::string error;
-    const llvm::Target *const TheTarget =
-        llvm::TargetRegistry::lookupTarget(TT, error);
-    if (!TheTarget) {
-      llvm::errs() << error << "\n";
-      return;
-    }
-    MCRegInfo.reset(TheTarget->createMCRegInfo(TT));
-  }
-
-  static void SetUpTestCase() {
-    LLVMInitializeX86TargetInfo();
-    LLVMInitializeX86Target();
-    LLVMInitializeX86TargetMC();
-  }
-
-  const llvm::MCRegisterInfo &getMCRegInfo() {
-    assert(MCRegInfo);
-    return *MCRegInfo;
-  }
-
-private:
-  std::unique_ptr<const llvm::MCRegisterInfo> MCRegInfo;
-};
+class RegisterAliasingTest : public X86TestBase {};
 
 TEST_F(RegisterAliasingTest, TrackSimpleRegister) {
-  const auto &RegInfo = getMCRegInfo();
+  const auto &RegInfo = State.getRegInfo();
   const RegisterAliasingTracker tracker(RegInfo, llvm::X86::EAX);
   std::set<llvm::MCPhysReg> ActualAliasedRegisters;
   for (unsigned I : tracker.aliasedBits().set_bits())
     ActualAliasedRegisters.insert(static_cast<llvm::MCPhysReg>(I));
   const std::set<llvm::MCPhysReg> ExpectedAliasedRegisters = {
       llvm::X86::AL,  llvm::X86::AH,  llvm::X86::AX,
       llvm::X86::EAX, llvm::X86::HAX, llvm::X86::RAX};
   ASSERT_THAT(ActualAliasedRegisters, ExpectedAliasedRegisters);
   for (llvm::MCPhysReg aliased : ExpectedAliasedRegisters) {
     ASSERT_THAT(tracker.getOrigin(aliased), llvm::X86::EAX);
   }
 }
 
 TEST_F(RegisterAliasingTest, TrackRegisterClass) {
   // The alias bits for GR8_ABCD_LRegClassID are the union of the alias bits for
   // AL, BL, CL and DL.
-  const auto &RegInfo = getMCRegInfo();
+  const auto &RegInfo = State.getRegInfo();
   const llvm::BitVector NoReservedReg(RegInfo.getNumRegs());
 
   const RegisterAliasingTracker RegClassTracker(
       RegInfo, NoReservedReg,
       RegInfo.getRegClass(llvm::X86::GR8_ABCD_LRegClassID));
 
   llvm::BitVector sum(RegInfo.getNumRegs());
   sum |= RegisterAliasingTracker(RegInfo, llvm::X86::AL).aliasedBits();
   sum |= RegisterAliasingTracker(RegInfo, llvm::X86::BL).aliasedBits();
   sum |= RegisterAliasingTracker(RegInfo, llvm::X86::CL).aliasedBits();
   sum |= RegisterAliasingTracker(RegInfo, llvm::X86::DL).aliasedBits();
 
   ASSERT_THAT(RegClassTracker.aliasedBits(), sum);
 }
 
 TEST_F(RegisterAliasingTest, TrackRegisterClassCache) {
   // Fetching twice the same tracker yields the same pointers.
-  const auto &RegInfo = getMCRegInfo();
+  const auto &RegInfo = State.getRegInfo();
   const llvm::BitVector NoReservedReg(RegInfo.getNumRegs());
   RegisterAliasingTrackerCache Cache(RegInfo, NoReservedReg);
   ASSERT_THAT(&Cache.getRegister(llvm::X86::AX),
               &Cache.getRegister(llvm::X86::AX));
 
   ASSERT_THAT(&Cache.getRegisterClass(llvm::X86::GR8_ABCD_LRegClassID),
               &Cache.getRegisterClass(llvm::X86::GR8_ABCD_LRegClassID));
 }
 
 } // namespace
 } // namespace exegesis
 } // namespace llvm

llvm/trunk/unittests/tools/llvm-exegesis/X86/SchedClassResolutionTest.cpp

 //===-- SchedClassResolutionTest.cpp ----------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "SchedClassResolution.h"
 
 #include <cassert>
 #include <memory>
 
+#include "TestBase.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/TargetSelect.h"
 #include "gmock/gmock.h"
 #include "gtest/gtest.h"
 
 namespace llvm {
 namespace exegesis {
 namespace {
 
 using testing::Pair;
 using testing::UnorderedElementsAre;
 
-class SchedClassResolutionTest : public ::testing::Test {
+class SchedClassResolutionTest : public X86TestBase {
 protected:
-  SchedClassResolutionTest() {
-    const std::string TT = "x86_64-unknown-linux";
-    std::string error;
-    const llvm::Target *const TheTarget =
-        llvm::TargetRegistry::lookupTarget(TT, error);
-    if (!TheTarget) {
-      llvm::errs() << error << "\n";
-      return;
-    }
-    STI.reset(TheTarget->createMCSubtargetInfo(TT, "haswell", ""));
-
+  SchedClassResolutionTest() : STI(State.getSubtargetInfo()) {
     // Compute the ProxResIdx of ports uses in tests.
-    const auto &SM = STI->getSchedModel();
+    const auto &SM = STI.getSchedModel();
     for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
       const std::string Name = SM.getProcResource(I)->Name;
       if (Name == "HWPort0") {
         P0Idx = I;
       } else if (Name == "HWPort1") {
         P1Idx = I;
       } else if (Name == "HWPort5") {
         P5Idx = I;
       } else if (Name == "HWPort6") {
         P6Idx = I;
       } else if (Name == "HWPort05") {
         P05Idx = I;
       } else if (Name == "HWPort0156") {
         P0156Idx = I;
       }
     }
     EXPECT_NE(P0Idx, 0);
     EXPECT_NE(P1Idx, 0);
     EXPECT_NE(P5Idx, 0);
     EXPECT_NE(P6Idx, 0);
     EXPECT_NE(P05Idx, 0);
     EXPECT_NE(P0156Idx, 0);
   }
 
-  static void SetUpTestCase() {
-    LLVMInitializeX86TargetInfo();
-    LLVMInitializeX86Target();
-    LLVMInitializeX86TargetMC();
-  }
-
 protected:
-  std::unique_ptr<const llvm::MCSubtargetInfo> STI;
+  const llvm::MCSubtargetInfo &STI;
   uint16_t P0Idx = 0;
   uint16_t P1Idx = 0;
   uint16_t P5Idx = 0;
   uint16_t P6Idx = 0;
   uint16_t P05Idx = 0;
   uint16_t P0156Idx = 0;
 };
 
 TEST_F(SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P0) {
   const auto Pressure =
-      computeIdealizedProcResPressure(STI->getSchedModel(), {{P0Idx, 2}});
+      computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2}});
   EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(P0Idx, 2.0)));
 }
 
 TEST_F(SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05) {
   const auto Pressure =
-      computeIdealizedProcResPressure(STI->getSchedModel(), {{P05Idx, 2}});
+      computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P5Idx, 1.0)));
 }
 
 TEST_F(SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156) {
   const auto Pressure = computeIdealizedProcResPressure(
-      STI->getSchedModel(), {{P05Idx, 2}, {P0156Idx, 2}});
+      STI.getSchedModel(), {{P05Idx, 2}, {P0156Idx, 2}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
                                    Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
 }
 
 TEST_F(SchedClassResolutionTest,
        ComputeIdealizedProcResPressure_1P1_1P05_2P0156) {
   const auto Pressure = computeIdealizedProcResPressure(
-      STI->getSchedModel(), {{P1Idx, 1}, {P05Idx, 1}, {P0156Idx, 2}});
+      STI.getSchedModel(), {{P1Idx, 1}, {P05Idx, 1}, {P0156Idx, 2}});
   EXPECT_THAT(Pressure,
               UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
                                    Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
 }
 
 } // namespace
 } // namespace exegesis
 } // namespace llvm

llvm/trunk/unittests/tools/llvm-exegesis/X86/SnippetFileTest.cpp

 //===-- SnippetFileTest.cpp -------------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "SnippetFile.h"
 
 #include "LlvmState.h"
+#include "TestBase.h"
 #include "X86InstrInfo.h"
 #include "llvm/Support/Error.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/raw_ostream.h"
 #include "gmock/gmock.h"
 #include "gtest/gtest.h"
 
 namespace llvm {
 namespace exegesis {
 
 void InitializeX86ExegesisTarget();
 
 namespace {
 
 using testing::AllOf;
 using testing::ElementsAre;
 using testing::Eq;
 using testing::Field;
 using testing::Property;
 using testing::SizeIs;
 
-class X86SnippetFileTest : public ::testing::Test {
+class X86SnippetFileTest : public X86TestBase {
 protected:
-  X86SnippetFileTest() : State("x86_64-unknown-linux", "haswell") {}
-
-  static void SetUpTestCase() {
-    LLVMInitializeX86TargetInfo();
-    LLVMInitializeX86TargetMC();
-    LLVMInitializeX86Target();
-    LLVMInitializeX86AsmPrinter();
-    LLVMInitializeX86AsmParser();
-    InitializeX86ExegesisTarget();
-  }
-
   Expected<std::vector<BenchmarkCode>> TestCommon(StringRef Contents) {
     SmallString<64> Filename;
     std::error_code EC;
     EC = sys::fs::createUniqueDirectory("SnippetFileTestDir", Filename);
     EXPECT_FALSE(EC);
     sys::path::append(Filename, "snippet.s");
     errs() << Filename << "-------\n";
     {
       raw_fd_ostream FOS(Filename, EC);
       FOS << Contents;
       EXPECT_FALSE(EC);
     }
     return readSnippets(State, Filename);
   }
-
-  const LLVMState State;
 };
 
 // FIXME: Refactor these to ../Common/Matchers.h
 static auto HasOpcode = [](unsigned Opcode) {
   return Property(&MCInst::getOpcode, Eq(Opcode));
 };
 
 MATCHER_P2(RegisterInitialValueIs, Reg, Val, "") {

llvm/trunk/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp

 //===-- SnippetGeneratorTest.cpp --------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "../Common/AssemblerUtils.h"
 #include "Latency.h"
 #include "LlvmState.h"
 #include "MCInstrDescView.h"
 #include "RegisterAliasing.h"
+#include "TestBase.h"
 #include "Uops.h"
 #include "X86InstrInfo.h"
 
 #include <unordered_set>
 
 namespace llvm {
 namespace exegesis {
 
 void InitializeX86ExegesisTarget();
 
 namespace {
 
 using testing::AnyOf;
 using testing::ElementsAre;
 using testing::Gt;
 using testing::HasSubstr;
 using testing::Not;
 using testing::SizeIs;
 using testing::UnorderedElementsAre;
 
 MATCHER(IsInvalid, "") { return !arg.isValid(); }
 MATCHER(IsReg, "") { return arg.isReg(); }
 
-class X86SnippetGeneratorTest : public ::testing::Test {
+class X86SnippetGeneratorTest : public X86TestBase {
 protected:
-  X86SnippetGeneratorTest()
-      : State("x86_64-unknown-linux", "haswell"),
-        MCInstrInfo(State.getInstrInfo()), MCRegisterInfo(State.getRegInfo()) {}
-
-  static void SetUpTestCase() {
-    LLVMInitializeX86TargetInfo();
-    LLVMInitializeX86TargetMC();
-    LLVMInitializeX86Target();
-    LLVMInitializeX86AsmPrinter();
-    InitializeX86ExegesisTarget();
-  }
+  X86SnippetGeneratorTest() : InstrInfo(State.getInstrInfo()) {}
 
-  const LLVMState State;
-  const llvm::MCInstrInfo &MCInstrInfo;
-  const llvm::MCRegisterInfo &MCRegisterInfo;
+  const llvm::MCInstrInfo &InstrInfo;
 };
 
 template <typename SnippetGeneratorT>
 class SnippetGeneratorTest : public X86SnippetGeneratorTest {
 protected:
   SnippetGeneratorTest() : Generator(State) {}
 
   std::vector<CodeTemplate> checkAndGetCodeTemplates(unsigned Opcode) {
TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependencyThroughImplicitReg) {
   // - Op1 Implicit Def Reg(AX)
   // - Op2 Implicit Def Reg(EFLAGS)
   // - Op3 Implicit Use Reg(AX)
   // - Op4 Implicit Use Reg(EFLAGS)
   // - Var0 [Op0]
   // - hasAliasingImplicitRegisters (execution is always serial)
   // - hasAliasingRegisters
   const unsigned Opcode = llvm::X86::ADC16i16;
-  EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitDefs()[0], llvm::X86::AX);
-  EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitDefs()[1], llvm::X86::EFLAGS);
-  EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitUses()[0], llvm::X86::AX);
-  EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitUses()[1], llvm::X86::EFLAGS);
+  EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[0], llvm::X86::AX);
+  EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[1], llvm::X86::EFLAGS);
+  EXPECT_THAT(InstrInfo.get(Opcode).getImplicitUses()[0], llvm::X86::AX);
+  EXPECT_THAT(InstrInfo.get(Opcode).getImplicitUses()[1], llvm::X86::EFLAGS);
   const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);
   ASSERT_THAT(CodeTemplates, SizeIs(1));
   const auto &CT = CodeTemplates[0];
   EXPECT_THAT(CT.Execution, ExecutionMode::ALWAYS_SERIAL_IMPLICIT_REGS_ALIAS);
   ASSERT_THAT(CT.Instructions, SizeIs(1));
   const InstructionTemplate &IT = CT.Instructions[0];
   EXPECT_THAT(IT.getOpcode(), Opcode);
   ASSERT_THAT(IT.VariableValues, SizeIs(1)); // Imm.
   EXPECT_THAT(IT.VariableValues[0], IsInvalid()) << "Immediate is not set";
 }
 
 TEST_F(LatencySnippetGeneratorTest, ImplicitSelfDependencyThroughTiedRegs) {
   // - ADD16ri
   // - Op0 Explicit Def RegClass(GR16)
   // - Op1 Explicit Use RegClass(GR16) TiedToOp0
   // - Op2 Explicit Use Immediate
   // - Op3 Implicit Def Reg(EFLAGS)
   // - Var0 [Op0,Op1]
   // - Var1 [Op2]
   // - hasTiedRegisters (execution is always serial)
   // - hasAliasingRegisters
   const unsigned Opcode = llvm::X86::ADD16ri;
-  EXPECT_THAT(MCInstrInfo.get(Opcode).getImplicitDefs()[0], llvm::X86::EFLAGS);
+  EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[0], llvm::X86::EFLAGS);
   const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);
   ASSERT_THAT(CodeTemplates, SizeIs(1));
   const auto &CT = CodeTemplates[0];
   EXPECT_THAT(CT.Execution, ExecutionMode::ALWAYS_SERIAL_TIED_REGS_ALIAS);
   ASSERT_THAT(CT.Instructions, SizeIs(1));
   const InstructionTemplate &IT = CT.Instructions[0];
   EXPECT_THAT(IT.getOpcode(), Opcode);
   ASSERT_THAT(IT.VariableValues, SizeIs(2));

llvm/trunk/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp

 //===-- SnippetRepetitorTest.cpp --------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "../Common/AssemblerUtils.h"
 #include "Latency.h"
 #include "LlvmState.h"
 #include "MCInstrDescView.h"
 #include "RegisterAliasing.h"
+#include "TestBase.h"
 #include "Uops.h"
 #include "X86InstrInfo.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 
 namespace llvm {
 namespace exegesis {
 
 void InitializeX86ExegesisTarget();
 
 namespace {
 
 using testing::ElementsAre;
 using testing::Eq;
 using testing::Field;
 using testing::Property;
 using testing::UnorderedElementsAre;
 
-class X86SnippetRepetitorTest : public ::testing::Test {
+class X86SnippetRepetitorTest : public X86TestBase {
 protected:
-  X86SnippetRepetitorTest() : State("x86_64-unknown-linux", "haswell") {}
-
-  static void SetUpTestCase() {
-    LLVMInitializeX86TargetInfo();
-    LLVMInitializeX86TargetMC();
-    LLVMInitializeX86Target();
-    LLVMInitializeX86AsmPrinter();
-    InitializeX86ExegesisTarget();
-  }
-
   void SetUp() {
     TM = State.createTargetMachine();
     Context = std::make_unique<LLVMContext>();
     Mod =
         std::make_unique<Module>("X86SnippetRepetitorTest", *Context);
     Mod->setDataLayout(TM->createDataLayout());
     MMI = std::make_unique<MachineModuleInfo>(TM.get());
     MF = &createVoidVoidPtrMachineFunction("TestFn", Mod.get(), MMI.get());
   }
 
   void TestCommon(InstructionBenchmark::RepetitionModeE RepetitionMode) {
     const auto Repetitor = SnippetRepetitor::Create(RepetitionMode, State);
     const std::vector<MCInst> Instructions = {MCInstBuilder(X86::NOOP)};
     FunctionFiller Sink(*MF, {X86::EAX});
     const auto Fill = Repetitor->Repeat(Instructions, kMinInstructions);
     Fill(Sink);
   }
 
   static constexpr const unsigned kMinInstructions = 3;
 
-  const LLVMState State;
   std::unique_ptr<LLVMTargetMachine> TM;
   std::unique_ptr<LLVMContext> Context;
   std::unique_ptr<Module> Mod;
   std::unique_ptr<MachineModuleInfo> MMI;
   MachineFunction *MF = nullptr;
 };
 
 static auto HasOpcode = [](unsigned Opcode) {

llvm/trunk/unittests/tools/llvm-exegesis/X86/TestBase.h

+//===-- TestBase.cpp --------------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+// Test fixture common to all X86 tests.
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_X86_TESTBASE_H
+#define LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_X86_TESTBASE_H
+
+#include "LlvmState.h"
+#include "llvm/Support/TargetRegistry.h"
+#include "llvm/Support/TargetSelect.h"
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+
+namespace llvm {
+namespace exegesis {
+
+void InitializeX86ExegesisTarget();
+
+class X86TestBase : public ::testing::Test {
+protected:
+  X86TestBase() : State("x86_64-unknown-linux", "haswell") {}
+
+  static void SetUpTestCase() {
+    LLVMInitializeX86TargetInfo();
+    LLVMInitializeX86TargetMC();
+    LLVMInitializeX86Target();
+    LLVMInitializeX86AsmPrinter();
+    LLVMInitializeX86AsmParser();
+    InitializeX86ExegesisTarget();
+  }
+
+  const LLVMState State;
+};
+
+} // namespace exegesis
+} // namespace llvm
+
+#endif