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[llvm-exegesis] Refactor how forbidden registers are computed.
ClosedPublic

Authored by courbet on Sep 26 2019, 6:01 AM.

Details

Summary

Right now latency generation can incorrectly select the scratch register
as a dependency-carrying register.

  • Move the logic for preventing register selection from Uops implementation to common SnippetGenerator class.
  • Aliasing detection now takes a set of forbidden registers just like random register assignment does.

Event Timeline

courbet created this revision.Sep 26 2019, 6:01 AM
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gchatelet accepted this revision.Sep 26 2019, 6:54 AM
gchatelet added inline comments.
llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
276

State.getRATC().emptyRegisters()

This revision is now accepted and ready to land.Sep 26 2019, 6:54 AM
courbet marked an inline comment as done.Sep 26 2019, 8:13 AM

Thanks.

courbet updated this revision to Diff 221957.Sep 26 2019, 8:15 AM

Address comments

gchatelet accepted this revision.Sep 26 2019, 8:19 AM
This revision was automatically updated to reflect the committed changes.