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Differential D67070

[X86][SSE] Add support for <64 x i1> bool reduction
ClosedPublic

Authored by RKSimon on Sep 2 2019, 4:36 AM.

Details

Reviewers
craig.topper
spatel
Commits
rG3262084384c7: [X86][SSE] Add support for <64 x i1> bool reduction
rL371328: [X86][SSE] Add support for <64 x i1> bool reduction
Summary

This generalizes the existing <32 x i1> pre-AVX2 split code to support reductions from <64 x i1> as well, we can probably generalize to any larger pow2 case in the future if the (unlikely) need ever arises.

We still need to tweak combineBitcastvxi1 to improve AVX512F codegen as its assumes vXi1 types should be handled on the mask registers even when they aren't legal.

Diff Detail

Repository
rL LLVM

Event Timeline

RKSimon created this revision.Sep 2 2019, 4:36 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 2 2019, 4:36 AM
RKSimon added a comment.Sep 5 2019, 2:33 PM

ping?

craig.topper added inline comments.Sep 5 2019, 2:54 PM
test/CodeGen/X86/vector-reduce-and-bool.ll
842

Can we do something to fix this case?

RKSimon added inline comments.Sep 6 2019, 1:48 AM
test/CodeGen/X86/vector-reduce-and-bool.ll
842

Yup, combineBitcastvxi1 needs some tweaking to better handle this. I'm happy to do this before or after this patch but they are separate improvements.

Herald added a subscriber: ychen. · View Herald TranscriptSep 6 2019, 1:48 AM
craig.topper accepted this revision.Sep 7 2019, 6:30 PM

LGTM

This revision is now accepted and ready to land.Sep 7 2019, 6:30 PM
Closed by commit rL371328: [X86][SSE] Add support for <64 x i1> bool reduction (authored by RKSimon). · Explain WhySep 8 2019, 4:48 AM
This revision was automatically updated to reflect the committed changes.
RKSimon mentioned this in rL371330: [X86][SSE] Fix out of range shift introduced in D67070/rL371328.Sep 8 2019, 5:43 AM
RKSimon mentioned this in rG178cd2cd3a69: [X86][SSE] Fix out of range shift introduced in D67070/rL371328.Sep 8 2019, 5:49 AM

Revision Contents

PathSize
lib/
Target/
X86/
X86ISelLowering.cpp
X86ISelLowering.cpp (revision 370637)
25 lines
test/
CodeGen/
X86/
vector-reduce-and-bool.ll
vector-reduce-and-bool.ll (revision 370632)
149 lines
vector-reduce-or-bool.ll
vector-reduce-or-bool.ll (revision 370632)
155 lines
vector-reduce-xor-bool.ll
vector-reduce-xor-bool.ll (revision 370632)
286 lines

Diff 218329

lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 35,794 Lines • ▼ Show 20 Linesstatic SDValue combineHorizontalPredicateResult(SDNode *Extract,
// which we can't support here for now. // which we can't support here for now.
if (Match.getScalarValueSizeInBits() != BitWidth) if (Match.getScalarValueSizeInBits() != BitWidth)
return SDValue(); return SDValue();
SDValue Movmsk; SDValue Movmsk;
SDLoc DL(Extract); SDLoc DL(Extract);
EVT MatchVT = Match.getValueType(); EVT MatchVT = Match.getValueType();
unsigned NumElts = MatchVT.getVectorNumElements(); unsigned NumElts = MatchVT.getVectorNumElements();
unsigned MaxElts = Subtarget.hasInt256() ? 32 : 16;
const TargetLowering &TLI = DAG.getTargetLoweringInfo(); const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (ExtractVT == MVT::i1) { if (ExtractVT == MVT::i1) {
// Special case for (pre-legalization) vXi1 reductions. // Special case for (pre-legalization) vXi1 reductions.
if (NumElts > 32) if (NumElts > 64 || !isPowerOf2_32(NumElts))
return SDValue(); return SDValue();
if (TLI.isTypeLegal(MatchVT)) { if (TLI.isTypeLegal(MatchVT)) {
// If this is a legal AVX512 predicate type then we can just bitcast. // If this is a legal AVX512 predicate type then we can just bitcast.
EVT MovmskVT = EVT::getIntegerVT(*DAG.getContext(), NumElts); EVT MovmskVT = EVT::getIntegerVT(*DAG.getContext(), NumElts);
Movmsk = DAG.getBitcast(MovmskVT, Match); Movmsk = DAG.getBitcast(MovmskVT, Match);
} else { } else {
// Use combineBitcastvxi1 to create the MOVMSK. // Use combineBitcastvxi1 to create the MOVMSK.
if (NumElts == 32 && !Subtarget.hasInt256()) { while (NumElts > MaxElts) {
SDValue Lo, Hi; SDValue Lo, Hi;
std::tie(Lo, Hi) = DAG.SplitVector(Match, DL); std::tie(Lo, Hi) = DAG.SplitVector(Match, DL);
Match = DAG.getNode(BinOp, DL, Lo.getValueType(), Lo, Hi); Match = DAG.getNode(BinOp, DL, Lo.getValueType(), Lo, Hi);
NumElts = 16; NumElts /= 2;
} }
EVT MovmskVT = EVT::getIntegerVT(*DAG.getContext(), NumElts); EVT MovmskVT = EVT::getIntegerVT(*DAG.getContext(), NumElts);
Movmsk = combineBitcastvxi1(DAG, MovmskVT, Match, DL, Subtarget); Movmsk = combineBitcastvxi1(DAG, MovmskVT, Match, DL, Subtarget);
} }
if (!Movmsk) if (!Movmsk)
return SDValue(); return SDValue();
Movmsk = DAG.getZExtOrTrunc(Movmsk, DL, MVT::i32); Movmsk = DAG.getZExtOrTrunc(Movmsk, DL, NumElts > 32 ? MVT::i64 : MVT::i32);
} else { } else {
// Bail with AVX512VL (which uses predicate registers). // Bail with AVX512VL (which uses predicate registers).
if (Subtarget.hasVLX()) if (Subtarget.hasVLX())
return SDValue(); return SDValue();
unsigned MatchSizeInBits = Match.getValueSizeInBits(); unsigned MatchSizeInBits = Match.getValueSizeInBits();
if (!(MatchSizeInBits == 128 || if (!(MatchSizeInBits == 128 ||
(MatchSizeInBits == 256 && Subtarget.hasAVX()))) (MatchSizeInBits == 256 && Subtarget.hasAVX())))
Show All 24 Lines if (64 == BitWidth || 32 == BitWidth)
MatchSizeInBits / BitWidth); MatchSizeInBits / BitWidth);
else else
MaskSrcVT = MVT::getVectorVT(MVT::i8, MatchSizeInBits / 8); MaskSrcVT = MVT::getVectorVT(MVT::i8, MatchSizeInBits / 8);
SDValue BitcastLogicOp = DAG.getBitcast(MaskSrcVT, Match); SDValue BitcastLogicOp = DAG.getBitcast(MaskSrcVT, Match);
Movmsk = getPMOVMSKB(DL, BitcastLogicOp, DAG, Subtarget); Movmsk = getPMOVMSKB(DL, BitcastLogicOp, DAG, Subtarget);
NumElts = MaskSrcVT.getVectorNumElements(); NumElts = MaskSrcVT.getVectorNumElements();
} }
assert(NumElts <= 32 && "Not expecting more than 32 elements"); assert((NumElts <= 32 || NumElts == 64) &&
"Not expecting more than 64 elements");
MVT CmpVT = NumElts == 64 ? MVT::i64 : MVT::i32;
if (BinOp == ISD::XOR) { if (BinOp == ISD::XOR) {
// parity -> (AND (CTPOP(MOVMSK X)), 1) // parity -> (AND (CTPOP(MOVMSK X)), 1)
SDValue Mask = DAG.getConstant(1, DL, MVT::i32); SDValue Mask = DAG.getConstant(1, DL, CmpVT);
SDValue Result = DAG.getNode(ISD::CTPOP, DL, MVT::i32, Movmsk); SDValue Result = DAG.getNode(ISD::CTPOP, DL, CmpVT, Movmsk);
Result = DAG.getNode(ISD::AND, DL, MVT::i32, Result, Mask); Result = DAG.getNode(ISD::AND, DL, CmpVT, Result, Mask);
return DAG.getZExtOrTrunc(Result, DL, ExtractVT); return DAG.getZExtOrTrunc(Result, DL, ExtractVT);
} }
SDValue CmpC; SDValue CmpC;
ISD::CondCode CondCode; ISD::CondCode CondCode;
if (BinOp == ISD::OR) { if (BinOp == ISD::OR) {
// any_of -> MOVMSK != 0 // any_of -> MOVMSK != 0
CmpC = DAG.getConstant(0, DL, MVT::i32); CmpC = DAG.getConstant(0, DL, CmpVT);
CondCode = ISD::CondCode::SETNE; CondCode = ISD::CondCode::SETNE;
} else { } else {
// all_of -> MOVMSK == ((1 << NumElts) - 1) // all_of -> MOVMSK == ((1 << NumElts) - 1)
CmpC = DAG.getConstant((1ULL << NumElts) - 1, DL, MVT::i32); CmpC = DAG.getConstant((1ULL << NumElts) - 1, DL, CmpVT);
CondCode = ISD::CondCode::SETEQ; CondCode = ISD::CondCode::SETEQ;
} }
// The setcc produces an i8 of 0/1, so extend that to the result width and // The setcc produces an i8 of 0/1, so extend that to the result width and
// negate to get the final 0/-1 mask value. // negate to get the final 0/-1 mask value.
EVT SetccVT = EVT SetccVT =
TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), MVT::i32); TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT);
SDValue Setcc = DAG.getSetCC(DL, SetccVT, Movmsk, CmpC, CondCode); SDValue Setcc = DAG.getSetCC(DL, SetccVT, Movmsk, CmpC, CondCode);
SDValue Zext = DAG.getZExtOrTrunc(Setcc, DL, ExtractVT); SDValue Zext = DAG.getZExtOrTrunc(Setcc, DL, ExtractVT);
SDValue Zero = DAG.getConstant(0, DL, ExtractVT); SDValue Zero = DAG.getConstant(0, DL, ExtractVT);
return DAG.getNode(ISD::SUB, DL, ExtractVT, Zero, Zext); return DAG.getNode(ISD::SUB, DL, ExtractVT, Zero, Zext);
} }
static SDValue combineBasicSADPattern(SDNode *Extract, SelectionDAG &DAG, static SDValue combineBasicSADPattern(SDNode *Extract, SelectionDAG &DAG,
const X86Subtarget &Subtarget) { const X86Subtarget &Subtarget) {
▲ Show 20 Lines • Show All 10,249 Lines • Show Last 20 Lines

test/CodeGen/X86/vector-reduce-and-bool.ll

Show First 20 Lines • Show All 798 Lines • ▼ Show 20 Lines
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = trunc <32 x i16> %0 to <32 x i1> %a = trunc <32 x i16> %0 to <32 x i1>
%b = call i1 @llvm.experimental.vector.reduce.and.v32i1(<32 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.and.v32i1(<32 x i1> %a)
ret i1 %b ret i1 %b
} }
define i1 @trunc_v64i8_v64i1(<64 x i8>) { define i1 @trunc_v64i8_v64i1(<64 x i8>) {
; SSE2-LABEL: trunc_v64i8_v64i1: ; SSE-LABEL: trunc_v64i8_v64i1:
; SSE2: # %bb.0: ; SSE: # %bb.0:
; SSE2-NEXT: pand %xmm3, %xmm1 ; SSE-NEXT: pand %xmm3, %xmm1
; SSE2-NEXT: pand %xmm2, %xmm1 ; SSE-NEXT: pand %xmm2, %xmm1
; SSE2-NEXT: pand %xmm0, %xmm1 ; SSE-NEXT: pand %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] ; SSE-NEXT: psllw $7, %xmm1
; SSE2-NEXT: pand %xmm1, %xmm0 ; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; SSE-NEXT: cmpw $-1, %ax
; SSE2-NEXT: pand %xmm0, %xmm1 ; SSE-NEXT: sete %al
; SSE2-NEXT: movdqa %xmm1, %xmm0 ; SSE-NEXT: retq
; SSE2-NEXT: psrld $16, %xmm0
; SSE2-NEXT: pand %xmm1, %xmm0
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: psrlw $8, %xmm1
; SSE2-NEXT: pand %xmm0, %xmm1
; SSE2-NEXT: movd %xmm1, %eax
; SSE2-NEXT: # kill: def $al killed $al killed $eax
; SSE2-NEXT: retq
;
; SSE41-LABEL: trunc_v64i8_v64i1:
; SSE41: # %bb.0:
; SSE41-NEXT: pand %xmm3, %xmm1
; SSE41-NEXT: pand %xmm2, %xmm1
; SSE41-NEXT: pand %xmm0, %xmm1
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; SSE41-NEXT: pand %xmm1, %xmm0
; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; SSE41-NEXT: pand %xmm0, %xmm1
; SSE41-NEXT: movdqa %xmm1, %xmm0
; SSE41-NEXT: psrld $16, %xmm0
; SSE41-NEXT: pand %xmm1, %xmm0
; SSE41-NEXT: movdqa %xmm0, %xmm1
; SSE41-NEXT: psrlw $8, %xmm1
; SSE41-NEXT: pand %xmm0, %xmm1
; SSE41-NEXT: pextrb $0, %xmm1, %eax
; SSE41-NEXT: # kill: def $al killed $al killed $eax
; SSE41-NEXT: retq
; ;
; AVX1-LABEL: trunc_v64i8_v64i1: ; AVX1-LABEL: trunc_v64i8_v64i1:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 ; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX1-NEXT: cmpw $-1, %ax
; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: sete %al
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpextrb $0, %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: trunc_v64i8_v64i1: ; AVX2-LABEL: trunc_v64i8_v64i1:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0
; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX2-NEXT: cmpl $-1, %eax
; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: sete %al
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpextrb $0, %xmm0, %eax
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512F-LABEL: trunc_v64i8_v64i1: ; AVX512F-LABEL: trunc_v64i8_v64i1:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
craig.topperUnsubmitted
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Can we do something to fix this case?

craig.topper: Can we do something to fix this case?
RKSimonAuthorUnsubmitted
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Yup, combineBitcastvxi1 needs some tweaking to better handle this. I'm happy to do this before or after this patch but they are separate improvements.

RKSimon: Yup, combineBitcastvxi1 needs some tweaking to better handle this. I'm happy to do this before…
; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2 ; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm3 ; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm3
; AVX512F-NEXT: vpand %xmm2, %xmm3, %xmm2 ; AVX512F-NEXT: vpand %xmm2, %xmm3, %xmm2
; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1
; AVX512F-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX512F-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0 ; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0 ; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k0 ; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k0
Show All 9 Lines
; AVX512F-NEXT: # kill: def $al killed $al killed $eax ; AVX512F-NEXT: # kill: def $al killed $al killed $eax
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_v64i8_v64i1: ; AVX512BW-LABEL: trunc_v64i8_v64i1:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllw $7, %zmm0, %zmm0 ; AVX512BW-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovb2m %zmm0, %k0 ; AVX512BW-NEXT: vpmovb2m %zmm0, %k0
; AVX512BW-NEXT: kshiftrq $32, %k0, %k1 ; AVX512BW-NEXT: kortestq %k0, %k0
; AVX512BW-NEXT: kandq %k1, %k0, %k0 ; AVX512BW-NEXT: sete %al
; AVX512BW-NEXT: kshiftrq $16, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $8, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $4, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $2, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $1, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: def $al killed $al killed $eax
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_v64i8_v64i1: ; AVX512VL-LABEL: trunc_v64i8_v64i1:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpsllw $7, %zmm0, %zmm0 ; AVX512VL-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512VL-NEXT: vpmovb2m %zmm0, %k0 ; AVX512VL-NEXT: vpmovb2m %zmm0, %k0
; AVX512VL-NEXT: kshiftrq $32, %k0, %k1 ; AVX512VL-NEXT: kortestq %k0, %k0
; AVX512VL-NEXT: kandq %k1, %k0, %k0 ; AVX512VL-NEXT: sete %al
; AVX512VL-NEXT: kshiftrq $16, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $8, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $4, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $2, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $1, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kmovd %k0, %eax
; AVX512VL-NEXT: # kill: def $al killed $al killed $eax
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = trunc <64 x i8> %0 to <64 x i1> %a = trunc <64 x i8> %0 to <64 x i1>
%b = call i1 @llvm.experimental.vector.reduce.and.v64i1(<64 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.and.v64i1(<64 x i1> %a)
ret i1 %b ret i1 %b
} }
; ;
▲ Show 20 Lines • Show All 792 Lines • ▼ Show 20 Lines
; SSE-LABEL: icmp_v64i8_v64i1: ; SSE-LABEL: icmp_v64i8_v64i1:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: por %xmm3, %xmm1 ; SSE-NEXT: por %xmm3, %xmm1
; SSE-NEXT: pxor %xmm3, %xmm3 ; SSE-NEXT: pxor %xmm3, %xmm3
; SSE-NEXT: por %xmm2, %xmm1 ; SSE-NEXT: por %xmm2, %xmm1
; SSE-NEXT: por %xmm0, %xmm1 ; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: pcmpeqb %xmm3, %xmm1 ; SSE-NEXT: pcmpeqb %xmm3, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %eax ; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; SSE-NEXT: cmpw $-1, %ax
; SSE-NEXT: sete %al ; SSE-NEXT: sete %al
; SSE-NEXT: negb %al
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: icmp_v64i8_v64i1: ; AVX1-LABEL: icmp_v64i8_v64i1:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: cmpl $65535, %eax # imm = 0xFFFF ; AVX1-NEXT: cmpw $-1, %ax
; AVX1-NEXT: sete %al ; AVX1-NEXT: sete %al
; AVX1-NEXT: negb %al
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: icmp_v64i8_v64i1: ; AVX2-LABEL: icmp_v64i8_v64i1:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %eax ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: cmpl $-1, %eax ; AVX2-NEXT: cmpl $-1, %eax
; AVX2-NEXT: sete %al ; AVX2-NEXT: sete %al
; AVX2-NEXT: negb %al
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512F-LABEL: icmp_v64i8_v64i1: ; AVX512F-LABEL: icmp_v64i8_v64i1:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1 ; AVX512F-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1
Show All 16 Lines
; AVX512F-NEXT: kmovw %k0, %eax ; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: def $al killed $al killed $eax ; AVX512F-NEXT: # kill: def $al killed $al killed $eax
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512BW-LABEL: icmp_v64i8_v64i1: ; AVX512BW-LABEL: icmp_v64i8_v64i1:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vptestnmb %zmm0, %zmm0, %k0 ; AVX512BW-NEXT: vptestnmb %zmm0, %zmm0, %k0
; AVX512BW-NEXT: kshiftrq $32, %k0, %k1 ; AVX512BW-NEXT: kortestq %k0, %k0
; AVX512BW-NEXT: kandq %k1, %k0, %k0 ; AVX512BW-NEXT: sete %al
; AVX512BW-NEXT: kshiftrq $16, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $8, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $4, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $2, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $1, %k0, %k1
; AVX512BW-NEXT: kandq %k1, %k0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: def $al killed $al killed $eax
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512VL-LABEL: icmp_v64i8_v64i1: ; AVX512VL-LABEL: icmp_v64i8_v64i1:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vptestnmb %zmm0, %zmm0, %k0 ; AVX512VL-NEXT: vptestnmb %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kshiftrq $32, %k0, %k1 ; AVX512VL-NEXT: kortestq %k0, %k0
; AVX512VL-NEXT: kandq %k1, %k0, %k0 ; AVX512VL-NEXT: sete %al
; AVX512VL-NEXT: kshiftrq $16, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $8, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $4, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $2, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $1, %k0, %k1
; AVX512VL-NEXT: kandq %k1, %k0, %k0
; AVX512VL-NEXT: kmovd %k0, %eax
; AVX512VL-NEXT: # kill: def $al killed $al killed $eax
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = icmp eq <64 x i8> %0, zeroinitializer %a = icmp eq <64 x i8> %0, zeroinitializer
%b = call i1 @llvm.experimental.vector.reduce.and.v64i1(<64 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.and.v64i1(<64 x i1> %a)
ret i1 %b ret i1 %b
} }
declare i1 @llvm.experimental.vector.reduce.and.v2i1(<2 x i1>) declare i1 @llvm.experimental.vector.reduce.and.v2i1(<2 x i1>)
declare i1 @llvm.experimental.vector.reduce.and.v4i1(<4 x i1>) declare i1 @llvm.experimental.vector.reduce.and.v4i1(<4 x i1>)
declare i1 @llvm.experimental.vector.reduce.and.v8i1(<8 x i1>) declare i1 @llvm.experimental.vector.reduce.and.v8i1(<8 x i1>)
declare i1 @llvm.experimental.vector.reduce.and.v16i1(<16 x i1>) declare i1 @llvm.experimental.vector.reduce.and.v16i1(<16 x i1>)
declare i1 @llvm.experimental.vector.reduce.and.v32i1(<32 x i1>) declare i1 @llvm.experimental.vector.reduce.and.v32i1(<32 x i1>)
declare i1 @llvm.experimental.vector.reduce.and.v64i1(<64 x i1>) declare i1 @llvm.experimental.vector.reduce.and.v64i1(<64 x i1>)

test/CodeGen/X86/vector-reduce-or-bool.ll

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; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = trunc <32 x i16> %0 to <32 x i1> %a = trunc <32 x i16> %0 to <32 x i1>
%b = call i1 @llvm.experimental.vector.reduce.or.v32i1(<32 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.or.v32i1(<32 x i1> %a)
ret i1 %b ret i1 %b
} }
define i1 @trunc_v64i8_v64i1(<64 x i8>) { define i1 @trunc_v64i8_v64i1(<64 x i8>) {
; SSE2-LABEL: trunc_v64i8_v64i1: ; SSE-LABEL: trunc_v64i8_v64i1:
; SSE2: # %bb.0: ; SSE: # %bb.0:
; SSE2-NEXT: por %xmm3, %xmm1 ; SSE-NEXT: por %xmm3, %xmm1
; SSE2-NEXT: por %xmm2, %xmm1 ; SSE-NEXT: por %xmm2, %xmm1
; SSE2-NEXT: por %xmm0, %xmm1 ; SSE-NEXT: por %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] ; SSE-NEXT: psllw $7, %xmm1
; SSE2-NEXT: por %xmm1, %xmm0 ; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; SSE-NEXT: testw %ax, %ax
; SSE2-NEXT: por %xmm0, %xmm1 ; SSE-NEXT: setne %al
; SSE2-NEXT: movdqa %xmm1, %xmm0 ; SSE-NEXT: retq
; SSE2-NEXT: psrld $16, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: psrlw $8, %xmm1
; SSE2-NEXT: por %xmm0, %xmm1
; SSE2-NEXT: movd %xmm1, %eax
; SSE2-NEXT: # kill: def $al killed $al killed $eax
; SSE2-NEXT: retq
;
; SSE41-LABEL: trunc_v64i8_v64i1:
; SSE41: # %bb.0:
; SSE41-NEXT: por %xmm3, %xmm1
; SSE41-NEXT: por %xmm2, %xmm1
; SSE41-NEXT: por %xmm0, %xmm1
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; SSE41-NEXT: por %xmm1, %xmm0
; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; SSE41-NEXT: por %xmm0, %xmm1
; SSE41-NEXT: movdqa %xmm1, %xmm0
; SSE41-NEXT: psrld $16, %xmm0
; SSE41-NEXT: por %xmm1, %xmm0
; SSE41-NEXT: movdqa %xmm0, %xmm1
; SSE41-NEXT: psrlw $8, %xmm1
; SSE41-NEXT: por %xmm0, %xmm1
; SSE41-NEXT: pextrb $0, %xmm1, %eax
; SSE41-NEXT: # kill: def $al killed $al killed $eax
; SSE41-NEXT: retq
; ;
; AVX1-LABEL: trunc_v64i8_v64i1: ; AVX1-LABEL: trunc_v64i8_v64i1:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: setne %al
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpextrb $0, %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: trunc_v64i8_v64i1: ; AVX2-LABEL: trunc_v64i8_v64i1:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0
; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: setne %al
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpextrb $0, %xmm0, %eax
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512F-LABEL: trunc_v64i8_v64i1: ; AVX512F-LABEL: trunc_v64i8_v64i1:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2 ; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm3 ; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm3
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; AVX512F-NEXT: # kill: def $al killed $al killed $eax ; AVX512F-NEXT: # kill: def $al killed $al killed $eax
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_v64i8_v64i1: ; AVX512BW-LABEL: trunc_v64i8_v64i1:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllw $7, %zmm0, %zmm0 ; AVX512BW-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovb2m %zmm0, %k0 ; AVX512BW-NEXT: vpmovb2m %zmm0, %k0
; AVX512BW-NEXT: kshiftrq $32, %k0, %k1 ; AVX512BW-NEXT: kortestq %k0, %k0
; AVX512BW-NEXT: korq %k1, %k0, %k0 ; AVX512BW-NEXT: setne %al
; AVX512BW-NEXT: kshiftrq $16, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $8, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $4, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $2, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $1, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: def $al killed $al killed $eax
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_v64i8_v64i1: ; AVX512VL-LABEL: trunc_v64i8_v64i1:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpsllw $7, %zmm0, %zmm0 ; AVX512VL-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512VL-NEXT: vpmovb2m %zmm0, %k0 ; AVX512VL-NEXT: vpmovb2m %zmm0, %k0
; AVX512VL-NEXT: kshiftrq $32, %k0, %k1 ; AVX512VL-NEXT: kortestq %k0, %k0
; AVX512VL-NEXT: korq %k1, %k0, %k0 ; AVX512VL-NEXT: setne %al
; AVX512VL-NEXT: kshiftrq $16, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $8, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $4, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $2, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $1, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kmovd %k0, %eax
; AVX512VL-NEXT: # kill: def $al killed $al killed $eax
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = trunc <64 x i8> %0 to <64 x i1> %a = trunc <64 x i8> %0 to <64 x i1>
%b = call i1 @llvm.experimental.vector.reduce.or.v64i1(<64 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.or.v64i1(<64 x i1> %a)
ret i1 %b ret i1 %b
} }
; ;
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; SSE-NEXT: pxor %xmm4, %xmm4 ; SSE-NEXT: pxor %xmm4, %xmm4
; SSE-NEXT: pcmpeqb %xmm4, %xmm2 ; SSE-NEXT: pcmpeqb %xmm4, %xmm2
; SSE-NEXT: pcmpeqb %xmm4, %xmm0 ; SSE-NEXT: pcmpeqb %xmm4, %xmm0
; SSE-NEXT: pcmpeqb %xmm4, %xmm3 ; SSE-NEXT: pcmpeqb %xmm4, %xmm3
; SSE-NEXT: pcmpeqb %xmm4, %xmm1 ; SSE-NEXT: pcmpeqb %xmm4, %xmm1
; SSE-NEXT: por %xmm3, %xmm1 ; SSE-NEXT: por %xmm3, %xmm1
; SSE-NEXT: por %xmm2, %xmm1 ; SSE-NEXT: por %xmm2, %xmm1
; SSE-NEXT: por %xmm0, %xmm1 ; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: psllw $7, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %eax ; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE-NEXT: negl %eax ; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: sbbb %al, %al ; SSE-NEXT: setne %al
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: icmp_v64i8_v64i1: ; AVX1-LABEL: icmp_v64i8_v64i1:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm3 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm3
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm4 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpor %xmm0, %xmm3, %xmm0 ; AVX1-NEXT: vpor %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpor %xmm0, %xmm4, %xmm0 ; AVX1-NEXT: vpor %xmm0, %xmm4, %xmm0
; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: negl %eax ; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: sbbb %al, %al ; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: icmp_v64i8_v64i1: ; AVX2-LABEL: icmp_v64i8_v64i1:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX2-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vpcmpeqb %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpeqb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %eax ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: negl %eax ; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: sbbb %al, %al ; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512F-LABEL: icmp_v64i8_v64i1: ; AVX512F-LABEL: icmp_v64i8_v64i1:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1 ; AVX512F-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1
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; AVX512F-NEXT: kmovw %k0, %eax ; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: def $al killed $al killed $eax ; AVX512F-NEXT: # kill: def $al killed $al killed $eax
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512BW-LABEL: icmp_v64i8_v64i1: ; AVX512BW-LABEL: icmp_v64i8_v64i1:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vptestnmb %zmm0, %zmm0, %k0 ; AVX512BW-NEXT: vptestnmb %zmm0, %zmm0, %k0
; AVX512BW-NEXT: kshiftrq $32, %k0, %k1 ; AVX512BW-NEXT: kortestq %k0, %k0
; AVX512BW-NEXT: korq %k1, %k0, %k0 ; AVX512BW-NEXT: setne %al
; AVX512BW-NEXT: kshiftrq $16, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $8, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $4, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $2, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kshiftrq $1, %k0, %k1
; AVX512BW-NEXT: korq %k1, %k0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: def $al killed $al killed $eax
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512VL-LABEL: icmp_v64i8_v64i1: ; AVX512VL-LABEL: icmp_v64i8_v64i1:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vptestnmb %zmm0, %zmm0, %k0 ; AVX512VL-NEXT: vptestnmb %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kshiftrq $32, %k0, %k1 ; AVX512VL-NEXT: kortestq %k0, %k0
; AVX512VL-NEXT: korq %k1, %k0, %k0 ; AVX512VL-NEXT: setne %al
; AVX512VL-NEXT: kshiftrq $16, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $8, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $4, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $2, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kshiftrq $1, %k0, %k1
; AVX512VL-NEXT: korq %k1, %k0, %k0
; AVX512VL-NEXT: kmovd %k0, %eax
; AVX512VL-NEXT: # kill: def $al killed $al killed $eax
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = icmp eq <64 x i8> %0, zeroinitializer %a = icmp eq <64 x i8> %0, zeroinitializer
%b = call i1 @llvm.experimental.vector.reduce.or.v64i1(<64 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.or.v64i1(<64 x i1> %a)
ret i1 %b ret i1 %b
} }
declare i1 @llvm.experimental.vector.reduce.or.v2i1(<2 x i1>) declare i1 @llvm.experimental.vector.reduce.or.v2i1(<2 x i1>)
declare i1 @llvm.experimental.vector.reduce.or.v4i1(<4 x i1>) declare i1 @llvm.experimental.vector.reduce.or.v4i1(<4 x i1>)
declare i1 @llvm.experimental.vector.reduce.or.v8i1(<8 x i1>) declare i1 @llvm.experimental.vector.reduce.or.v8i1(<8 x i1>)
declare i1 @llvm.experimental.vector.reduce.or.v16i1(<16 x i1>) declare i1 @llvm.experimental.vector.reduce.or.v16i1(<16 x i1>)
declare i1 @llvm.experimental.vector.reduce.or.v32i1(<32 x i1>) declare i1 @llvm.experimental.vector.reduce.or.v32i1(<32 x i1>)
declare i1 @llvm.experimental.vector.reduce.or.v64i1(<64 x i1>) declare i1 @llvm.experimental.vector.reduce.or.v64i1(<64 x i1>)

test/CodeGen/X86/vector-reduce-xor-bool.ll

Show First 20 Lines • Show All 898 Lines • ▼ Show 20 Lines
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = trunc <32 x i16> %0 to <32 x i1> %a = trunc <32 x i16> %0 to <32 x i1>
%b = call i1 @llvm.experimental.vector.reduce.xor.v32i1(<32 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.xor.v32i1(<32 x i1> %a)
ret i1 %b ret i1 %b
} }
define i1 @trunc_v64i8_v64i1(<64 x i8>) { define i1 @trunc_v64i8_v64i1(<64 x i8>) {
; SSE2-LABEL: trunc_v64i8_v64i1: ; SSE-LABEL: trunc_v64i8_v64i1:
; SSE2: # %bb.0: ; SSE: # %bb.0:
; SSE2-NEXT: pxor %xmm3, %xmm1 ; SSE-NEXT: pxor %xmm3, %xmm1
; SSE2-NEXT: pxor %xmm2, %xmm1 ; SSE-NEXT: pxor %xmm2, %xmm1
; SSE2-NEXT: pxor %xmm0, %xmm1 ; SSE-NEXT: pxor %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] ; SSE-NEXT: psllw $7, %xmm1
; SSE2-NEXT: pxor %xmm1, %xmm0 ; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; SSE-NEXT: movl %eax, %ecx
; SSE2-NEXT: pxor %xmm0, %xmm1 ; SSE-NEXT: shrl $8, %ecx
; SSE2-NEXT: movdqa %xmm1, %xmm0 ; SSE-NEXT: xorb %al, %cl
; SSE2-NEXT: psrld $16, %xmm0 ; SSE-NEXT: setnp %al
; SSE2-NEXT: pxor %xmm1, %xmm0 ; SSE-NEXT: retq
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: psrlw $8, %xmm1
; SSE2-NEXT: pxor %xmm0, %xmm1
; SSE2-NEXT: movd %xmm1, %eax
; SSE2-NEXT: # kill: def $al killed $al killed $eax
; SSE2-NEXT: retq
;
; SSE41-LABEL: trunc_v64i8_v64i1:
; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm3, %xmm1
; SSE41-NEXT: pxor %xmm2, %xmm1
; SSE41-NEXT: pxor %xmm0, %xmm1
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; SSE41-NEXT: pxor %xmm1, %xmm0
; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; SSE41-NEXT: pxor %xmm0, %xmm1
; SSE41-NEXT: movdqa %xmm1, %xmm0
; SSE41-NEXT: psrld $16, %xmm0
; SSE41-NEXT: pxor %xmm1, %xmm0
; SSE41-NEXT: movdqa %xmm0, %xmm1
; SSE41-NEXT: psrlw $8, %xmm1
; SSE41-NEXT: pxor %xmm0, %xmm1
; SSE41-NEXT: pextrb $0, %xmm1, %eax
; SSE41-NEXT: # kill: def $al killed $al killed $eax
; SSE41-NEXT: retq
; ;
; AVX1-LABEL: trunc_v64i8_v64i1: ; AVX1-LABEL: trunc_v64i8_v64i1:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX1-NEXT: movl %eax, %ecx
; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: shrl $8, %ecx
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1 ; AVX1-NEXT: xorb %al, %cl
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: setnp %al
; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpextrb $0, %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: trunc_v64i8_v64i1: ; AVX2-LABEL: trunc_v64i8_v64i1:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX2-NEXT: movl %eax, %ecx
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: shrl $16, %ecx
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX2-NEXT: xorl %eax, %ecx
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1 ; AVX2-NEXT: shrl $8, %eax
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: xorb %cl, %al
; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1 ; AVX2-NEXT: setnp %al
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpextrb $0, %xmm0, %eax
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512F-LABEL: trunc_v64i8_v64i1: ; AVX512F-LABEL: trunc_v64i8_v64i1:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2 ; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm3 ; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm3
Show All 15 Lines
; AVX512F-NEXT: # kill: def $al killed $al killed $eax ; AVX512F-NEXT: # kill: def $al killed $al killed $eax
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512BW-LABEL: trunc_v64i8_v64i1: ; AVX512BW-LABEL: trunc_v64i8_v64i1:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllw $7, %zmm0, %zmm0 ; AVX512BW-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512BW-NEXT: vpmovb2m %zmm0, %k0 ; AVX512BW-NEXT: vpmovb2m %zmm0, %k0
; AVX512BW-NEXT: kshiftrq $32, %k0, %k1 ; AVX512BW-NEXT: kmovq %k0, %rax
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: movq %rax, %rcx
; AVX512BW-NEXT: kshiftrq $16, %k0, %k1 ; AVX512BW-NEXT: shrq $32, %rcx
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: xorl %eax, %ecx
; AVX512BW-NEXT: kshiftrq $8, %k0, %k1 ; AVX512BW-NEXT: movl %ecx, %eax
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: shrl $16, %eax
; AVX512BW-NEXT: kshiftrq $4, %k0, %k1 ; AVX512BW-NEXT: xorl %ecx, %eax
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: movl %eax, %ecx
; AVX512BW-NEXT: kshiftrq $2, %k0, %k1 ; AVX512BW-NEXT: shrl $8, %ecx
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: xorb %al, %cl
; AVX512BW-NEXT: kshiftrq $1, %k0, %k1 ; AVX512BW-NEXT: setnp %al
; AVX512BW-NEXT: kxorq %k1, %k0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: def $al killed $al killed $eax
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512VL-LABEL: trunc_v64i8_v64i1: ; AVX512VL-LABEL: trunc_v64i8_v64i1:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vpsllw $7, %zmm0, %zmm0 ; AVX512VL-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512VL-NEXT: vpmovb2m %zmm0, %k0 ; AVX512VL-NEXT: vpmovb2m %zmm0, %k0
; AVX512VL-NEXT: kshiftrq $32, %k0, %k1 ; AVX512VL-NEXT: kmovq %k0, %rax
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: movq %rax, %rcx
; AVX512VL-NEXT: kshiftrq $16, %k0, %k1 ; AVX512VL-NEXT: shrq $32, %rcx
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: xorl %eax, %ecx
; AVX512VL-NEXT: kshiftrq $8, %k0, %k1 ; AVX512VL-NEXT: movl %ecx, %eax
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: shrl $16, %eax
; AVX512VL-NEXT: kshiftrq $4, %k0, %k1 ; AVX512VL-NEXT: xorl %ecx, %eax
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: movl %eax, %ecx
; AVX512VL-NEXT: kshiftrq $2, %k0, %k1 ; AVX512VL-NEXT: shrl $8, %ecx
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: xorb %al, %cl
; AVX512VL-NEXT: kshiftrq $1, %k0, %k1 ; AVX512VL-NEXT: setnp %al
; AVX512VL-NEXT: kxorq %k1, %k0, %k0
; AVX512VL-NEXT: kmovd %k0, %eax
; AVX512VL-NEXT: # kill: def $al killed $al killed $eax
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = trunc <64 x i8> %0 to <64 x i1> %a = trunc <64 x i8> %0 to <64 x i1>
%b = call i1 @llvm.experimental.vector.reduce.xor.v64i1(<64 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.xor.v64i1(<64 x i1> %a)
ret i1 %b ret i1 %b
} }
; ;
▲ Show 20 Lines • Show All 886 Lines • ▼ Show 20 Lines
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = icmp eq <32 x i16> %0, zeroinitializer %a = icmp eq <32 x i16> %0, zeroinitializer
%b = call i1 @llvm.experimental.vector.reduce.xor.v32i1(<32 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.xor.v32i1(<32 x i1> %a)
ret i1 %b ret i1 %b
} }
define i1 @icmp_v64i8_v64i1(<64 x i8>) { define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; SSE2-LABEL: icmp_v64i8_v64i1: ; SSE-LABEL: icmp_v64i8_v64i1:
; SSE2: # %bb.0: ; SSE: # %bb.0:
; SSE2-NEXT: pxor %xmm4, %xmm4 ; SSE-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: pcmpeqb %xmm4, %xmm2 ; SSE-NEXT: pcmpeqb %xmm4, %xmm2
; SSE2-NEXT: pcmpeqb %xmm4, %xmm0 ; SSE-NEXT: pcmpeqb %xmm4, %xmm0
; SSE2-NEXT: pcmpeqb %xmm4, %xmm3 ; SSE-NEXT: pcmpeqb %xmm4, %xmm3
; SSE2-NEXT: pcmpeqb %xmm4, %xmm1 ; SSE-NEXT: pcmpeqb %xmm4, %xmm1
; SSE2-NEXT: pxor %xmm3, %xmm1 ; SSE-NEXT: pxor %xmm3, %xmm1
; SSE2-NEXT: pxor %xmm2, %xmm1 ; SSE-NEXT: pxor %xmm2, %xmm1
; SSE2-NEXT: pxor %xmm0, %xmm1 ; SSE-NEXT: pxor %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] ; SSE-NEXT: psllw $7, %xmm1
; SSE2-NEXT: pxor %xmm1, %xmm0 ; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; SSE-NEXT: movl %eax, %ecx
; SSE2-NEXT: pxor %xmm0, %xmm1 ; SSE-NEXT: shrl $8, %ecx
; SSE2-NEXT: movdqa %xmm1, %xmm0 ; SSE-NEXT: xorb %al, %cl
; SSE2-NEXT: psrld $16, %xmm0 ; SSE-NEXT: setnp %al
; SSE2-NEXT: pxor %xmm1, %xmm0 ; SSE-NEXT: retq
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: psrlw $8, %xmm1
; SSE2-NEXT: pxor %xmm0, %xmm1
; SSE2-NEXT: movd %xmm1, %eax
; SSE2-NEXT: # kill: def $al killed $al killed $eax
; SSE2-NEXT: retq
;
; SSE41-LABEL: icmp_v64i8_v64i1:
; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm4, %xmm4
; SSE41-NEXT: pcmpeqb %xmm4, %xmm2
; SSE41-NEXT: pcmpeqb %xmm4, %xmm0
; SSE41-NEXT: pcmpeqb %xmm4, %xmm3
; SSE41-NEXT: pcmpeqb %xmm4, %xmm1
; SSE41-NEXT: pxor %xmm3, %xmm1
; SSE41-NEXT: pxor %xmm2, %xmm1
; SSE41-NEXT: pxor %xmm0, %xmm1
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
; SSE41-NEXT: pxor %xmm1, %xmm0
; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; SSE41-NEXT: pxor %xmm0, %xmm1
; SSE41-NEXT: movdqa %xmm1, %xmm0
; SSE41-NEXT: psrld $16, %xmm0
; SSE41-NEXT: pxor %xmm1, %xmm0
; SSE41-NEXT: movdqa %xmm0, %xmm1
; SSE41-NEXT: psrlw $8, %xmm1
; SSE41-NEXT: pxor %xmm0, %xmm1
; SSE41-NEXT: pextrb $0, %xmm1, %eax
; SSE41-NEXT: # kill: def $al killed $al killed $eax
; SSE41-NEXT: retq
; ;
; AVX1-LABEL: icmp_v64i8_v64i1: ; AVX1-LABEL: icmp_v64i8_v64i1:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm3 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm3
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm4 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpxor %xmm0, %xmm3, %xmm0 ; AVX1-NEXT: vpxor %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpxor %xmm0, %xmm4, %xmm0 ; AVX1-NEXT: vpxor %xmm0, %xmm4, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX1-NEXT: movl %eax, %ecx
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: shrl $8, %ecx
; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1 ; AVX1-NEXT: xorb %al, %cl
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: setnp %al
; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpextrb $0, %xmm0, %eax
; AVX1-NEXT: # kill: def $al killed $al killed $eax
; AVX1-NEXT: vzeroupper ; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq ; AVX1-NEXT: retq
; ;
; AVX2-LABEL: icmp_v64i8_v64i1: ; AVX2-LABEL: icmp_v64i8_v64i1:
; AVX2: # %bb.0: ; AVX2: # %bb.0:
; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX2-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vpcmpeqb %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vpcmpeqb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: movl %eax, %ecx
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; AVX2-NEXT: shrl $16, %ecx
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: xorl %eax, %ecx
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; AVX2-NEXT: movl %ecx, %eax
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: shrl $8, %eax
; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1 ; AVX2-NEXT: xorb %cl, %al
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: setnp %al
; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpextrb $0, %xmm0, %eax
; AVX2-NEXT: # kill: def $al killed $al killed $eax
; AVX2-NEXT: vzeroupper ; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq ; AVX2-NEXT: retq
; ;
; AVX512F-LABEL: icmp_v64i8_v64i1: ; AVX512F-LABEL: icmp_v64i8_v64i1:
; AVX512F: # %bb.0: ; AVX512F: # %bb.0:
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1 ; AVX512F-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1
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; AVX512F-NEXT: kmovw %k0, %eax ; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: def $al killed $al killed $eax ; AVX512F-NEXT: # kill: def $al killed $al killed $eax
; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: vzeroupper
; AVX512F-NEXT: retq ; AVX512F-NEXT: retq
; ;
; AVX512BW-LABEL: icmp_v64i8_v64i1: ; AVX512BW-LABEL: icmp_v64i8_v64i1:
; AVX512BW: # %bb.0: ; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vptestnmb %zmm0, %zmm0, %k0 ; AVX512BW-NEXT: vptestnmb %zmm0, %zmm0, %k0
; AVX512BW-NEXT: kshiftrq $32, %k0, %k1 ; AVX512BW-NEXT: kmovq %k0, %rax
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: movq %rax, %rcx
; AVX512BW-NEXT: kshiftrq $16, %k0, %k1 ; AVX512BW-NEXT: shrq $32, %rcx
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: xorl %eax, %ecx
; AVX512BW-NEXT: kshiftrq $8, %k0, %k1 ; AVX512BW-NEXT: movl %ecx, %eax
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: shrl $16, %eax
; AVX512BW-NEXT: kshiftrq $4, %k0, %k1 ; AVX512BW-NEXT: xorl %ecx, %eax
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: movl %eax, %ecx
; AVX512BW-NEXT: kshiftrq $2, %k0, %k1 ; AVX512BW-NEXT: shrl $8, %ecx
; AVX512BW-NEXT: kxorq %k1, %k0, %k0 ; AVX512BW-NEXT: xorb %al, %cl
; AVX512BW-NEXT: kshiftrq $1, %k0, %k1 ; AVX512BW-NEXT: setnp %al
; AVX512BW-NEXT: kxorq %k1, %k0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: def $al killed $al killed $eax
; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq ; AVX512BW-NEXT: retq
; ;
; AVX512VL-LABEL: icmp_v64i8_v64i1: ; AVX512VL-LABEL: icmp_v64i8_v64i1:
; AVX512VL: # %bb.0: ; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vptestnmb %zmm0, %zmm0, %k0 ; AVX512VL-NEXT: vptestnmb %zmm0, %zmm0, %k0
; AVX512VL-NEXT: kshiftrq $32, %k0, %k1 ; AVX512VL-NEXT: kmovq %k0, %rax
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: movq %rax, %rcx
; AVX512VL-NEXT: kshiftrq $16, %k0, %k1 ; AVX512VL-NEXT: shrq $32, %rcx
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: xorl %eax, %ecx
; AVX512VL-NEXT: kshiftrq $8, %k0, %k1 ; AVX512VL-NEXT: movl %ecx, %eax
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: shrl $16, %eax
; AVX512VL-NEXT: kshiftrq $4, %k0, %k1 ; AVX512VL-NEXT: xorl %ecx, %eax
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: movl %eax, %ecx
; AVX512VL-NEXT: kshiftrq $2, %k0, %k1 ; AVX512VL-NEXT: shrl $8, %ecx
; AVX512VL-NEXT: kxorq %k1, %k0, %k0 ; AVX512VL-NEXT: xorb %al, %cl
; AVX512VL-NEXT: kshiftrq $1, %k0, %k1 ; AVX512VL-NEXT: setnp %al
; AVX512VL-NEXT: kxorq %k1, %k0, %k0
; AVX512VL-NEXT: kmovd %k0, %eax
; AVX512VL-NEXT: # kill: def $al killed $al killed $eax
; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: vzeroupper
; AVX512VL-NEXT: retq ; AVX512VL-NEXT: retq
%a = icmp eq <64 x i8> %0, zeroinitializer %a = icmp eq <64 x i8> %0, zeroinitializer
%b = call i1 @llvm.experimental.vector.reduce.xor.v64i1(<64 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.xor.v64i1(<64 x i1> %a)
ret i1 %b ret i1 %b
} }
declare i1 @llvm.experimental.vector.reduce.xor.v2i1(<2 x i1>) declare i1 @llvm.experimental.vector.reduce.xor.v2i1(<2 x i1>)
declare i1 @llvm.experimental.vector.reduce.xor.v4i1(<4 x i1>) declare i1 @llvm.experimental.vector.reduce.xor.v4i1(<4 x i1>)
declare i1 @llvm.experimental.vector.reduce.xor.v8i1(<8 x i1>) declare i1 @llvm.experimental.vector.reduce.xor.v8i1(<8 x i1>)
declare i1 @llvm.experimental.vector.reduce.xor.v16i1(<16 x i1>) declare i1 @llvm.experimental.vector.reduce.xor.v16i1(<16 x i1>)
declare i1 @llvm.experimental.vector.reduce.xor.v32i1(<32 x i1>) declare i1 @llvm.experimental.vector.reduce.xor.v32i1(<32 x i1>)
declare i1 @llvm.experimental.vector.reduce.xor.v64i1(<64 x i1>) declare i1 @llvm.experimental.vector.reduce.xor.v64i1(<64 x i1>)