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[X86] Improve codegen of v8i64->v8i16 and v16i32->v16i8 truncate with avx512vl, avx512bw, min-legal-vector-width<=256 and prefer-vector-width=256
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Authored by craig.topper on Aug 1 2019, 6:15 PM.

Details

Summary

Under this configuration we'll want to split the v8i64 or v16i32 into two vectors. The default legalization will try to truncate each of those 256-bit pieces one step to 128-bit, concatenate those, then truncate one more time from the new 256 to 128 bits.

With this patch we now truncate the two splits to 64-bits then concatenate those. We have to do this two different ways depending on whether have widening legalization enabled. Without widening legalization we have to manual construct X86ISD::VTRUNC to prevent the ISD::TRUNCATE with a narrow result being promoted to 128 bits with a larger element type than what we want followed by something like a pshufb to grab the lower half of each element to finish the job. With widening legalization we just get the right thing. When we switch to widening by default we can just delete the other code path.

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Event Timeline

craig.topper created this revision.Aug 1 2019, 6:15 PM
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Remove the special case for vector widening legalization

RKSimon accepted this revision.Aug 8 2019, 1:09 PM

LGTM

This revision is now accepted and ready to land.Aug 8 2019, 1:09 PM
This revision was automatically updated to reflect the committed changes.