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[GlobalISel][AArch64] Teach GISel to handle shifts in load addressing modes
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Authored by paquette on Jul 22 2019, 3:16 PM.

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Summary

When we select the XRO variants of loads, we can pull in very specific shifts (of the size of an element). E.g.

ldr x1, [x2, x3, lsl #3]

This teaches GISel to handle these when they're coming from shifts specifically.

This adds a new addressing mode function, selectAddrModeShiftedExtendXReg which recognizes this pattern.

This also packs this up with selectAddrModeRegisterOffset into selectAddrModeXRO. This is intended to be equivalent to selectAddrModeXRO in AArch64ISelDAGtoDAG.

Also update load-addressing-modes to show that all of the cases here work.

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Repository
rL LLVM

Event Timeline

paquette created this revision.Jul 22 2019, 3:16 PM
aemerson accepted this revision.Jul 22 2019, 4:22 PM

LGTM.

This revision is now accepted and ready to land.Jul 22 2019, 4:22 PM
This revision was automatically updated to reflect the committed changes.