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[X86][SSE] EltsFromConsecutiveLoads - add basic dereferenceable support
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Authored by RKSimon on Jul 4 2019, 6:41 AM.

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Summary

This patch checks to see if the vector element loads are based off a dereferenceable pointer that covers the entire vector width, in which case we don't need to have element loads at both extremes of the vector width - just the start (base pointer) of it.

Another step towards partial vector loads......

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rL LLVM

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RKSimon created this revision.Jul 4 2019, 6:41 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 4 2019, 6:41 AM
RKSimon updated this revision to Diff 208363.Jul 8 2019, 4:10 AM

Allow any dereferenceable load if it doesn't contain any zeros

niravd added inline comments.Jul 8 2019, 7:58 AM
lib/Target/X86/X86ISelLowering.cpp
7603 ↗(On Diff #208363)

Any reason that FirstLoadedElt must be zero if IsDereferenceable? I didn't see anything beyond the CreateLoad where that predicate could be relocated.

It'd be nice if we could pull the first/last checks up into the IsDereferenceable definition.

RKSimon marked an inline comment as done.Jul 8 2019, 8:30 AM
RKSimon added inline comments.
lib/Target/X86/X86ISelLowering.cpp
7603 ↗(On Diff #208363)

At the moment the only usecases I have for dereferencable ranges is for entire vector loads.

MachinePointerInfo::isDereferenceable() could be extended to have a -ve and +ve "span" range so we could work with partial 'insertion' loads but I haven't seen a usecase for it yet.

any more comments?

niravd accepted this revision.Jul 9 2019, 10:02 AM

LGTM.

This revision is now accepted and ready to land.Jul 9 2019, 10:02 AM
This revision was automatically updated to reflect the committed changes.